5962-8956801ZC [TEMIC]

FIFO, 4KX9, 120ns, Asynchronous, CMOS, CQCC32;
5962-8956801ZC
型号: 5962-8956801ZC
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

FIFO, 4KX9, 120ns, Asynchronous, CMOS, CQCC32

先进先出芯片
文件: 总35页 (文件大小:209K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
REVISIONS  
LTR  
C
DESCRIPTION  
DATE (YR-MO-DA)  
93-11-15  
APPROVED  
M. A. Frye  
Update boilerplate of document. Add devices 06 and 07. Add vendor  
CAGE 61772 as source of supply for devices 06 and 07. Editorial  
changes throughout.  
D
E
Changes in accordance with NOR 5962-R187-95  
95-08-14  
00-01-21  
M. A. Frye  
Updated boilerplate to one-part, one-part number format. Added  
provisions for the inclusion of radiation-hardened devices. - glg  
Raymond Monnin  
F
G
H
Drawing updated to reflect current requirements. - glg  
Updated boilerplate paragraphs. Added 08 device. ksr  
01-01-17  
01-07-27  
02-02-04  
Raymond Monnin  
Raymond Monnin  
Raymond Monnin  
Added packages T and N. Dose rate and total dose numbers were  
changed; vendor had not previously shipped radhard devices. ksr  
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.  
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PREPARED BY  
Kenneth Rice  
PMIC N/A  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
STANDARD MICROCIRCUIT  
DRAWING  
CHECKED BY  
Ray Monnin  
http://www.dscc.dla.mil  
APPROVED BY  
Michael. A. Frye  
MICROCIRCUITS, MEMORY,  
DIGITAL, CMOS, 4K X 9 FIFO,  
MONOLITHIC SILICON  
THIS DRAWING IS  
AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
DRAWING APPROVAL DATE  
08 Nov 1989  
AMSC N/A  
REVISION LEVEL  
H
SIZE  
CAGE CODE  
5962-89568  
A
67268  
SHEET  
1 OF 31  
DSCC FORM 2233  
APR 97  
5962-E221-02  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  
1. SCOPE  
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and  
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the  
Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the  
PIN.  
1.2 PIN. The PIN shall be as shown in the following example:  
For device classes M and Q not using class designator in the PIN:  
5962  
-
|
89568  
01  
|
X
|
X
|
|
|
|
|
|
|
|
|
|
|
|
Federal  
stock class  
designator  
RHA  
designator  
(see 1.2.1)  
Device  
type  
(see 1.2.2)  
Case  
outline  
(see 1.2.4)  
Lead  
finish  
(see 1.2.5)  
\
/
\/  
Drawing number  
For device classes Q and V where class designator is included in the PIN:  
5962  
D
|
89568  
01  
|
Q
|
X
|
C
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Federal  
stock class  
designator  
RHA  
designator  
(see 1.2.1)  
Device  
type  
(see 1.2.2)  
Device  
class  
designator  
(see 1.2.3)  
Case  
outline  
(see 1.2.4)  
Lead  
finish  
(see 1.2.5)  
\
/
\/  
Drawing number  
1.2.1 (RHA) designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and  
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A  
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.  
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:  
Device type  
Generic number  
7204  
Circuit function  
Access time  
120 ns  
80 ns  
01  
02  
03  
04  
05  
06  
07  
08  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO  
4K X 9-bit parallel FIFO (very low power)  
7204  
7204  
7204  
7204  
7204  
7204  
7204  
65 ns  
50 ns  
40 ns  
30 ns  
20 ns  
15 ns  
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as  
listed below.  
Device class  
M
Device requirements documentation  
Vendor self-certification to the requirements for non-JAN class B microcircuits in  
accordance with MIL-PRF-38535, appendix A  
Q or V  
Certification and qualification to MIL-PRF-38535  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
2
DSCC FORM 2234  
APR 97  
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows:  
Outline letter  
Descriptive designator  
Terminals  
Package style  
X
Y
Z
U
T
N
GDIP1-T28 or CDIP2-T28  
GDFP2-F28  
CQCC1-N32  
GDIP4-T28 or CDIP3-T28  
See figure 1  
28  
28  
32  
28  
28  
28  
dual-in-line package  
flat package  
rectangular chip carrier  
dual-in-line package  
dual-in-line package  
flat package  
See figure 1  
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.  
1.3 Absolute maximum ratings.  
Terminal voltage with respect to ground.................................... -0.5 V dc to +7.0 V dc  
DC output current ...................................................................... 50 mA  
Storage temperature range ....................................................... -65°C to +155°C  
Maximum power dissipation ...................................................... 1.0 W  
Lead temperature (soldering, 10 seconds)................................ +260°C  
Thermal resistance, junction-to-case (θJC) ................................ See MIL-STD-1835  
Junction temperature (TJ).......................................................... +150°C 1/  
1.4 Recommended operating conditions.  
Supply voltage range (VCC)........................................................ +4.5 V dc to +5.5 V dc  
Minimum high level input voltage (VIH) ...................................... 2.2 V dc minimum 2/  
Input low voltage (VIL)................................................................ 0.8 V dc maximum 3/  
Case operating temperature range (TC) .................................... -55°C to +125°C  
1.5 Radiation features.  
Maximum total dose available (dose rate = 0.1 rad/s) --------------------------- 10 K Rads(Si)  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part  
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the  
issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the  
solicitation.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883  
-
Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.  
1/ Maximum junction temperature may be increased to +175°C during burn-in and steady state life.  
2/ VIH is 2.2 V minimum for all input pins except XI which is 3.5 V minimum.  
3/ 1.5 V undershoots are allowed for 10 ns once per cycle.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
3
DSCC FORM 2234  
APR 97  
HANDBOOKS  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMD's).  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.  
Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS  
cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the  
documents cited in the solicitation.  
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)  
ASTM Standard F1192M-95  
-
Standard Guide for the Measurement of Single Event Phenomena from  
Heavy Ion Irradiation of Semiconductor Devices.  
(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials,  
1916 Race Street, Philadelphia, PA 19103).  
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)  
JEDEC Standard EIA/JESD78  
-
IC Latch-Up Test.  
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA  
22201.)  
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute  
the documents. These documents also may be available in or through libraries or other informational services.)  
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text  
of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless  
a specific exemption has been obtained.  
3. REQUIREMENTS  
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-  
38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in  
the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M  
shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified  
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.  
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.  
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.  
3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.  
3.2.4 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document  
revision level control and shall be made available to the preparing and acquiring activity upon request.  
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the  
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full  
case operating temperature range.  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical  
tests for each subgroup are defined in table I.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
4
DSCC FORM 2234  
APR 97  
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be  
marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space  
limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the  
RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.  
Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A.  
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required  
in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.  
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535  
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of  
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see  
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this  
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535  
and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.  
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or  
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.  
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2  
herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.  
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain  
the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made  
available onshore at the option of the reviewer.  
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in  
microcircuit group number 41 (see MIL-PRF-38535, appendix A).  
4. QUALITY ASSURANCE PROVISIONS  
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with  
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan  
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be  
in accordance with MIL-PRF-38535, appendix A.  
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted  
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in  
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.  
4.2.1 Additional criteria for device class M.  
a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical  
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.  
b. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made  
available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and  
power dissipation, as applicable, in accordance with the intent specified in test method 1015.  
(1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition C or D; for circuit, see 4.2.1b herein).  
c. Interim and final electrical parameters shall be as specified in table IIA herein.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
5
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
Test  
Symbol  
Conditions  
Group A  
subgroups  
Device  
type  
Limits  
Min Max  
Unit  
-55°C T +125°C  
C
VSS = 0 V  
4.5 V V  
5.5 V  
CC  
unless otherwise specified  
Input leakage current  
0.0 V VIN VCC  
1, 2, 3  
1 1/  
All  
All  
All  
All  
-10  
10  
2/  
10  
2/  
µA  
µA  
V
ILI  
M, D  
2/  
-10  
2/  
0.0 V VIN VCC  
VIH  
R
Output leakage  
current  
1, 2, 3  
1 1/  
ILO  
M, D  
Output low voltage  
Output High voltage  
1, 2, 3  
1 1/  
0.4  
2/  
VOL  
VCC = 4.5 V, IOL = 8 mA  
VIL = 0.8,  
VIH = 2.2 V  
M, D  
I
OH= -2 mA  
VCC = 4.5 V,  
1, 2, 3  
2.4  
2/  
V
VOH  
VIL = 0.8, VIH = 2.2 V  
M, D  
1 1/  
01-04,  
06,07  
Operating supply  
current  
ICC1  
f = fS, outputs open, VCC = 5.5 V  
f = 15.3 MHz outputs open  
150  
120  
1, 2, 3  
08  
mA  
mA  
05  
150  
VCC = 5.5 V  
M, D  
2/  
1 1/  
01-07  
08  
25  
Standby current  
ICC2  
1, 2, 3  
R = W = RS =FL /RT = VIH  
5
outputs open  
M, D  
1 1/  
2/  
4
01-07  
08  
Power down current  
Input Capacitance  
ICC3  
All inputs = VCC -0.2 V,  
outputs open  
1, 2, 3  
mA  
pF  
pF  
0.4  
2/  
M, D  
1 1/  
4
01-05,  
08  
CIN  
VI = 0.0 V, f = 1 MHz  
TA = +25°C, See 4.4.1e  
8
06,07  
All  
10  
12  
Output Capacitance  
Functional tests  
COUT  
4
See 4.4.1c  
M, D  
7,8A,8B  
7
1/  
2/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
6
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
C
Min  
Max  
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01  
02  
03  
04  
05  
06  
07  
08  
7.0  
10  
fS  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
Shift frequency  
MHz  
12.5  
15  
20  
25  
33.3  
40  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
tRC  
CL = 30 pF,  
9,10,11  
Read cycle time  
See figures 4 and 5  
ns  
ns  
ns  
65  
50  
40  
30  
25  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
tA  
CL = 30 pF,  
9,10,11  
Access time  
See figures 4 and 5  
M, D  
9 1/  
2/  
01,02  
03,04  
05-08  
20  
15  
10  
tRR  
CL = 30 pF,  
9,10,11  
Read recovery time  
See figures 4 and 5  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
7
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Min Max  
Unit  
C
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
Read pulse width  
tRPW  
ns  
M, D  
9 1/  
2/  
01-04  
05-07  
08  
10  
5.0  
0
Read pulse low to  
data bus at low Z  
tRLZ  
3/  
CL = 30 pF,  
9,10,11  
See figures 4 and 5  
ns  
ns  
M, D  
9 1/  
2/  
01-04  
06,07  
05  
Write pulse low to  
data bus at low Z  
tWLZ  
CL = 30 pF,  
9,10,11  
5.0  
10  
3
3/ 4/  
See figures 4 and 5  
08  
M, D  
9 1/  
2/  
tDV  
CL = 30 pF,  
9,10,11  
All  
5.0  
Data valid from read  
pulse high  
See figures 4 and 5  
ns  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89568  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
8
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
-55°C T +125°C  
C
VSS = 0 V  
Min  
Max  
4.5 V V  
5.5 V  
CC  
unless otherwise specified  
01  
35  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
02-04  
05  
30  
25  
20  
15  
Read pulse high to  
data bus high Z  
tRHZ  
3/  
ns  
06  
07,08  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
Write cycle time  
tWC  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
65  
50  
40  
30  
25  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
tWPW  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
Write pulse width  
ns  
M, D  
9 1/  
2/  
01-02  
03-04  
20  
15  
Write recovery time  
tWR  
CL = 30 pF,  
9,10,11  
See figures 4 and 5  
ns  
ns  
05-08  
10  
M, D  
9 1/  
2/  
01,02  
03,04  
05  
40  
30  
20  
18  
12  
9
tDS  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
Data setup time  
06  
07  
08  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
9
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Min Max  
Unit  
ns  
C
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01-03  
10  
Data hold time  
tDH  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
04  
5.0  
0
05-08  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
65  
50  
40  
30  
25  
Reset cycle time  
tRSC  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
tRS  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
Reset pulse width  
ns  
M, D  
9 1/  
2/  
01,02  
20  
Reset recovery time  
Reset setup time  
tRSR  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
ns  
03,04  
05-08  
15  
10  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07,08  
120  
80  
65  
50  
40  
30  
20  
tRSS  
3/  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
10  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
C
Min  
Max  
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
Retransmit cycle time  
tRTC  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
65  
50  
40  
30  
25  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
Retransmit pulse  
width  
tRT  
3/  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
M, D  
9 1/  
2/  
01,02  
20  
Retransmit recovery  
time  
tRTR  
CL = 30 pF,  
9,10,11  
ns  
ns  
03,04  
05-08  
15  
10  
See figures 4 and 5  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
Reset to empty flag  
low  
tEFL  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
65  
50  
40  
30  
25  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89568  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
11  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Min Max  
Unit  
C
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01-03  
04  
05  
06  
07  
60  
Read low to empty  
flag low  
tREF  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
45  
35  
30  
20  
15  
ns  
08  
M, D  
9 1/  
2/  
01-03  
04  
05  
06  
07  
60  
45  
35  
30  
20  
25  
Read high to full flag  
high  
tRFF  
tWEF  
tWFF  
CL = 30 pF,  
9,10,11  
See figures 4 and 5  
ns  
ns  
08  
M, D  
9 1/  
2/  
01-03  
04  
05  
06  
07  
60  
45  
35  
30  
20  
15  
Write high to empty  
flag high  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
08  
M, D  
9 1/  
2/  
01-03  
04  
05  
06  
07,08  
60  
45  
35  
30  
20  
Write low to full flag  
low  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
ns  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
140  
100  
80  
65  
50  
40  
30  
25  
Reset to half-full and  
full-flag high  
tHFH  
tFFH  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
12  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Conditions  
-55°C T +125°C  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
C
Min  
Max  
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
Expansion out low  
delay from clock  
tXOL  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
Expansion out high  
delay from clock  
tXOH  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
tXI  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
XI pulse width  
ns  
M, D  
9 1/  
2/  
tXIR  
CL = 30 pF,  
9,10,11  
All  
10  
XI recovery time  
See figures 4 and 5  
ns  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89568  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
13  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
Conditions  
-55°C T +125°C  
C
Min  
Max  
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01-05  
06-08  
15  
10  
tXIS  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
XI set-up time  
ns  
ns  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
Retransmit setup time  
tRTS  
tRPE  
tWHF  
CL = 30 pF,  
9,10,11  
See figures 4 and 5  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
CL = 30 pF,  
9,10,11  
See figures 4 and 5  
ns  
Read pulse width after  
EF high  
M, D  
9 1/  
2/  
01  
140  
100  
80  
Write low to half-full  
flag low  
CL = 30 pF,  
9,10,11  
02  
See figures 4 and 5  
ns  
03  
04  
65  
05  
50  
06  
40  
07-08  
30  
M, D  
9 1/  
2/  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
14  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics Continued.  
Test  
Symbol  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
Conditions  
-55°C T +125°C  
C
Min  
Max  
VSS = 0 V  
4.5 V V 5.5 V  
CC  
unless otherwise specified  
01  
140  
100  
85  
Read high to half-full  
flag high  
tRHF  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
02  
ns  
03  
04  
65  
05  
50  
06  
40  
07,08  
30  
M, D  
9 1/  
2/  
01  
02  
03  
04  
05  
06  
07  
08  
120  
80  
65  
50  
40  
30  
20  
15  
tWPF  
CL = 30 pF,  
See figures 4 and 5  
9,10,11  
ns  
Write pulse width after  
FF high  
M, D  
9 1/  
2/  
1/ When performing postirradiation electrical measurements for any RHA level TA = +25°C. Limits shown are guaranteed  
at TA = +25°C. The M and D in the test condition column are the postirradiation limits for the device types specified in the  
device types column.  
2 Preirradiation values for RHA marked devices shall also be the postirradiation values, unless otherwise specified.  
3/ If not tested, shall be guaranteed to the limits specified in table I.  
4/ Only applies to read data flow through mode.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
15  
DSCC FORM 2234  
APR 97  
Case outline T  
Note:  
Lead finishes are in accordance with MIL-PRF-38535.  
FIGURE 1. Case outlines.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
16  
DSCC FORM 2234  
APR 97  
Case outline T - Continued.  
Symbol  
Millimeters  
Inches  
Min  
3.30  
0.38  
0.36  
0.96  
0.20  
-
Max  
5.84  
2.54  
0.58  
1.65  
0.38  
37.72  
-
Min  
.130  
.015  
.014  
.038  
.008  
-
Max  
.230  
.100  
.023  
.065  
.015  
1.485  
-
A
Q
b
b1  
c
D
S1  
E
0.13  
6.10  
2.92  
-
.005  
.240  
.115  
-
7.87  
5.08  
2.54  
8.13  
.310  
.200  
.100  
.320  
L
S
E1  
e
7.37  
.290  
2.54 BSC  
.100 BSC  
S2  
α
0.13  
0°  
-
15°  
-
.005  
0°  
-
15°  
-
L1  
3.30  
.130  
28  
N
NOTE: Although dimensions are in inches, the US government preferred system of measurement is the metric SI system.  
However, since this item was originally designed using inch-pound units of measurement, in the event of conflict  
between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only.  
FIGURE 1. Case outlines - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
17  
DSCC FORM 2234  
APR 97  
Case outline N.  
Note:  
Lead finishes are in accordance with MIL-PRF-38535.  
FIGURE 1. Case outlines - continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-89568  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
18  
DSCC FORM 2234  
APR 97  
Case outline N - Continued.  
Symbol  
Millimeters  
Inches  
Min  
Max  
3.30  
0.48  
0.15  
18.80  
10.67  
---  
Min  
.090  
.015  
.003  
---  
Max  
.130  
.019  
.006  
.740  
.420  
---  
A
b
2.29  
0.38  
0.08  
---  
c
D
E
9.65  
4.57  
0.76  
.380  
.180  
.030  
E2  
E3  
e
---  
---  
1.27 BSC  
.050 BSC  
L
6.35  
0.66  
---  
9.40  
---  
.250  
.026  
---  
.370  
---  
Q
S
1.30  
---  
.051  
---  
S1  
N
0.00  
.000  
28  
FIGURE 1. Case outlines - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
19  
DSCC FORM 2234  
APR 97  
Device types  
All  
Case outlines  
X,Y,U,T,N  
Z
Terminal number  
Terminal symbol  
1
2
NC  
W
D8  
W
D8  
D3  
D2  
D1  
D0  
3
4
5
6
7
D3  
D2  
D1  
D0  
XI  
8
9
FF  
Q0  
XI  
FF  
Q1  
Q2  
Q0  
10  
11  
12  
13  
14  
15  
Q1  
NC  
Q2  
Q3  
Q8  
Q3  
Q8  
GND  
R
Q4  
GND  
NC  
16  
17  
18  
Q5  
Q6  
R
Q7  
Q4  
19  
20  
Q5  
Q6  
Q7  
XO / HF  
EF  
21  
22  
23  
24  
25  
26  
RS  
FL/RT  
D7  
XO / HF  
EF  
D6  
D5  
RS  
FL/RT  
D4  
NC  
27  
28  
29  
30  
31  
VCC  
D7  
D6  
D5  
D4  
VCC  
32  
NC = no connection  
FIGURE 2. Terminal connections.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
20  
DSCC FORM 2234  
APR 97  
Reset and retransmit  
Single device configuration/width expansion mode  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Mode  
Inputs  
|
Internal status  
|
Outputs  
|
|
|
|
| RS | RT | XI | Read pointer  
| Write pointer  
| EF | FF | HF |  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Reset  
| Retransmit  
| Read/write  
|
| 0  
| 1  
| 1  
|
| X  
| 0  
| 1  
|
| 0  
| 0  
| 0  
|
| Location zero | Location zero  
| Location zero | Unchanged  
| Increment 1/  
|
| 0  
| X  
| X  
|
| 1  
| X  
| X  
|
| 1  
| X  
| X  
|
| Increment 1/  
|
1/ Pointer will increment if flag is high.  
Reset and first load  
Depth expansion/compound expansion mode  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Inputs  
Internal status  
|
| Outputs  
|
|
|
|
|
| Mode  
|
|
| Reset first device  
| Reset all other devices  
| Read/write  
| RS | FL | XI | Read pointer  
| Write pointer  
|
|
| EF | FF  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 0  
| 0  
| 1  
|
| 0  
| 1  
| X  
|
| 1/  
| 1/  
| 1/  
|
| Location zero | Location zero  
| Location zero | Location zero  
| 0  
| 0  
| X  
|
| 1  
| 1  
| X  
|
|
|
X
|
|
X
|
1/ XI is connected to XO of previous device.  
NOTES: RS = Reset input, FL /RT = First load/retransmit, EF = Empty flag output,  
FF = Full flag output, XI = Expansion input, and HF = Half-full flag output  
0 = Low level voltage  
1 = High level voltage  
X = Don't care  
FIGURE 3. Truth tables.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
H
21  
DSCC FORM 2234  
APR 97  
NOTE: CL includes scope and jig capacitance.  
AC test conditions  
|
|
|
|
|
|
|
|
| Input pulse levels  
| Input rise and fall times  
| Input timing reference levels  
| Output reference levels  
|
| GND to 3.0 V  
|
|
|
|
5 ns  
1.5 V  
1.5 V  
FIGURE 4. Output load circuit and ac test conditions.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
22  
DSCC FORM 2234  
APR 97  
Notes:  
1. EF , FF, and HF may change status during RESET but flags will be valid at tRSC  
2. W and R = VIH around the rising edge of RS .  
.
FIGURE 5. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
23  
DSCC FORM 2234  
APR 97  
FIGURE 5. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
24  
DSCC FORM 2234  
APR 97  
Note 3: EF , FF, and HF may change status during RETRANSMIT but flags will be valid to tRTC  
.
FIGURE 5. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
25  
DSCC FORM 2234  
APR 97  
FIGURE 5. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
26  
DSCC FORM 2234  
APR 97  
FIGURE 5. Timing waveforms.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
27  
DSCC FORM 2234  
APR 97  
TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/  
Line  
no.  
Test  
requirements  
Subgroups  
(per method  
5005, table I)  
Subgroups  
(per MIL-PRF-38535,  
table III)  
Device class M Device class Q  
Device class V  
1
2
Interim electrical  
parameters (see 4.2)  
1,7,9  
1,7,9  
Static burn-in I  
method 1015  
Not  
required  
Not  
required  
Not  
required  
3
4
Same as line 1  
1*,7* ∆  
Dynamic burn-in  
(method 1015)  
Required  
Required  
Required  
5
6
Same as line 1  
1*,7* ∆  
Final electrical  
parameters  
1*,2,3,7*,  
8A,8B,9,10,11  
1*,2,3,7*,  
1*,2,3,7*,  
8A,8B,9,10,11 8A,8B,9,10,11  
7
Group A test  
requirements  
1,2,3,4**,7,8A,  
8B,9,10,11  
1,2,3,4**,7,  
8A,8B,9,10,11  
1,2,3,4**,7,  
8A,8B,9,10,11  
8
9
Group C end-point  
electrical parameters  
2,3,7,  
8A,8B  
2,3,7,  
8A,8B  
1,2,3,7,  
8A,8B,9,10,11 ∆  
Group D end-point  
electrical parameters  
2,3,7,  
8A,8B  
2,3,7,  
8A,8B  
2,3,7  
8A,8B  
10  
Group E end-point  
1,7,9  
1,7,9  
1,7,9  
electrical parameters  
1/ Blank spaces indicate tests are not applicable.  
2/ Any or all subgroups may be combined when using high-speed testers.  
3/ Subgroups 7 and 8 functional tests shall verify the truth table.  
4/ * indicates PDA applies to subgroups 1 and 7.  
5/ ** see 4.4.1e.  
6/ indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be  
computed with reference to the previous interim electrical parameters (see line 1).For device classes Q and  
V performance of delta limits shall be as specified in the manufacturer's QM plan.  
7/ See 4.4.1d.  
4.2.2 Additional criteria for device classes Q and V.  
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device  
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under  
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-  
PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify  
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method  
1015 of MIL-STD-883.  
b.Interim and final electrical test parameters shall be as specified in table IIA herein.  
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-  
38535, appendix B.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
28  
DSCC FORM 2234  
APR 97  
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in  
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for  
groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).  
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-  
38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-PRF-38535 permits  
alternate in-line control testing. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535,  
appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of  
MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).  
4.4.1 Group A inspection.  
a. Tests shall be as specified in table IIA herein.  
b. Subgroups 5 and 6 of table I of method 5005 of MIL-STD-883 shall be omitted.  
c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,  
subgroups 7 and 8 shall include verifying the functionality of the device.  
d. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may  
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document  
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity  
upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device  
manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or  
acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be  
considered destructive. Information contained in JEDEC Standard EIA/JESD78 may be used for reference.  
e. Subgroup 4 (C and C  
IN OUT  
measurements) shall be measured only for initial qualification and after any process or  
design changes which may affect input or output capacitance. Capacitance shall be measured between the  
designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and  
output terminals tested.  
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.  
4.4.2.1 Additional criteria for device class M.  
a. Steady-state life test conditions, method 1005 of MIL-STD-883:  
(1) Test condition C. The test circuit shall be maintained by the manufacturer under document revision level control and  
shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,  
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005.  
(2) TA = +125°C, minimum.  
(3) Test duration: 1,000 hours, except as specified in method 1005 of MIL-STD-883.  
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,  
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The  
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-  
PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the  
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of  
MIL-STD-883.  
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
29  
DSCC FORM 2234  
APR 97  
TABLE IIB. Delta limits at +25°C.  
|
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Device types  
All  
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| Parameter 1/  
|
| I  
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| I , I  
LI LO  
,I  
CC2 CC3  
| +10% of specified value  
| in table I.  
| +10% of specified value  
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| in table I.  
|
1/ The above parameter shall be recorded  
before and after the required burn-in and  
life tests to determine the delta.  
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness  
assured (see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point  
electrical parameters shall be as specified in table IIA herein.  
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883  
method 1019, condition B and as specified herein.  
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater  
than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the  
pre-irradiation end-point electrical parameter limit at 25°C ± 5°C. Testing shall be performed at initial qualification and after any  
design or process changes which may affect the RHA response of the device.  
4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test  
method 1020 of MIL-STD-883 and as specified herein. Test shall be performed on devices, SEC, or approved test structures at  
technology qualification and after any design or process changes which may affect the RHA capability of the process.  
4.4.4.3 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with test method 1021 of MIL-  
STD-883 and herein.  
a.Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes  
which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.  
b.Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation  
hardness assurance plan and MIL-PRF-38535.  
4.4.4.4 Single event phenomena (SEP). SEP testing shall be required on class V devices. SEP testing shall be performed  
on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial  
qualification and after any design or process changes which may affect the upset or latchup characteristics. Test four devices  
with zero failures. ASTM standard F1192 may be used as a guideline when performing SEP testing. The test conditions for  
SEP are as follows:  
a.The ion beam angle of incidence shall be normal to the die surface and 60 degrees to the normal, inclusive (i.e., 0° <  
angle < 60°). No shadowing of the ion beam due to fixturing or package related effects is allowed.  
b.The fluence shall be greater than 100 errors or > 107 ions/cm2.  
c. The flux shall be between 102 and 105 ion/cm2/s. The cross section shall be verified to be flux independent by measuring  
the cross section at two flux rates which differ by at least an order of magnitude.  
d.The particle range shall be > 20 microns in silicon.  
e.The test temperature shall be +25°C and the maximum rated operating temperature +10°C.  
f. Bias conditions shall be VDD = 3.14 V dc for the upset measurements and VDD = 3.46 V dc for the latchup measurements.  
g.Test four devices with zero failures.  
h.SEP test limits shall be maintained by the manufacturer under document revision level control and shall be made  
available to the preparing or acquiring activity upon request.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
30  
DSCC FORM 2234  
APR 97  
4.5 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded  
before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical  
parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option,  
either perform delta measurements or within 24 hours after life test perform final electrical parameter tests, subgroups 1, 7, 9.  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device  
classes Q and V or MIL-PRF-38535, appendix A for device class M.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for government microcircuit applications  
(original equipment), design applications, and logistics purposes.  
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-  
prepared specification or drawing.  
6.1.2 Substitutability. Device class Q devices will replace device class M devices.  
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for  
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.  
6.3 Record of users. Military and industrial users shall inform Defense Supply Center Columbus when a system application  
requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list  
will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices  
(FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.  
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone  
(614) 692-0547.  
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-  
PRF-38535 and MIL-STD-1331, and as follows.  
CIN...................................................Input terminal capacitance.  
COUT ................................................Output and bidirectional output terminal capacitance.  
GND................................................Ground zero voltage potential.  
ICC ...................................................Supply current.  
ILI.....................................................Input leakage current.  
ILO ...................................................Output leakage current.  
TC....................................................Case temperature.  
VCC..................................................Positive supply voltage.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
31  
DSCC FORM 2234  
APR 97  
6.5.2 Waveforms.  
Waveform  
symbol  
Input  
Output  
MUST BE  
WILL BE  
VALID  
VALID  
CHANGE FROM  
H TO L  
WILL CHANGE  
FROM  
H TO L  
CHANGE FROM  
L TO H  
WILL CHANGE  
FROM  
L TO H  
DON'T CARE  
ANY CHANGE  
PERMITTED  
CHANGING  
STATE  
UNKNOWN  
HIGH  
IMPEDANCE  
6.6 Sources of supply.  
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-  
38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have  
agreed to this drawing.  
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.  
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been  
submitted to and accepted by DSCC-VA.  
SIZE  
STANDARD  
5962-89568  
MICROCIRCUIT DRAWING  
A
REVISION LEVEL  
H
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
32  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING BULLETIN  
DATE: 02-02-04  
Approved sources of supply for SMD 5962-89568 are listed below for immediate acquisition only and shall be added  
to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to  
include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of  
compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated  
revision of MIL-HDBK-103 and QML-38535 .  
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| Standardized  
| military drawing  
| PIN 1/  
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|Vendor | Vendor  
| CAGE similar  
|number | PIN 3/  
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| 5962-8956801XA  
| 61772 | IDT7204L120DB  
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2/  
| MM1I-67204-55MB  
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| 5962-8956801YA  
| 61772 | IDT7204L120XEB  
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| 5962-8956801ZA  
| 61772 | IDT7204L120LB  
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2/  
| MM4J-67204-55MB  
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| 5962-8956802XA  
| 61772 | IDT7204L80DB  
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2/  
| MM1I-67204-55MB  
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| 5962-8956802YA  
| 61772 | IDT7204L80XEB  
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| 5962-8956802ZA  
| 61772 | IDT7204L80LB  
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2/  
| MM4J-67204-55MB  
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| 5962-8956803XA  
| 61772 | IDT7204L65DB  
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2/  
| MM1I-67204-55MB  
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| 5962-8956803YA  
| 61772 | IDT7204L65XEB  
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| 5962-8956803ZA  
| 61772 | IDT7204L65LB  
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2/  
| MM4J-67204-55MB  
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| 5962-8956804XA  
| 61772 | IDT7204L50DB  
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2/  
2/  
| MM1I-67204-45MB  
| AM7204A-50BXA  
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| 5962-8956804UA  
| 61772 | IDT7204L50TDB  
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| 5962-8956804YA  
| 61772 | IDT7204L50XEB  
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| 5962-8956804ZA  
| 61772 | IDT7204L50LB  
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2/  
2/  
| MM4J-67204-45MB  
| AM7204A-50BUA  
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| 5962-8956804QUC  
2/  
|MMCP-67204EV-50MQ  
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| 5962-8956804VUC  
2/  
2/  
2/  
|SMCP-67204EV-50SV  
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| 5962-8956804QYC  
|MMDP-67204EV-50MQ  
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| 5962-8956804VYC  
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|SMDP-67204EV-50SV  
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| 5962-8956804QTC |F7400 |MMCP-67204EV-50MQ  
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| 5962-8956804VTC  
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|F7400 |SMCP-67204EV-50SV  
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| 5962-8956804QNC |F7400 |MMDP-67204EV-50MQ  
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| 5962-8956804VNC |F7400 |SMDP-67204EV-50SV  
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See footnote at end of list.  
1 of 3  
STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued.  
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| Standardized  
| military drawing  
| PIN 1/  
|Vendor | Vendor  
| CAGE similar  
|number | PIN 3/  
2/  
| 61772 | IDT7204L40DB  
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| 5962-8956805XA  
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2/  
2/  
| MM1I-67204-35MB  
| AM7204A-40BXA  
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| 5962-8956805UA  
| 61772 | IDT7204L40TDB  
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| 5962-8956805YA  
| 61772 | IDT7204L40XEB  
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| 5962-8956805ZA  
| 61772 | IDT7204L40LB  
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2/  
2/  
| MM4J-67204-35MB  
| AM7204A-40BUA  
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| 5962-8956805QUC  
2/  
|MMCP-67204EV-40MQ  
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| 5962-8956805VUC  
2/  
2/  
2/  
|SMCP-67204EV-40SV  
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| 5962-8956805QYC  
|MMDP-67204EV-40MQ  
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| 5962-8956805VYC  
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|SMDP-67204EV-40SV  
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| 5962-8956805QTC |F7400 |MMCP-67204EV-40MQ  
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| 5962-8956805VTC  
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|F7400 |SMCP-67204EV-40SV  
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| 5962-8956805QNC |F7400 |MMDP-67204EV-40MQ  
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| 5962-8956805VNC |F7400 |SMDP-67204EV-40SV  
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| 5962-8956806XA  
| 61772 | IDT7204L30DB  
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| 5962-8956806YA  
| 61772 | IDT7204L30XEB  
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| 5962-8956806ZA  
| 61772 | IDT7204L30LB  
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| 5962-8956806UA  
| 61772 | IDT7204L30TDB  
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| 5962-8956806QUC  
2/  
2/  
2/  
2/  
|MMCP-67204FV-30MQ  
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| 5962-8956806VUC  
|SMCP-67204FV-30SV  
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| 5962-8956806QYC  
|MMDP-67204FV-30MQ  
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| 5962-8956806VYC  
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|SMDP-67204FV-30SV  
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| 5962-8956806QTC |F7400 |MMCP-67204FV-30MQ  
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| 5962-8956806VTC  
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|F7400 |SMCP-67204FV-30SV  
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| 5962D8956806VTC |F7400 |SMCP-67204FV-30SR  
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| 5962-8956806QNC |F7400 |MMDP-67204FV-30MQ  
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| 5962-8956806VNC |F7400 |SMDP-67204FV-30SV  
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| 5962D8956806VNC |F7400 |SMDP-67204FV-30SR  
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See footnote at end of list.  
2 of 3  
STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued.  
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| Standardized  
| military drawing  
| PIN 1/  
|Vendor | Vendor  
| CAGE similar  
|number | PIN 3/  
2/  
| 61772 | IDT7204L20DB  
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| 5962-8956807XA  
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| 5962-8956807YA  
| 61772 | IDT7204L20XEB  
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| 5962-8956807ZA  
| 61772 | IDT7204L20LB  
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| 5962-8956807UA  
| 61772 | IDT7204L20TDB  
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| 5962-8956808QUC  
2/  
2/  
2/  
2/  
|MMCP-67204FV-15MQ  
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| 5962-8956808VUC  
|SMCP-67204FV-15SV  
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| 5962-8956808QYC  
|MMDP-67204FV-15MQ  
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| 5962-8956808VYC  
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|SMDP-67204FV-15SV  
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| 5962-8956808QTC |F7400 |MMCP-67204FV-15MQ  
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| 5962-8956808VTC  
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|F7400 |SMCP-67204FV-15SV  
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| 5962D8956808VTC |F7400 |SMCP-67204FV-15SR  
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| 5962-8956808QNC |F7400 |MMDP-67204FV-15MQ  
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| 5962-8956808VNC |F7400 |SMDP-67204FV-15SV  
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| 5962D8956808VNC |F7400 |SMDP-67204FV-15SR  
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1/ The lead finish shown for each PIN representing a hermetic  
package is the most readily available from the manufacturer  
listed for the part. If the desired lead finish is not listed,  
contact the Vendor to determine its availability.  
2/ No longer available from an approved source.  
3/ Caution. Do not use this number for item acquisition. Items  
acquired to this number may not satisfy the performance  
requirements of this drawing.  
Vendor CAGE  
Vendor name  
and address  
number  
61772  
Integrated Device Technology, Incorporated  
2975 Stender Way  
Santa Clara, CA 95054-8015  
F7400  
Atmel Nantes  
La Chantrerie BP 70602  
44306 NANTES CEDEX 03  
FRANCE  
The information contained herein is disseminated for convenience only and  
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相关型号:

5962-8956802XA

FIFO, 4KX9, 80ns, Asynchronous, CMOS, CDIP28, CERAMIC, DIP-28
TEMIC

5962-8956802XX

FIFO, 4KX9, 80ns, Asynchronous, CMOS, CDIP28, CERAMIC, DIP-28
TEMIC

5962-8956802YA

x9 Asynchronous FIFO
ETC

5962-8956802ZA

FIFO, 4KX9, 80ns, Asynchronous, CMOS, CQCC32, CERAMIC, CC-32
IDT

5962-8956803XA

FIFO, 4KX9, 65ns, Asynchronous, CMOS, CDIP28, CERAMIC, DIP-28
TEMIC

5962-8956803XX

FIFO, 4KX9, 65ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, THIN, CERAMIC, DIP-28
IDT

5962-8956803YA

x9 Asynchronous FIFO
ETC

5962-8956803ZA

x9 Asynchronous FIFO
ETC

5962-8956803ZC

FIFO, 4KX9, 65ns, Asynchronous, CMOS,
TEMIC

5962-8956804QYA

FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDFP28, CERAMIC, FP-28
TEMIC

5962-8956804QYC

FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDFP28, CERAMIC, FP-28
TEMIC

5962-8956804QYX

FIFO, 4KX9, 50ns, Asynchronous, CMOS, CDFP28, CERAMIC, FP-28
TEMIC