5962-8956703XA [TEMIC]

FIFO, 2KX9, 65ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28;
5962-8956703XA
型号: 5962-8956703XA
厂家: TEMIC SEMICONDUCTORS    TEMIC SEMICONDUCTORS
描述:

FIFO, 2KX9, 65ns, Asynchronous, CMOS, 0.300 INCH, THIN, CERAMIC, DIP-28

先进先出芯片
文件: 总19页 (文件大小:146K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
REVISIONS  
LTR  
A
DESCRIPTION  
DATE  
APPROVED  
Updated boilerplate to reflect current requirements and made  
corrections to table I and waveforms. Separated source bulletin from  
the body of the drawing. - glg  
01-01-30  
Raymond Monnin  
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.  
REV  
SHEET  
A
A
A
A
REV  
SHEET  
15  
16  
17  
18  
A
1
A
2
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3
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4
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5
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7
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8
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9
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REV STATUS  
OF SHEETS  
REV  
SHEET  
10  
11  
12  
13  
14  
PMIC N/A  
PREPARED BY  
Kenneth Rice  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
STANDARD  
MICROCIRCUIT  
DRAWING  
CHECKED BY  
Charles Reusing  
THIS DRAWING IS AVAILABLE  
FOR USE BY All DEPARTMENTS  
APPROVED BY  
Monica L. Poelking  
MICROCIRCUIT, MEMORY, DIGITAL, CMOS,  
2K X 9 FIFO, MONOLITHIC SILICON  
AND AGENCIES OF THE  
DRAWING APPROVAL DATE  
27 March 1990  
DEPARTMENT OF DEFENSE  
AMSC N/A  
REVISION LEVEL  
SIZE  
CAGE CODE  
5962-89567  
A
A
67268  
SHEET  
1
OF  
18  
DSCC FORM 2233  
APR 97  
5962-E180-01  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  
1. SCOPE  
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in  
accordance with MIL-PRF-38535, appendix A.  
1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example:  
5962-89567  
01  
|
X
|
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|
X
|
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|
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Drawing number  
Device type  
(see 1.2.1)  
Case outline  
(see 1.2.2)  
Lead finish  
(see 1.2.3)  
1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows:  
Device type  
Generic number  
Circuit  
Access time  
01  
02  
03  
04  
05  
7203  
7203  
7203  
7203  
7203  
2K X 9-bit parallel FIFO  
2K X 9-bit parallel FIFO  
2K X 9-bit parallel FIFO  
2K X 9-bit parallel FIFO  
2K X 9-bit parallel FIFO  
120 ns  
80 ns  
65 ns  
50 ns  
40 ns  
1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows:  
Outline letter  
Descriptive designator  
Terminals  
Package style  
X
Y
Z
GDIP1-T28 or CDIP2-T28  
GDFP2-F28  
28  
28  
32  
dual-in-line package  
flat package  
rectangular chip carrier  
CQCC1-N32  
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.  
1.3 Absolute maximum ratings.  
Terminal voltage with respect to ground............................... -0.5 V dc to +7.0 V dc  
DC output current................................................................. 50 mA  
Storage temperature range .................................................. -65 C to +150 C  
Maximum power dissipation (PD):......................................... 1.0 W  
Lead temperature (soldering, 10 seconds)........................... +260 C  
Thermal resistance, junction-to-case (  
JC) .......................... See MIL-STD-1835  
Junction temperature (TJ)..................................................... +150 C 1/  
1.4 Recommended operating conditions.  
Supply voltage range (VCC)................................................... +4.5 V dc to +5.5 V dc  
Minimum high level input voltage (VIH) ................................. 2.2 V dc  
Maximum low level input voltage (VIL) ................................. +0.8 V dc 2/  
Case operating temperature range (TC) ............................... -55 C to +125 C  
1/ Maximum junction temperature may be increased to +175 C during burn-in and steady state life.  
2/ 1.5 V undershoots are allowed for 10 ns once per cycle.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
A
2
DSCC FORM 2234  
APR 97  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards and handbooks form a part  
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the  
issue listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto,  
cited in the solicitation.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883 - Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.  
HANDBOOKS  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMD's).  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization  
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)  
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the  
text of this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations  
unless a specific exemption has been obtained.  
3. REQUIREMENTS  
3.1 Item requirements The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-  
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer  
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-  
38535 may be processed as QML product in accordance with the manufacturer's approved program plan and qualifying activity  
approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make  
modifications to the requirements herein. These modifications shall not affect the PIN as described herein. A "Q" or "QML"  
certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified  
in MIL-PRF-38535, appendix A and herein.  
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.  
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.  
3.2.3 Truth table. The truth table shall be as specified on figure 2.  
3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection  
provided that each coated microcircuit inspection lot (see MIL-PRF-38535, appendix A) shall be subjected to and pass the  
Internal Water-Vapor Content test (test method 1018 of MIL-STD-883). The frequency of the internal water vapor testing may  
not be decreased unless approved by the preparing activity.  
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are  
as specified in table I and shall apply over the full case operating temperature range.  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical  
tests for each subgroup are described in table I.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
3
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
Conditions  
-55 C < TC < +125 C  
VSS = 0 V  
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Test  
|Symbol |  
|
|
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|Group A |Device |  
|subgroups |types |  
|
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Limits  
|
|
| Unit  
|
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4.5 V < VCC < 5.5 V  
unless otherwise specified  
|
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|
| Min | Max |  
|
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|
|
Input leakage current  
|ILI  
|
|0.0 V < VIN < VCC  
|
|1, 2, 3  
|
| All  
|
|-10  
|
| 10  
|
| A  
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Output leakage current |ILO  
|0.0 V < VOUT < VCC, R > VIH  
|
|VCC = 4.5 V, IOL = 8.0 mA  
|VIL = 0.8 V, VIH = 2.2 V  
|1, 2, 3  
|
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|1, 2, 3  
|
|
|1, 2, 3  
|
|
| All  
|
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| All  
|
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| All  
|
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|-10  
| 10  
|
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| 0.4 | V  
|
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| A  
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Output low voltage  
Output high voltage  
|VOL  
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|VOH  
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| V  
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|VCC = 4.5 V, IOH = -2.0 mA  
|VIL = 0.8 V, VIH = 2.2 V  
|
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| 2.4 |  
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Operating supply  
current  
|ICC1  
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|ICC2  
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|ICC3  
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|CI N  
|
|f = fs, outputs open  
|VCC = 5.5 V  
|
|VCC = 5.5 V,  
|f = 15.3 MHz, outputs open  
|
|R = W = RS = FL/RT = VIH,  
|outputs open  
|
|
|All inputs = VCC - 0.2 V,  
|outputs open  
|
|
|VI = 0 V , f = 1.0 MHz  
|TA = +25 C, See 4.3.1c  
|
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|VO = 0 V , f = 1.0 MHz  
|TA = +25 C, See 4.3.1c  
|
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|1, 2, 3  
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|1, 2, 3  
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|1, 2, 3  
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| 4  
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| 4  
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| 01-04 |  
|150 |mA  
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05 |  
|150 |  
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Standby power supply  
current  
|
|mA  
| All  
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| All  
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| All  
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| All  
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| 25  
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Power down current  
Input capacitance  
Output capacitance  
| 4.0 |mA  
|
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| 8  
|
|pF  
|
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|COUT  
| 12  
|pF  
|
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|
|
with output deselected |  
|
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|
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|
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Functional tests  
|See 4.3.1d.  
|
|7, 8A, 8B | All  
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
4
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
Conditions  
-55 C < TC < +125 C  
VSS = 0 V  
|
|
|
|
Test  
|Symbol |  
|
|
|
|
|fS  
|
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|Group A |Device |  
|subgroups |types |  
|
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Limits  
|
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| Unit  
|
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4.5 V < VCC < 5.5 V  
unless otherwise specified  
|
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| Min | Max |  
| 01  
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| 7.0 |  
|MHz  
| 12.5 |  
Shift frequency  
Read cycle time  
Access time  
|9, 10, 11 | 02  
| 10  
|
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| 03  
| 04  
| 05  
| 01  
| 15  
| 20  
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|ns  
|
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|tRC  
|140 |  
|100 |  
|CL = 30 pF  
|9, 10, 11 | 02  
|
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|tA  
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|tRR  
|
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|tRPW  
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|See figures 4 and 5  
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| 03  
| 04  
| 05  
| 01  
| 80  
| 65  
| 50  
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|120 |  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
|ns  
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|ns  
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|ns  
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|ns  
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|ns  
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|ns  
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|ns  
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|ns  
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| 03  
| 04  
| 05  
| 01,02 | 20  
Read recovery time  
Read pulse width  
|9, 10, 11 | 03,04 | 15  
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05 | 10  
| 01  
|120 |  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
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| 03  
| 04  
| 05  
|
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Read pulse low to data |tRLZ  
bus at low-Z  
|9, 10, 11 | 01-04 | 10  
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1/ |  
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05 | 5.0 |  
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|
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Write pulse low to data |tWLZ  
bus at low-Z  
|9, 10, 11 | 01-04 | 10  
|1/ 2/ |  
|
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|tDV  
|
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05 | 5.0 |  
|
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Data valid from read  
pulse high  
|9, 10, 11 | All  
|
|
| 5.0 |  
|
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|
|
| 01  
| 35  
| 30  
|
Read pulse high to data |tRHZ  
bus high-Z  
|9, 10, 11 | 02,03, |  
|
|
|
|tWC  
|
1/ |  
|
|
|
| 04  
| 05  
| 01  
|
|
|
|
|
|
|
|
| 25  
|140 |  
|100 |  
| 80  
| 65  
| 50  
Write cycle time  
|9, 10, 11 | 02  
|
|
|
| 03  
| 04  
| 05  
|
|
|
|
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
5
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
Conditions  
-55 C < TC < +125 C  
VSS = 0 V  
|
|
|
|
Test  
|Symbol |  
|
|
|
|Group A |Device |  
|subgroups |types |  
|
|
|
Limits  
|
|
| Unit  
|
|
|
|
|
|
4.5 V < VCC < 5.5 V  
unless otherwise specified  
|
|
|
| Min | Max |  
|120 |  
|
| 01  
|
Write pulse width  
|tWPW  
|
|
|
|
|tWR  
|
|
|tDS  
|
|
|tDH  
|
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|tRSC  
|
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|
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|tRS  
|
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|
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|tRSR  
|
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|tRSS  
|
|
|
|
|CL = 30 pF  
|See figures 4 and 5  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
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|ns  
|
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|ns  
|
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|ns  
|
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|ns  
|
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|ns  
|
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|
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|ns  
|
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|
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|ns  
|
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|ns  
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|
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|ns  
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|ns  
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| 03  
| 04  
| 05  
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| 01,02 | 20  
Write recovery time  
Data setup time  
Data hold time  
|9, 10, 11 | 03,04 | 15  
|
|
|
05 | 10  
| 01,02 | 40  
|9, 10, 11 | 03,04 | 30  
|
|
|
05 | 20  
| 01-03 | 10 |  
|9, 10, 11 | 04 | 5.0 |  
|
|
|
05 | 0.0 |  
| 01  
|140 |  
|100 |  
| 80  
| 65  
| 50  
Reset cycle time  
|9, 10, 11 | 02  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|
|
|
|120 |  
Reset pulse width  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
|
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|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 01,02 | 20  
Reset recovery time  
Reset setup time  
|9, 10, 11 | 03,04 | 15  
|
|
|
05 | 10  
| 01  
|120 |  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|140 |  
|100 |  
| 80  
| 65  
| 50  
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 01  
Retransmit cycle time  
|tRTC  
|9, 10, 11 | 02  
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|
|
|
|120 |  
Retransmit pulse width |tRT  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
|
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
6
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
Conditions  
-55 C < TC < +125 C  
VSS = 0 V  
|
|
|
|
Test  
|Symbol |  
|
|
|
|
|tRTR  
|
|Group A |Device |  
|subgroups |types |  
Limits  
|
|
| Unit  
|
|
|
|
|
|
4.5 V < VCC < 5.5 V  
unless otherwise specified  
|
|
|
|
|
|
| Min | Max |  
| 01,02 | 20  
|
|
|
|
|ns  
|
Retransmit recovery  
time  
|CL = 30 pF,  
|See figures 3 and 4.  
|9, 10, 11 | 03,04 | 15  
|
| 05  
| 10  
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| 01  
|
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|140 |  
|100 |ns  
Reset to empty flag low |tEFL  
|9, 10, 11 | 02  
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 80  
| 65  
| 50  
| 60  
| 45  
| 35  
| 60  
| 45  
| 35  
| 60  
| 45  
| 35  
| 60  
| 45  
| 35  
|
|
|
|ns  
|
|
|ns  
|
|
|ns  
|
| 01-03 |  
Read low to empty flag |tREF  
|9, 10, 11 | 04  
|
|
|9, 10, 11 | 04  
|
|
|9, 10, 11 | 04  
|
|
|9, 10, 11 | 04  
|
|
|
|
low  
|
|
|tRFF  
|
|
|tWEF  
|
|
|tWFF  
|
|
|tHFH  
|tFFH  
|
|
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|tXOL  
|
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|
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|tXOH  
|
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|tXI  
|
|
|
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|tXIR  
| 05  
| 01-03 |  
Read high to full flag  
high  
|
|
| 05  
| 01-03 |  
Write high to empty  
flag high  
|
|
| 05  
| 01-03 |  
|
|ns  
|
Write low to full flag  
low  
|
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| 05  
| 01  
|
|140 |  
|100 |ns  
Reset to half-full and  
full flag high  
|9, 10, 11 | 02  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
| 80  
| 65  
| 50  
|
|
|
|120 |  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|ns  
Read/write to XO low  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|
|
|
|120 |  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|ns  
|
|
|
Read/write to XO high  
XI pulse width  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|120 |  
|
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
| 10  
|
|
|
|
|
|
|
|
|ns  
|
|
|
|
|ns  
|
|
|
|
|
| 03  
| 04  
| 05  
|
XI recovery time  
|9, 10, 11 | All  
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
7
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
Conditions  
-55 C < TC < +125 C  
VSS = 0 V  
|
|
|
|
Test  
|Symbol |  
|
|
|
|
|tXIS  
|
|
|Group A |Device |  
|subgroups |types |  
|
|
|
|9, 10, 11 | All  
|
|
Limits  
|
|
| Unit  
|
|
|
|
|
|
4.5 V < VCC < 5.5 V  
unless otherwise specified  
|
|
|
|
| Min | Max |  
|
| 15  
|
|
|
|
|
|ns  
|
XI set-up time  
|CL = 30 pF,  
|See figures 3 and 4.  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 01  
|120 |  
|
Retransmit setup time  
|tRTS  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|120 |  
| 80  
| 65  
| 50  
| 40  
|
|
|
|
|
|
|
|
|
|
|
|
|
|ns  
|
|
|
|
|ns  
|
|
|
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 01  
Read pulse width after |tRPE  
EF high  
|9, 10, 11 | 02  
|
|
|
|
|
|
|
|
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|140 |  
|100 |ns  
| 80  
| 65  
| 50  
|140 |  
|100 |ns  
| 80  
| 65  
| 50  
Write low to half-full  
flag low  
|tWHF  
|
|
|
|
|tRHF  
|
|
|
|
|9, 10, 11 | 02  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|
|
|
Read high to half-full  
flag high  
|9, 10, 11 | 02  
|
|
|
|
| 03  
| 04  
| 05  
| 01  
|
|
|
|
|ns  
|
|
|
|
|120 |  
Write pulse width after |tWPF  
|9, 10, 11 | 02  
| 80  
| 65  
| 50  
| 40  
|
|
|
|
FF high  
|
|
|
|
|
|
| 03  
| 04  
| 05  
1/ If not tested, shall be guaranteed to the limits specified in table I.  
2/ Only applies to read data flow-through mode.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
8
DSCC FORM 2234  
APR 97  
|Device types  
|
|Case outlines | X and Y |  
|
|Terminal number | Terminal symbol  
|
|
|
|
All  
|
|
|
|
|
|
|
Z
|
|
|
|
|
|
|
|
|
|
|
|
1
|W  
|D8  
|D3  
|D2  
|D1  
|D0  
|
|NC  
|
2
3
4
5
6
|W  
|
|D8  
|D3  
|D2  
|D1  
|
|
|
|
|
|
|
|
7
|XI  
|
|D0  
|
|
|
|
8
|FF  
|XI  
|
|
|
|
|
|
|
|
9
10  
11  
|Q0  
|Q1  
|Q2  
|
|Q3  
|Q8  
|GND  
|FF  
|Q0  
|Q1  
|
|NC  
|Q2  
|Q3  
|
|
|
|
|
|
|
12  
13  
14  
|
|
|
15  
16  
17  
|R  
|Q4  
|Q5  
|Q8  
|GND  
|NC  
|
|
|
|
|
|
18  
19  
|Q6  
|Q7  
|
|R  
|Q4  
|
|
|
|
|
|
20  
21  
22  
|XO /HF  
|EF  
|Q5  
|Q6  
|
|
|
|
|RS  
|
|Q7  
|
|
|
|
|
|
23  
24  
25  
|FL /RT  
|D7  
|XO /HF |  
|EF  
|RS  
|
|
|D6  
|
|
|
|
|
|
26  
27  
28  
29  
30  
31  
32  
|D5  
|D4  
|VCC  
|---  
|---  
|---  
|FL /RT |  
|NC  
|D7  
|D6  
|D5  
|D4  
|
|
|
|
|
|
|---  
|VCC  
|
|
|
|
|
NC = no connection  
FIGURE 1. Terminal connections.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
9
DSCC FORM 2234  
APR 97  
Reset and retransmit  
Single device configuration/width expansion mode  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Mode  
Inputs  
Internal status  
Outputs  
|
|
|
|
|
|
| RS | RT | XI |Read pointer |Write pointer  
| EF | FF | HF |  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|Reset  
|0 |X |0 |Location zero |Location zero |0 |1 |1 |  
|Retransmit  
|Read/write  
|
|1 |0 |0 |Location zero |Unchanged  
|1 |1 |0 |Increment 1/ |Increment 1/  
|X |X |X |  
|X |X |X |  
|
|
|
|
|
|
|
|
|
1/ Pointer will increment if flag is high.  
Reset and first load  
Depth expansion/compound expansion mode  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Inputs  
Internal status  
|Outputs |  
|
|
|
|
|
|
|
|
|Mode  
| RS | FL | XI |Read pointer |Write pointer  
| EF | FF |  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|Reset first device  
|Reset all other devices  
|Read/write  
|0 |0 |1/ |Location zero |Location zero |0 |1 |  
|0 |1 |1/ |Location zero |Location zero |0 |1 |  
|1 |X |1/ |  
X
|
|
X
|X |X |  
|
|
|
|
|
|
|
|
1/ XI is connected to XO of previous device.  
NOTES: RS = Reset input, FL /RT = First load/retransmit, EF = Empty flag output,  
FF = Full flag output, XI = Expansion input, and HF = Half-full flag output  
0 = Low level voltage  
1 = High level voltage  
X = Don't care  
FIGURE 2. Truth tables.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
10  
DSCC FORM 2234  
APR 97  
NOTE: CL includes scope and jig capacitance.  
AC test conditions  
|
|
|
|Input pulse levels  
|Input rise and fall times  
|Input timing reference levels  
|Output reference levels  
|
|GND to 3.0 V |  
|
|
|
|
<5 ns  
1.5 V  
1.5 V  
|
|
|
|
FIGURE 3. Output load circuit and ac test conditions.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
11  
DSCC FORM 2234  
APR 97  
Notes:  
1. EF, FF, and HF may change status during RESET but flags will be valid at tRSC  
2. W and R = VIH around the rising edge of RS.  
.
FIGURE 4. Timing waveforms.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
12  
DSCC FORM 2234  
APR 97  
FIGURE 4. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
13  
DSCC FORM 2234  
APR 97  
Note 3: EF, FF, and HF may change status during RETRANSMIT but flags will be valid to tRTC  
.
FIGURE 4. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
14  
DSCC FORM 2234  
APR 97  
FIGURE 4. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
15  
DSCC FORM 2234  
APR 97  
FIGURE 4. Timing waveforms - continued.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
16  
DSCC FORM 2234  
APR 97  
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed  
in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For  
packages where the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not  
marking the "5962-" on the device.  
3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535,  
Appendix A.  
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an  
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to  
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,  
appendix A and the requirements herein.  
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided  
with each lot of microcircuits delivered to this drawing.  
3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535,  
appendix A.  
3.9 Verification and review. DSCC, DSCC's agent and the acquiring activity retain the option to review the manufacturer's  
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the  
reviewer.  
4. QUALITY ASSURANCE PROVISIONS  
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A.  
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices  
prior to quality conformance inspection. The following additional criteria shall apply:  
a. Burn-in test (method 1015 of MIL-STD-883).  
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level  
control and shall be made available to the preparing or procuring activity upon request. The test circuit shall  
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in  
test method 1015 of MIL-STD-883.  
(2) TA = +125 C, minimum.  
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter  
tests prior to burn-in are optional at the discretion of the manufacturer.  
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-  
883 including groups A, B, C, and D inspections. The following additional criteria shall apply.  
4.3.1 Group A inspection.  
a. Tests shall be as specified in table II herein.  
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.  
c. Subgroup 4 (CIN and COUT measurement) shall be measured only for the initial test and after any design or process  
changes which may affect capacitance. Sample size is 15 devices with no failures, and all input and output terminals  
tested.  
d. Subgroups 7 and 8 tests shall include verification of the truth table.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
17  
DSCC FORM 2234  
APR 97  
4.3.2 Groups C and D inspections.  
a. End-point electrical parameters shall be as specified in table II herein.  
b. Steady-state life test conditions, method 1005 of MIL-STD-883.  
(1) Test condition C or D. The test circuit shall be maintained by the manufacturer under document revision level  
control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify  
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test  
method 1005 of MIL-STD-883.  
(2) TA = +125 C, minimum.  
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.  
TABLE II. Electrical test requirements.  
MIL-STD-883 test requirements  
Subgroups (per method 5005, table I)  
- - -  
Interim electrical parameters (method 5004)  
Final electrical test parameters  
(method 5004)  
1*, 2, 3, 7*, 8A, 8B, 9, 10, 11  
1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11  
Group A test requirements (method 5005)  
Groups C and D end-point electrical  
parameters (method 5005)  
2, 3, 7, 8A, 8B  
* Indicates PDA applies to subgroups 1 and 7.  
** See 4.3.1c.  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for government microcircuit applications  
(original equipment), design applications, and logistics purposes.  
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-  
prepared specification or drawing.  
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for  
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.  
6.4 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application  
requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list  
will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices  
(FSC 5962) should contact DSCC-VA, telephone (614) 692-0525.  
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone 614-  
692-0674.  
6.6 Approved source of supply. An approved source of supply is listed herein. Additional sources will be added as they  
become available. The vendor listed herein has agreed to this drawing and a certificate of compliance (see 3.6 herein ) has  
been submitted to DSCC-VA.  
SIZE  
STANDARD  
5962-89567  
A
MICROCIRCUIT DRAWING  
REVISION LEVEL  
A
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
18  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING BULLETIN  
DATE: 01-01-30  
Approved sources of supply for SMD 5962-89536 are listed below for immediate acquisition information only and  
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be  
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a  
certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next  
dated revision of MIL-HDBK-103 and QML-38535.  
Standard microcircuit 1/  
drawing PIN  
Vendor  
CAGE number  
Vendor  
similar PIN 2/  
5962-8953601XA  
5962-8953601YA  
5962-8953601ZA  
61772 4/  
3/  
IDT7203L120DB  
IDT7203L120XEB  
IDT7203L120LB  
61772 4/  
5962-8953602XA  
5962-8953602YA  
5962-8953602ZA  
61772 4/  
3/  
IDT7203L80DB  
IDT7203L80XEB  
IDT7203L80LB  
61772 4/  
5962-8953603XA  
5962-8953603YA  
5962-8953603ZA  
61772 4/  
3/  
IDT7203L65DB  
IDT7203L65XEB  
IDT7203L65LB  
61772 4/  
5962-8953604XA  
5962-8953604YA  
5962-8953604ZA  
61772 4/  
3/  
IDT7203L50DB  
IDT7203L50XEB  
IDT7203L50LB  
61772 4/  
5962-8953605XA  
5962-8953605YA  
5962-8953605ZA  
61772  
3/  
IDT7203L40DB  
IDT7203L40XEB  
IDT7203L40LB  
61772  
1/ The lead finish shown for each PIN representing a hermetic package is the most  
readily available from the manufacturer listed for that part. If the desired lead finish  
is not listed contact the Vendor to determine its availability.  
2/ Caution. Do not use this number for item acquisition. Items acquired to this  
number may not satisfy the performance requirements of this drawing.  
3/ No longer available from an approved source.  
4/ Vendor has announced an end of life date of 10/29/2001 for these devices.  
Vendor CAGE  
number  
Vendor name  
and address  
61772  
Integrated Device Technology, Incorporated  
2975 Stender Way  
Santa Clara, CA 95054  
The information contained herein is disseminated for convenience only and the  
Government assumes no liability whatsoever for any inaccuracies in the  
information bulletin.  

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