TCM810 [TELCOM]

3-PIN UP RESET MONITORS; 3 -PIN UP RESET监听音箱
TCM810
型号: TCM810
厂家: TELCOM SEMICONDUCTOR, INC    TELCOM SEMICONDUCTOR, INC
描述:

3-PIN UP RESET MONITORS
3 -PIN UP RESET监听音箱

监视器
文件: 总4页 (文件大小:62K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PRELIMINARY INFORMATION  
5
TCM809  
TCM810  
3-PIN µP RESET MONITORS  
FEATURES  
GENERAL DESCRIPTION  
Precision VCC Monitor for 3.0V, 3.3V, 5.0V  
Nominal System V Supplies  
140msec Guaranteed Minimum RESET, RESET  
Output Duration  
The TCM809 and TCM810 are cost-effective system  
supervisor circuits designed to monitor VCC in digital sys-  
tems and provide a reset signal to the host processor when  
necessary. No external components are required.  
RESET Output Guaranteed to VCC = 1.0V (TCM809)  
The reset output is driven active within 20msec of V  
CC  
Low 17µA Supply Current  
VCC Transient Immunity  
Small SOT-23B-3 Package  
No External Components  
falling through the reset voltage threshold. Reset is main-  
tained active for a minimum of 140msec after VCC rises  
above the reset threshold. The TCM810 has an active-high  
reset output while the TCM809 has an active-low reset  
output. The output of the TCM809 is guaranteed valid down  
to VCC = 1V. Both devices are available in a  
SOT-23B-3 package.  
The TCM809/810 are optimized to reject fast transient  
glitches on the VCC line. Low supply current of 17µA  
(VCC = 3.3V) makes these devices suitable for battery  
powered applications.  
TYPICAL APPLICATIONS  
Computers  
Embedded Systems  
Battery Powered Equipment  
Critical µP Power Supply Monitoring  
TYPICAL OPERATING CIRCUIT  
ORDERING INFORMATION  
VCC  
Part No.  
Package  
Temp. Range  
T
CM809xENB  
SOT-23B-3  
SOT-23B-3  
– 40°C to +85°C  
– 40°C to +85°C  
VCC  
VCC  
TCM810xENB  
PROCESSOR  
NOTE: The "X" denotes a suffix for VCC threshold - see table below.  
RESET  
INPUT  
RESET  
TCM809  
Suffix  
Reset VCC Threshold (V)  
GND  
GND  
L
M
T
4.63  
4.38  
3.08  
2.93  
2.63  
S
R
PIN CONFIGURATION  
*SOT-23B-3  
1
GND  
V
TCM809xENB  
TCM810xENB  
3
CC  
RESET (RESET)  
2
NOTE: *SOT-23B-3 is equivalent to JEDEC (TO-236)  
** () is for TCM810  
TCM809/810-04 8/29/96  
TELCOM SEMICONDUCTOR, INC.  
5-15  
PRELIMINARY INFORMATION  
3-PIN µP RESET MONITORS  
TCM809  
TCM810  
Power Dissipation (TA 70°C)  
ABSOLUTE MAXIMUM RATINGS*  
SOT-23B-3 (derate 4mW/°C above +70°C) ...230mW  
Storage Temperature Range ................ – 65°C to +150°C  
Lead Temperature (Soldering, 10 sec) ................. +260°C  
*This is a stress rating only and functional operation of the device at these  
or any other conditions above those indicated in the operational sections of  
the specifications is not implied. Exposure to Absolute Maximum Rating  
Conditions for extended periods may affect device reliability.  
Supply Voltage (VCC to GND) ................................ +6.0V  
RESET, RESET ............................ – 0.3V to (VCC + 0.3V)  
Input Current, VCC.. ..................................................20mA  
Output Current, RESET, RESET .............................20mA  
dV/dt (VCC) .......................................................... 100V/µS  
Operating Temperature Range ............... – 40°C to +85°C  
ELECTRICAL CHARACTERISTICS: Vcc = 5V, TA = Operating Temperature Range unless otherwise noted.  
Symbol Parameter  
Test Conditions  
Min  
Typ  
Max  
Unit  
VCC Range  
TA = 0°C to +70°C  
TA = – 40°C to +85°C  
1.0  
1.2  
5.5  
5.5  
V
ICC  
Supply Current  
TCM8xxL/M: VCC < 5.5V  
TCM8xxR/S/T: VCC < 3.6V  
24  
17  
60  
50  
µA  
VTH  
Reset Threshold  
(Note 2)  
TCM8xxL: TA = +25°C  
TA = – 40°C to +85°C  
TCM8xxM: TA = +25°C  
TA = – 40°C to +85°C  
TCM8xxT: TA = +25°C  
TA = – 40°C to +85°C  
TCM8xxS: TA = +25°C  
TA = – 40°C to +85°C  
TCM8xxR: TA = +25°C  
TA = – 40°C to +85°C  
4.56  
4.50  
4.31  
4.25  
3.04  
3.00  
2.89  
2.85  
2.59  
2.55  
4.63  
4.38  
3.08  
2.93  
4.70  
4.75  
4.45  
4.50  
3.11  
3.15  
2.96  
3.00  
2.66  
2.70  
V
2.63  
Reset Threshold Tempco  
VCC to Reset Delay  
30  
ppm/°C  
(Note 2)  
VCC = VTH to (VTH – 100mV)  
20  
µsec  
msec  
V
Reset Active Timeout Period  
140  
240  
560  
VOL  
RESET Output Voltage Low  
(TCM809)  
TCM809R/S/T: VCC = VTH min, ISINK = 1.2mA  
TCM809L/M: VCC = VTH min, ISINK = 3.2mA  
VCC > 1.0V, ISINK = 50µA  
0.3  
0.4  
0.3  
VOH  
VOL  
RESET Output Voltage High  
(TCM809)  
TCM809R/S/T: VCC > VTH max, ISOURCE = 500µA  
TCM809L/M: VCC > VTH max, ISOURCE = 800µA VCC – 1.5  
0.8 VCC  
V
V
V
RESET Output Voltage Low  
(TCM810)  
T
T
CM810R/S/T: VCC = VTH max, ISINK = 1.2mA  
CM810L/M: VCC = VTH max, ISINK = 3.2mA  
0.3  
0.4  
VOH  
RESET Output Voltage High  
(TCM810)  
1.8 < VCC < VTH min, ISOURCE = 150µA  
0.8 VCC  
NOTES:  
1. Production testing done at TA = +25°C, over temperature limits guaranteed by design.  
2. RESET output for TCM809, RESET Output for TCM810.  
PIN DESCRIPTION  
Pin No.  
(SOT-23B-3)  
Symbol  
Description  
1
2
GND  
Ground  
RESET (TCM809)  
RESET output remains low while VCC is below the reset voltage threshold, and  
for 240msec (140msec min.) after VCC rises above reset threshold.  
2
RESET (TCM810)  
VCC  
RESET output remains high while VCC is below the reset voltage threshold,  
and for 240msec (140msec min.) after VCC rises above reset threshold.  
3
Supply voltage (Typ. +3.0V to +5.0V)  
5-16  
TELCOM SEMICONDUCTOR, INC.  
PRELIMINARY INFORMATION  
3-PIN µP RESET MONITORS  
5
TCM809  
TCM810  
APPLICATIONS INFORMATION  
VCC Transient Rejection  
valid to VCC = 0V, a pull-down resistor must be connected  
fromRESETtogroundtodischarge straycapacitancesand  
hold the output low (Figure 2). This resistor value, though  
not critical, should be chosen such that it does not apprecia-  
bly load RESET under normal operation (100kwill be  
suitableformostapplications).Similarly,apull-upresistorto  
VCC is required for the TCM810 to ensure a valid high  
RESET for VCC below 1.0V.  
The TCM809/810 provides accurate VCC monitoring  
and reset timing during power-up, power-down, and brown-  
out/sag conditions, and rejects negative-going transients  
(glitches) on the power supply line. Figure 1 shows the  
maximum transient duration vs. maximum negative excur-  
sion (overdrive) for glitch rejection. Any combination of  
duration and overdrive which lies under the curve will not  
generate a reset signal. Combinations above the curve are  
detectedasabrownoutorpower-down. Transientimmunity  
can be improved by adding a capacitor in close proximity to  
the VCC pin of the TCM809/810.  
VCC  
VCC  
TCM809  
RESET  
V
CC  
V
TH  
R1  
100k  
Overdrive  
GND  
Duration  
Figure 2. Ensuring RESET Valid to VCC = 0V  
Processors With Bidirectional I/O Pins  
400  
T
= +25°C  
A
Some µP's (such as Motorola 68HC11) have bidirec-  
tional reset pins. Depending on the current drive capability  
of the processor pin, an indeterminate logic level may result  
if there is a logic conflict. This can be avoided by adding a  
4.7k resistor in series with the output of the TCM809/810  
(Figure 3). If there are other components in the system  
which require a reset signal, they should be buffered so as  
not to load the reset line. If the other components are  
required to follow the reset I/O of the µP, the buffer should  
be connected as shown with the solid line.  
320  
240  
160  
TCM8xxLM  
80  
0
TCM8xxR/S/T  
10  
BUFFERED RESET  
TO OTHER SYSTEM  
COMPONENTS  
1
1000  
100  
BUFFER  
RESET COMPARATOR OVERDRIVE,  
(V - V (mV)  
TH  
CC  
VCC  
Figure 1. Maximum Transient Duration vs.  
VCC  
µP  
RESET  
VCC  
Overdrive for Glitch Rejection at 25°C  
TCM809  
4.7k  
RESET Signal Integrity During Power-Down  
RESET  
The TCM809 RESET output is valid to VCC = 1.0V.  
Below this voltage the output becomes an "open circuit" and  
does not sink current. This means CMOS logic inputs to the  
µP will be floating at an undetermined voltage. Most digital  
systems are completely shutdown well above this voltage.  
However, in situations where RESET must be maintained  
GND  
GND  
Figure 3. Interfacing to Bidirectional Reset I/O  
TELCOM SEMICONDUCTOR, INC.  
5-17  
PRELIMINARY INFORMATION  
3-PIN µP RESET MONITORS  
TCM809  
TCM810  
TYPICAL CHARACTERISTICS  
Supply Current vs.Temperature  
(No Load, TCM8xxR/S/T)  
Supply Current vs.Temperature  
(No Load, TCM8xxL/M)  
30  
25  
20  
35  
30  
V
= 5V  
= 3V  
CC  
V
= 5V  
= 3V  
CC  
25  
20  
15  
10  
5
V
V
CC  
CC  
15  
10  
V
= 1V  
5
0
CC  
V
= 1V  
CC  
0
0
0
–40  
–20  
40  
60  
–40  
–20  
40  
TEMPERATURE (°C)  
60  
20  
20  
85  
85  
TEMPERATURE (°C)  
Power-Down Reset Delay vs. Temperature  
(TCM8xxR/S/T)  
Power-Down Reset Delay vs. Temperature  
(TCM8xxL/M)  
100  
80  
140  
120  
100  
80  
V
V
= VTH – V  
= 10mV  
V
V
= V  
– V  
TH CC  
OD  
OD  
CC  
OD  
OD  
= 10mV  
60  
V
= 20mV  
OD  
V
= 20mV  
OD  
60  
40  
40  
V
V
= 100mV  
20  
0
V
= 100mV  
OD  
OD  
OD  
OD  
20  
0
V
= 200mV  
60  
= 200mV  
60  
0
0
–40  
–20  
40  
–40  
–20  
40  
20  
20  
85  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Normalized Reset Threshold vs. Temperature  
Power-Up Reset Timeout vs. Temperature  
1.003  
1.002  
1.001  
250  
245  
240  
235  
TCM8xxL/M  
1.000  
0.999  
TCM8xxR/S/T  
230  
0.998  
0.997  
225  
0
–40  
–20  
40  
60  
20  
85  
0
–40  
–20  
40  
TEMPERATURE (°C)  
60  
20  
85  
TEMPERATURE (°C)  
5-18  
TELCOM SEMICONDUCTOR, INC.  

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