IQ65033QMA10EYF-G [SYNQOR]
Quarter-Brick ATCA Power Interface Module; 四分之一砖ATCA电源接口模块
| 型号： | IQ65033QMA10EYF-G |
| 厂家： | 
SYNQOR WORLDWIDE HEADQUARTERS |
| 描述： | Quarter-Brick ATCA Power Interface Module |
| 文件： | 总15页 (文件大小：1188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Technical
Specification
IQ65033QMA10
36-75V @ 10 A
3.3 V & 5.0 V
MGMT Power
Quarter-Brick ATCA
Power Interface Module
Input/Output
™
The IQ65033QMA10 iQor Power Interface Module
integrates all features required by the AdvancedTCA
Base Specification into a Quarter-Brick footprint. The
iQor offers industry leading external hold-up capacitor
volumetric density for a compact overall solution. At
a 90V hold-up capacitor voltage (trimmable 50-95 V),
only 564 µF is required to achieve 8.70ms hold-up time
at 200Win. The -48 V output voltage is conditioned for
smooth operation through severe input transient events.
The iQor is designed thermally and electrically to drive
high power wide-range-input DC/DC converters such as
the 300 W SynQor PQ60120QEA25. RoHS Compliant see
last page.
Operational Features
IQ65033QMA10 Module
•ꢀ InputꢀORingꢀforꢀAꢀ&ꢀBꢀpowerꢀfeedsꢀ(MOSFET-basedꢀforꢀ
low power dissipation)
•ꢀ Hotꢀswapꢀcontrolꢀwithꢀseamlessꢀride-throughꢀofꢀinputꢀ
voltage transient
•ꢀ EMIꢀfilterꢀmeetsꢀCISPRꢀ22ꢀClassꢀBꢀwhenꢀusedꢀasꢀdirectedꢀ
(see applications section)
•ꢀ Externalꢀhold-upꢀcapacitorꢀtrimmableꢀfromꢀ50-95ꢀV
•ꢀ Automaticꢀdischargeꢀofꢀexternalꢀhold-upꢀcapacitor
•ꢀ Isolatedꢀmanagementꢀpowerꢀofꢀ3.3ꢀVꢀatꢀ3.6ꢀAꢀandꢀ5.0ꢀVꢀ
at 150 mA
Protection Features
•ꢀ Managementꢀpowerꢀover-voltageꢀprotection
•ꢀ Managementꢀpowerꢀover-currentꢀprotection
•ꢀ Mainꢀoutputꢀover-currentꢀprotection
•ꢀ Thermalꢀshutdownꢀprotectsꢀtheꢀunitꢀfromꢀabnormalꢀ
environmental conditions
•ꢀ Dualꢀinputꢀsideꢀenable
•ꢀ Inputꢀfuse/feedꢀlossꢀalarm
2
•ꢀ I C interface data reporting (optional)
Safety Features
Mechanical Features
•ꢀ 2250V,ꢀ30ꢀMΩꢀVRTN_A/BꢀtoꢀLOGIC_GNDꢀandꢀ
SHELF_GNDꢀisolation
•ꢀ Industryꢀstandardꢀquarter-brickꢀsize:ꢀ1.45"ꢀxꢀ2.3"ꢀ
(36.8x58.4 mm)
•ꢀ UL/cULꢀ60950-1ꢀrecognizedꢀ(USꢀ&ꢀCanada),ꢀbasicꢀ
insulation rating
•ꢀ Overallꢀheightꢀofꢀ0.54"ꢀ(13.7ꢀmm),ꢀpermitsꢀbetterꢀairflowꢀ
and smaller card pitch
•ꢀ TUVꢀcertifiedꢀtoꢀEN60950-1
•ꢀ Totalꢀweight:ꢀ1.2ꢀozꢀ(34ꢀg)
•ꢀ Meetsꢀ72/23/EECꢀandꢀ93/68/EECꢀdirectivesꢀwhichꢀ
facilitates CE Marking in user’s end product
•ꢀ Flangedꢀpinsꢀdesignedꢀtoꢀpermitꢀsurfaceꢀmountꢀsolderingꢀ
(avoid wave solder) using FPiP technique
•ꢀ BoardꢀandꢀplasticꢀcomponentsꢀmeetꢀUL94V-0ꢀ
flammability requirements
•ꢀ Externalꢀhold-upꢀcapacitorꢀfootprintꢀmuchꢀsmallerꢀthanꢀ
other solutions currently available on the market
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 1
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
MECHANICAL DIAGRAM
Top View
2.30
(58.42)
0.100
(2.54)
0.150 0.150 0.150
(3.81) (3.81) (3.81)
0.950 (24.13)
1
18 17 16 15
14
0.200
(5.08)
2
0.150
(3.81)
13
0.200
(5.08)
3
12
11
1.45 0.200
(36.83) (5.08)
4
0.200
(5.08)
5
10
9
0.200
(5.08)
6
0.225
(5.72)
7
8
0.150
(3.81)
2.00
(50.8)
Bottom side
Clearance
0.064 ±0.028
(1.63 ±0.71)
Side View
Overall
Height
0.54 (13.7)
1.45
See Note 2
(36.83)
Flanged Pin
See Note 8
Lowest
Component
Load Board
PIN DESIGNATIONS
NOTES
Pin No. Name
Function
1) All Pins are 0.040" (1.02 mm) diameter with 0.080" (2.03 mm)
diameter standoff shoulders.
1
2
3
4
5
-48V_A
-48V_B
VRTN_A
VRTN_B
Negative A Feed (Externally Fused)
Negative B Feed (Externally Fused)
Positive A Feed (Externally Fused)
Positive B Feed (Externally Fused)
2) Other pin extension lengths available. Recommended pin
length is 0.03" (0.76 mm) greater than the PCB thickness.
ENABLE_A
Enable A Input (Externally Fused)
(Short Pin Tied to VRTN_A on Backplane)
Enable B Input (Externally Fused)
(Short Pin Tied to VRTN_B on Backplane)
Shelf Ground
3) All Pins: Material - Copper Alloy
Finish - Matte Tin over Nickel plate
4) Undimensioned components are shown for visual reference only.
5) All dimensions in inches (mm)
Tolerances: x.xx +0.02" (x.x +0.5 mm)
x.xxx +0.010" (x.xx +0.25 mm)
6) Weight: 1.2 oz (34 g) typical
6
ENABLE_B
7
8
SHELF_GND
5.0V
5.0V (Relative to LOGIC_GND)
3.3V (Relative to LOGIC_GND)
9
3.3V
2
10
I2C_ADR
I C Address Input *
(Connect External Resistor to LOGIC_GND) **
I C Data (Relative to LOGIC_GND) *
7) Workmanship: Meets or exceeds IPC-A-610C Class II
2
11
12
13
14
I2C_DAT
I2C_CLK
8) The flanged pins are designed to permit surface mount soldering
(allowing to avoid the wave soldering process) through the use of
the flanged pin-in-paste technique.
2
I C Clock (Relative to LOGIC_GND) *
LOGIC_GND
ALARM
Logic Ground
Isolated A/B Feed Loss or Open Fuse Alarm
(Relative to LOGIC_GND)
15
16
-48V_OUT
HU_TRIM
Negative Output to Payload Power Converter
Hold-Up Voltage Trim
(Connect External Resistor to -48V_OUT)
Positive Output to Payload Power Converter
Positive Connection to Hold-Up Capacitor
(Negative Connection to -48V_OUT)
* Pins 10, 11, and 12 are only available on the full feature version.
See the ordering page for more information.
17
18
VRTN_OUT
HU_CAP
** Single resistor connected externally to LOGIC_GND selects the three
2
least significant bits of I C Address “0101xxx”.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 2
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
IQ65033QMA10 ELECTRICAL CHARACTERISTICS
Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC.
Parameter
\
Min.
Typ.
Max.
Units Notes & Conditions
ABSOLUTE MAXIMUM RATINGS
Input Voltage
Continuous
Transient
Reverse Polarity
-75
-100
+75
V
V
V
Limited by internal TVS zener diode
1ms transient, square wave
No damage, low current, output diode clamped
Isolation Voltage
(VRTN_A/B to LOGIC_GND)
(VRTN_A/B to SHELF_GND)
Operating Temperature
2250
2250
100
125
100
V
V
°C
°C
V
-40
-55
Subject to thermal derating; see Figures 1 & 3
Subject to the Threshold Protocol used
Storage Temperature
Hold-up Capacitor Voltage (Relative to -48V_OUT)
-48V DUAL FEED INPUT CHARACTERISTICS
Input Voltage Range
-34
-48
-75
10
10
30
22
V
A
mA
mA
µF
W
Operating Current
25ºC 950 LFM, Vin = -48V; see Figure
1
Disabled Input Current below Turn-Off Threshold
Enabled No-Load Input Current
Internal Input Filter Capacitance (Not Hot-Swapped)
Recommended EARLY_A/B Resistors
Recommended Input Fuses
3.3V ISOLATED MANAGEMENT POWER
Startup Delay
8
21
18
100
Vin = -48V
Should be precharged by resistors to EARLY_A/B pins
Surge rated 2010 case size (KOA SG73 series or equiv.)
15
0.50
20
A
Time from ENABLE_A/B to 3.3/5.0Vout
0% to 90%; see Figure 10
At 36Vin
At 48Vin
At 75Vin
0.43
0.31
0.20
5
s
s
s
0.15
1
Turn-On Rise Time
ms
Input Under-Voltage Lockout
Turn-On Voltage Threshold (ATCA)
Turn-Off Voltage Threshold (ATCA)
Turn-On Voltage Threshold (NEDS)
Turn-Off Voltage Threshold (NEDS)
Turn-On Voltage Threshold (ETSI)
Turn-Off Voltage Threshold (ETSI)
Total Output Voltage Range
Output Voltage Ripple and Noise
Peak-to-Peak
-33.5
-32.0
-33.5
-32.0
-25.5
-24.0
3.170
-34.5
-34.0
-34.5
-34.0
-26.5
-26.0
3.350
-36.0
-35.5
-36.0
-35.5
-28.0
-27.5
3.430
V
V
V
V
V
V
V
At Mangement Power Converter input; see Figure A
“
“
“
“ ; overriden by enable
“ ; overriden by enable
Including line, load, sample, life, and temp
See Figure 12
Full load, 10µF ceramic, 500MHz bandwidth
“
40
16
75
30
3.6
6.9
mV
mV
A
A
V
ms
mA
µF
kHz
V
RMS
Operating Output Current Range
Output DC Current-Limit Inception
Current Limit Shutdown Voltage
Hiccup Mode Restart Time
Back-Drive Current
0
3.9
Subject to thermal derating; see Figures 1 & 3
5.4
1.5
130
Initiates hiccup mode
Vin = -48V
Negative current drawn from output source
10
1000
240
Maximum Output Capacitance
Switching Frequency
200
4.10
220
4.33
Management power converter
Over-Voltage Protection Setpoint
5.0V POWER (Derived From 3.3V Converter)
Total Output Voltage Range
Operating Output Current Range
Short Circuit Current
4.55
4.80 1
0
5.00
400
5.20
150
V
Including line, load, sample, life, and temp
mA
mA
mA
µF
Independent Thermal Protection
Negative current drawn from output source
Back-Drive Current
1
1000
Maximum Output Capacitance
TEMPERATURE LIMITS FOR POWER DERATING CURVES
Semiconductor Junction Temperature
Board Temperature
125
125
125
°C
°C
°C
Package rated to 150°C
UL rated max operating temp 130°C
See Figure 3 for derating curve
Transformer Temperature
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 3
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
IQ65033QMA10 ELECTRICAL CHARACTERISTICS (Continued)
Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC.
Parameter\
Min.
Typ.
Max.
Units Notes & Conditions
DUAL ENABLE INPUT CHARACTERISTICS
ENABLE_A/B Threshold
V
ATCA
NEDS (ON\OFF)
ETSI
26.0
28.5
31.0
V
V
V
At input feed voltage -48V_A/B; see Figure A
40.0\36.0 42.5\39.0 45.0\42.0
“
“
32.0
34.0
36.0
0.36
Current Drain per Enable Pin (Vin = -75V)
-48V OUTPUT
mA
Efficiency
No load on 3.3V/5.0V outputs, Vin = -48V
300W Output Power
200W Output Power
97.7
98.0
98.2
98.5
120
100
200
250
17.5
40
Equivalent Resistance From Input Feed
Recommended External Output Filter Capacitance
Hot-Swap Startup Ramp dV/dt
Output Voltage Delay
Input Current Limit (Turns Off Hot-Swap Momentarily)
Input dV/dt Limit (Turns Off Hot-Swap Momentarily)
Short Circuit Duration to Initiate Hiccup Mode
Restart Time in Hiccup Mode
INPUT ORING
200
270
250
650
20
mW
µF
V/s
ms
A
80
150
See Note 2
No load; depends on external cap.; see Figure 5
Hold-up still active
“
15
V/ms
ms
2
2.0
1.8
2.2
s
ORing MOSFET Turn On Current
ORing MOSFET Turn Off Current
ORing MOSFET Current Hysteresis
Turn On Time
0.4
0.1
0.3
1.0
0.4
0.6
600
0.25
2.4
1.1
1.3
A
A
A
µs
µs
Turn Off Time
HOLD-UP CAPACITOR INTERFACE
Hold-up Capacitor Trim Range
Hold-up Capacitor Charge Accuracy
External Hold-up Voltage Trim Resistor Power Dissipation
Hold-up Capacitor Charge Current
Switching Frequency
50
87.2
90
90.0
95
92.8
160
V
V
µW
mA
KHz
Can be set either above or below input voltage
2.49kΩ external trim resistance, 1% 100ppm/ºC
40
450
405
495
Hold-up power converter
-48V_OUT Threshold
See Note 3
To Arm Hold-up (ATCA/NEDS options)
To Initiate Hold-up (ATCA/NEDS)
To Arm Hold-up Connect (ETSI)
To Initiate Hold-up Connect (ETSI)
dV/dt on Hold-up Connect
-36.9
-36.4
-32.4
-32.4
-38.9
-38.5
-34.5
-34.5
80
-40.9
-40.4
-36.4
-36.4
V
V
V
V
At VRTN_OUT w.r.t. -48V_OUT; see Figure A
“
“
“
V/ms
Duration of Hold-up Connect
Delay Before Hold-up Connect is (Re)Armed
Hold-up Capacitor Discharge Resistance
Maximum Hold-up Capacitance
ISOLATED ALARM OUTPUT (ALARM = HIZ)5
Input A/B Feed Voltage Alarm Threshold
Open Circuit Voltage
On-State Voltage
On-State Transistor Collector Current
Off-State Transistor Collector Current
0.1
2
1.65
s
s
kΩ
See Note 4
48V output still enabled
1.55
36.4
1.75
3300
µF
Yields 55ms (200 W at 90 V cap charge)
At input feed voltage -48V_A/B; see Figure A
At 50mA
38.4
40
0.2
50
1
40.4
V
0.4
mA
µA
V
V
Note 1: If the 5.0 V load current exceeds 100 mA, up to 200 mV of additional voltage drop is possible on the 5.0 V output.
Note 2: Maximum DC load at startup is 50 mA. Full load can be applied 700 ms after enable or 400 ms after the management power is up and running.
Note 3: Hold-up operation with Vin < 43 V not required by ATCA specification.
Note 4: 48 V output does not recover after hold-up event unless input is above Arm Hold-up threshold.
Note 5: Does not inhibit 48 V output and is non-latching.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 4
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
IQ65033QMA10 ELECTRICAL CHARACTERISTICS (Continued)
Specifications subject to change without notice. Specifications in bold are guaranteed by design over the temperature range -40º to 125ºC.
Parameter
P
Min.
Typ.
Max.
Units Notes & Conditions
I2C DATA REPORTING INTERFACE
Maximum Clock Rate
Measurement Error
100
400
kHz
Clock stretching happens at the maximum rate
Feed Voltage A/B
Holdup Voltage
-48V_OUT Current
Temperature
+3
+3
+3
+3
%
%
%
°C
OVER-TEMPERATURE PROTECTION
Shutdown Point
Restart Hysteresis
135
10
°C
°C
Does not shut down Management Power
Automatic restart
RELIABILITY CHARACTERISTICS
Calculated MTBF (Telcordia)
Calculated MTBF (MIL-217)
Field Demonstrated MTBF
6
o
o
3.6
3.27
10 Hrs. TR-NWT-000332; 80% load,300LFM, 40 C T
a
6
10 Hrs. MIL-HDBK-217F; 80% load, 300LFM, 40 C T
a
6
10 Hrs. See website for details
STANDARDS COMPLIANCE
Parameter
P
Notes
STANDARDS COMPLIANCE
UL/cUL 60950-1
File # E194341, Basic insulation & pollution degree 2
Certified by TUV
EN60950-1
72/23/EEC
93/68/EEC
Needle Flame Test (IEC 695-2-2)
IEC 61000-4-2
Test on entire assembly; board & plastic components UL94V-0 compliant
ESD test, 8kV - NP, 15kV air - NP (Normal Performance)
GR-1089-CORE
Section 7 - electrical safety, Section 9 - bonding/grounding
Telcordia (Bellcore) GR-513
•
An external input fuse must always be used to meet these safety requirements. Contact SynQor for official safety
certificates on new releases or download from the SynQor website.
QUALIFICATION TESTING
Parameter
P
# Units Test Conditions
QUALIFICATION TESTING
Life Test
32
95% rated Vin and load, units at derating point, 1000 hours
Vibration
5
10-55Hz sweep, 0.060” total excursion,1 min./sweep, 120 sweeps for 3 axes
100g minimum, 2 drops in x and y axis, 1 drop in z axis
-40°C to 100°C, unit temp. ramp 15°C/min., 500 cycles
Toperating = min to max, Vin = min to max, full load, 100 cycles
Tmin-10°C to Tmax+10°C, 5°C steps, Vin = min to max, 0-105% load
85°C, 85% RH, 1000 hours, 2 minutes on and 6 hours off
MIL-STD-883, method 2003
Mechanical Shock
Temperature Cycling
Power/Thermal Cycling
Design Marginality
Humidity
5
10
5
5
5
Solderability
15 pins
•
Extensive characterization testing of all SynQor products and manufacturing processes is performed to ensure that we supply
robust, reliable product. Contact the factory for official product family qualification documents.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 5
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
10
9
8
7
6
400 LFM (2.0 m/s)
300 LFM (1.5 m/s)
200 LFM (1.0 m/s)
100 LFM (0.5 m/s)
5
4
3
10
25
40
55
70
85
Ambient Air Temperature (°C)
Figure 1: -48V output (maximum power) derating curves vs. ambient air tem-
perature for airflow rates of 100 LFM through 400 LFM with air flowing across
the converter from pin 7 to pin 1 (48 Vin, 3.3V mgmt power output @ 1.5 A).
Figure 2: Thermal plot of converter at 6.2A load current from -48V out-
put (298W) with 55 C air flowing at the rate of 200 LFM. Air is flowing
across the converter from pin 7 to pin 1 (48 Vin, 3.3V output @ 1.5 A).
°
4.0
3.5
3.0
2.5
2.0
400 LFM (2.0 m/s)
300 LFM (1.5 m/s)
1.5
1.0
200 LFM (1.0 m/s)
100 LFM (0.5 m/s)
10
25
40
55
70
85
Ambient Air Temperature (°C)
Figure 3: 3.3V output (maximum power) derating curves vs. ambient air tem-
perature for airflow rates of 100 LFM through 400 LFM with air flowing across
the converter from pin 7 to pin 1 (48 Vin, main output power output @ 4 A).
Figure 4: Thermal plot of converter at 2.9A load current from 3.3V out-
put (9.6W) with 55°C air flowing at the rate of 200 LFM. Air is flowing
across the converter from pin 7 to pin 1 (48 Vin, -48V output @ 4 A).
Figure 5: 48V hot-swap turn-on transient (100uF electrolytic filter
capacitor CF). Top trace: VRTN_OUT w.r.t. -48V_OUT (20V/div),
Bottom trace: Input Feed Current (2A/div).
Figure 6: 8.70ms zero volt transient (564uF electrolytic hold-up capaci-
tor CH, 100uF electrolytic filter capacitor CF). Ch 1: Input Feed A/B
Voltage (20V/div). Ch 2: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 3:
HU_CAP w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT (200mV/div).
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 6
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
Figure 7: Instantaneous input transient from 48V Feed A to 60V Feed B.
Ch 1: Input Feed A Voltage (20V/div). Ch 2: Input Feed B Voltage (20V/
div). Ch 3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4: 3.3V_OUT
(200mV/div).
Figure 8: Inductive Switching event on Feed A from 48V to 0V to TVS
Zener clamping voltage. No load on -48V output. Ch1: Input Feed A
Voltage (20V/div). Ch3: VRTN_OUT w.r.t. -48V_OUT (20V/div). Ch 4:
3.3V_OUT (50mV/div).
8
7
6
5
4
3
2
36 Vin
48 Vin
1
75 Vin
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Load Current (A)
Figure 9: Power dissipation vs. 3.3V load current with hot-swap switch
enabled.
Figure 10: Management Power turn on transient at 50% load (4ms/div).
Load capacitance: 10uF ceramic capacitor. Ch 2: 3.3Vout (1V/div). Ch
3: 5.0Vout (1V/div).
Figure 11: 3.3Vout response to a step-change in load current (50%-
75%-50% of Iout(max): dI/dt = 1A/us). Load capacitance: 10uF ceramic
capacitor. Top trace: 3.3Vout (500mV/div). Bottom trace: Iout (1A/
div).
Figure 12: 3.3Vout ripple at nominal input voltage at rated load current
(20mV/div). Load capacitance: 10uF ceramic capacitor. Bandwidth:
500MHz.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 7
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
ENABLE_A
HU_CAP
5
18
ENABLE_B
6
Temp
sense
VRTN_A
3
Enable Logic
Hold-up
connect control
circuits
FET
control
E
F
dV/dt
sense
A
VRTN_B
VRTN_OUT
4
17
FET
control
E
Current-
B
Hot Swap
Control Logic
controlled hold-
up charging
converter
HU_TRIM
F
EMI Filter
-48_A
16
1
FET
control
-48V_OUT
C
15
-48_B
2
Dis-
charge
FET
control
Management
Power
converter
A
D
B
Isolation barrier
C
Monitoring
circuits
SHELF_GND
3.3V
8
7
D
9
E
F
5.0 V
11
12
14 13
10
Figure A: Internal Block Diagram
FEATURE DESCRIPTIONS
Input ORing MOSFETs: ORing of dual -48V feeds is provided External Input Fuse Failure Detection: At zero current, the
by four MOSFETs, which are individually controlled so as to oper- input ORing MOSFETs are guaranteed to be off. In the case of a
ate as an ideal diode (see Figure A). If there is an input feed short fuse failure, an on-board bleed resistor pulls the input feed voltage
of any kind, a control circuit will detect reverse current and turn down. This triggers the ALARM output due to an apparent input
off the MOSFET in 250ns (typ.), to avoid disturbing the other feed feed loss. There are two main down-sides to this approach. First,
voltage. At zero current, the MOSFET is guaranteed to be off. In there is no way to distinguish between a feed loss and a fuse fail-
the case of a fuse failure, this triggers the ALARM output, due to an ure. Second, an enable fuse loss is not detected, since the enables
apparent input feed loss. Current hysteresis prevents limit cycling are diode OR’d.
around the transition point between body diode and MOSFET
The full featured version of the iQor offers additional data report-
ing that makes full fuse detection possible. Among other data,
conduction.
ALARM Output: The ALARM pin gives an external indication each feed voltage and each enable voltage is reported through
of a fault condition. It is an isolated and buffered open-collector the I C port. These voltages can be compared with the voltages
2
output, which is normally pulled low. In the presence of an input reported by the shelf manager to determine whether any board
feed loss (which can be caused by a fuse failure), the ALARM out- fuse is blown.
put will be tri-stated.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 8
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
The iQor unit conditions the -48V output, providing for seam-
less ride-through of input voltage transients. If the positive dV/
dt of the input voltage is too high, the hot-swap switch will be
disabled and will immediately enter another soft-start sequence.
This limits the dV/dt seen on the -48V output, which prevents the
12V payload power converter from having such a large glitch
on its output that it shuts down. The -48V output hold-up function
remains active throughout, in case the hot-swap switch is forced
off for too long.
Input Enable: The ENABLE_A/B signals connect to VRTN_A/B
on the backplane via the shortest pins in the zone 1 connector.
They are the last pins to mate during board insertion, and the
first to disconnect during board extraction. The ENABLE_A and
ENABLE_B signals are diode-ORed together which lets either sig-
nal enable the module. Whenever both ENABLE pins are open,
the hot-swap switch is opened. This prevents -48V output power
from being drawn though the EARLY pre-charge resistors.
The ENABLE signals also control the management power. On
board insertion, the management power remains off until at least
one of ENABLE_A/B is connected. On board extraction, the
management power is disabled at the end of the 100ms hold-up
period, and remains off until ENABLE_A/B is reconnected. This
prevents the IPMI controller from reading an invalid hardware
address when a board is partially inserted. Management power
flows through the EARLY pre-charge resistors for a maximum of
100ms, which provides a margin similar to the pre-charge event
in terms of resistor safe-operating-area.
Passive Transient Suppression: Each input feed has a dedi-
cated internal bidirectional TVS zener diode, rated for a minimum
clamp voltage of 77.8V at 1mA. A TVS diode short due to electri-
cal overstress will not disable the iQor module: a fuse will open,
and the module can continue to run from the other feed.
External Hold-up Capacitor Charge: A current controlled
DC-DC converter charges the external hold-up capacitor to a volt-
age of 50V-95V, set by an external resistor. The charge voltage
can range either above or below the input feed voltage. Constant
current charging takes place whenever the hot-swap switch is
enabled.
EARLY Precharge Resistors: The EARLY_A/B signals connect
to the longest pins in the zone 1 power connector, and therefore
first to mate during board insertion. External resistors connected
between these signals and VRTN_A/B allow the relatively small
EMI filter capacitance to be pre-charged before the main power
pins make contact. A 100W surge rated 2010 case size resistor
is recommended (KOA SG73 series or equivalent).
Hold-up Capacitor Connect: When the hot-swap switch is
enabled, 2 seconds are allocated to charge the hold-up capaci-
tor. After this time, a comparator is armed, which connects the
hold-up capacitor to the -48V output should the output ever drop
below the given connect threshold. A current limit circuit protects
against damage during a short circuit condition. A dV/dt limit cir-
cuit regulates the hold-up connect switch turn-on speed. When the
comparator is tripped, the hold-up connect switch remains closed
for 100ms, is off for 2 seconds to allow the hold-up capacitor to
recharge, and then is automatically rearmed (if the output voltage
is above the given arm threshold).
Hot Swap - Thermal Shutdown: To protect the unit from
damage in an abnormal thermal environment, the hot-swap switch
will be disabled when the thermal sensor temperature rises above
the turn-off threshold. The switch will be automatically enabled
again when the temperature goes below the turn-on threshold.
The management power remains on during an over-temperature
condition.
Hold-up Capacitor Discharge: Whenever the hot-swap
switch is disabled, an internal resistor bank is connected across
the hold-up capacitor. This is intended to reduce the voltage on
the hold-up capacitor below 60V within 1 second.
The full featured version of the iQor reports the actual temperature
2
through the I C port.
Hot Swap - Over-Current Protection: If the -48V output
current rises above the current limit threshold, the hot-swap switch
will be disabled, and will immediately enter another soft-start
sequence. If an output short is detected, the hot-swap switch
will be disabled and will enter a hiccup mode of operation with
automatic restart.
Management Power:
An isolated management power
converter delivers both 3.3V and a low power 5.0V relative
to LOGIC_GND. Over-current protection operates in constant
current with a hiccup mode if the output voltage drops too far.
Output over-voltage circuitry is included with a redundant refer-
ence and optocoupler.
The full featured version of the iQor reports actual output current
2
through the I C port.
Hot Swap - Transient Suppression: Input transient events
can occur if there is a short on an adjacent board or backplane.
The short builds up a large current in the wiring inductance,
and when a fuse blows, the voltage behind the fuse spikes very
quickly. This can cause a loss of redundancy since many other
boards could be exposed to this spike.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 9
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
In the event of a gradual loss of input voltage (see Figure C), the
main -48V output will shut down 100ms after the beginning of
the hold-up event. The -48V output will enter a hiccup mode of
operation for input voltages below the Hold-up Arm Threshold.
Management power will continue to run until the input voltage
(plus 0V to 1.2V for the ORing MOSFETs) decays to the manage-
ment power under-voltage turn-off threshold.
Hot Swap – Shutdown Timing: In the event of a sudden loss
of input voltage (see Figure B), a hold-up event will be triggered.
When the output voltage (plus a diode drop for the hot-swap body
diode) decays to the management power under-voltage turn-off
threshold, the main -48V output and the 3.3V/5.0V outputs will
shut down simultaneously.
48V
Input voltage
0
Holdup time, tH
Holdup event
48V
0
39 V
typ.
(Depends
on version)
34.6 V
typ.
Payload output 48V
3.3V
0
Management power
Alarm
(Pull-up voltage lost)
0
Figure B: Sudden Loss of Input Power
48V
38.4 V
typ.
38.9 V
typ.
34.0
(Depends
on version)
Higher of A/B input feed voltages
RTN A/B - (-48V_A/B)
V
0
Holdup event
48V
Output is off after
delay if input
38.5 V
typical
(Depends
on version)
voltage doesn’t
recover above
38.9V typ.
-48V output voltage
VRTNOUT - (-48V_OUT)
100ms
0
Management power turned
3.3V
off at higher of ENABLE
threshold or MP UVLO.
Management power output
(3.3V) - LOGIC_GND
0
Alarm - (LOGIC_GND)
(Pullup voltage lost)
Figure C: Gradual Loss of Input Power
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05/04/09
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Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
EXTERNAL HOLD-UP CAPACITOR SELECTION
100
90
80
70
60
50
40
30
20
10
0
CH is the hold-up capacitance (electrolytic capacitors typically
have a 20% tolerance):
2tH PH
Equation A
CH
=
V²H – V²
U
43.0V
36.0V
41.0V
Typically a strong function of VH (see Figure D).
The ATCA specification requirement is 8.70ms (see Figure E).
Where:
VH = hold-up capacitor charge voltage.
VU = minimum operating voltage on the 48V output; the greater
of the under-voltage lockout threshold of the payload power
converter, and the under-voltage lockout threshold of the
management power converter.
0
1
2
3
4
5
6
7
8
9
10
8.70ms
Time (ms)
tH = time from when the highest input feed voltage drops below
VF, to the time when the highest input feed voltage rises
above VU.
VF = voltage at which the hold-up capacitor is engaged.
PH = power drawn from the hold-up capacitor, the sum of the input
power of the payload power converter, and the input power
of the 3.3V mgmt power converter (see Figure 9):
Figure E: The PICMG 3.0 R2.0 AdvancedTCA Base Specification
requires continuous operation through a zero-volt transient, lasting 5ms
(Section 4.1.2.2). However, this is not a square wave: the voltage starts
at a minimum amplitude of -43V, falls at 50V/ms, remains at 0V for
5ms, and then rises at 12.5V/ms. At the worst case values of the hold-up
connect threshold and the management power under-voltage lockout
threshold, the required hold-up time is 8.70ms.
P
Equation B
PH
=
OUT 12V + PIN 3.3V
η12V
EXTERNAL HOLD-UP CAPACITOR VOLTAGE RATING
POUT12V = output power delivered by the payload converter.
η12V = efficiency of the 12V payload converter.
Operating electrolytic capacitors near their voltage rating does
not significantly affect their reliability, as it does with tantalum
or ceramic type capacitors. The operating life of electrolytic
capacitors is primarily determined by the capacitor internal
temperature. The capacitor lifetime roughly doubles for every
10ºC reduction in internal temperature. SynQor recommends
running 100V rated electrolytic capacitors at 90V, which
dramatically increases hold-up time for a given capacitor volume
(see Figure D). A built-in circuit automatically discharges the
hold-up capacitor when the input voltage is removed.
PIN.3.3V = 3.3V input management converter power.
20
PH=200W
CF=100µF
VI=-43V
15
10
5
90V
80V
70V
0
300
400
500
600
700
800
900
1000
Hold-up Capacitance (µF)
Figure D: Hold-up Time (ms) vs. Hold-up Capacitance (µF) at
Hold-up Charge Voltages of 70V, 80V, and 90V (see Equation A).
The AdvancedTCA hold-up time requirement is at most 8.70ms (solid
horizontal line). The capacitor tolerance is not factored into this result.
Error bars indicate the worst case range of hold-up time for a given
hold-up capacitance.
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
Page 11
Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
EXTERNAL HOLD-UP TRIM RESISTOR SELECTION
100000
Rtrim is the external hold-up trim resistance for a given desired nomi-
nal hold-up capacitor charge voltage (VHU) (see Figure F):
500,000
Rtrim
=
– 10,000
Ω
Equation C
(
)
VHU – 50.0
10000
1000
50
60
70
80
90
100
Hold-up Charge Voltage (V)
Figure F: Plot of Equation C, used to choose the external trim resistor
value based on the desired Hold-up Capacitor charge voltage. Error
bars indicate the worst case range of charge voltage for a given exter-
nal trim resistor value (assumes 1%, 100ppm for external trim resistor
tolerance). Worst case calculation over temp range -40ºC to 125ºC.
* Shield plane should extend
under payload power
converter
Shield Plane*
Holdup capacitor
CH
12V
Payload
Power
100µF
100V
Converter
-48V A
Early A
PQ60120QEA25
(from IPM)
100Ohms
100Ohms
Alarm
-48V_A
-48V_B
ALARM
-48V B
Early B
LOGIC_GND
VRTN_A
VRTN_B
RTN 48V A
RTN 48V B
Enable A
I2C CLOCK
I2C DATA
I2C ADDRESS
SynQor
iQor
ATCA
Power Input Module
ENABLE_A
ENABLE_B
3.3 V
5.0V
3.3V to IPM
Blue LED bias
Enable B
Shelf Gnd
I2C interface on full-
featured version only
SHELF_GND
Figure G: Application Diagram
Product # IQ65033QMA10
Phone 1-888-567-9596
www.synqor.com
Doc.# 005-IQ5033S Rev. G
05/04/09
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Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
2
I C Protocol: Reading from any internal register of the iQor
monitorꢀrequiresꢀthatꢀanꢀinternalꢀ(pseudo)ꢀregister,ꢀData_Pointer,ꢀ
beꢀinitializedꢀpriorꢀtoꢀreadingꢀ(seeꢀFigureꢀH).
FULLꢀFEATUREꢀAPPLICATIONꢀNOTES
I2C Data Reporting Interface: Available on the full feature
version of the module, the iQor I2C Serial Interface monitors 5
analog parameters and 6 status bits. The actual analog parameter
values are calculated by multiplying by the specified scaling
factors (see Table 1). The status bits are interpreted in Table 2.
Theꢀinitialꢀvalueꢀofꢀallꢀregistersꢀisꢀzero.ꢀDataꢀinꢀtheꢀregistersꢀbeginsꢀ
updating 300 ms after management power startup, and continues
updating at approximately 100 ms intervals during steady-state
operation. All registers are updated simulatneously.
Data_Pointerꢀisꢀwrite-only.ꢀItꢀisꢀwrittenꢀfromꢀtheꢀsecondꢀbyteꢀofꢀ
2
2
any I C WRITE message (the first byte is the 7 bit I C Address
andꢀtheꢀR√Wꢀbit).ꢀꢀSubsequentꢀdataꢀbytesꢀinꢀaꢀWRITEꢀmessageꢀ
(3rdꢀByteꢀandꢀbeyond)ꢀonlyꢀincrementꢀData_Pointer.
Any READ message will return the value of the internal register
referencedꢀ byꢀ Data_Pointerꢀ andꢀ incrementsꢀ Data_Pointerꢀ byꢀ
one. For instance, if the master acknowledges (AK), the next
internalꢀ registerꢀ referencedꢀ byꢀ Data_Pointerꢀ willꢀ beꢀ returnedꢀ
andꢀ Data_Pointerꢀ willꢀ beꢀ incrementedꢀ byꢀ one.ꢀ Thisꢀ processꢀ isꢀ
repeatedꢀ untilꢀ theꢀ masterꢀ doesꢀ notꢀ acknowledgeꢀ (NACK)ꢀ andꢀ
issuesꢀaꢀSTOPꢀbit.
Data_Pointer
Value
Scaling
Factor
Parameter
Description
Digital Signals
(see Table 2)
1Eh
Status Bits
N/A
Data_Pointerꢀisꢀanꢀ8bitꢀvalue.ꢀItꢀisꢀinitializedꢀtoꢀ00hꢀatꢀreset,ꢀandꢀ
after reaching FFh, it will not overflow.
Voltage between HU_
CAP and -48V_OUT
1Fh
HU_CAP
0.398 V/bit
Writing to registers not defined in Table 1 has no effect. Reading
from these undefined registers will return 00h. In both cases
Data_Pointerꢀisꢀincremented.
21h
22h
-48V_Current -48V Output Current
0.094 A/bit
0.325 V/bit
Voltage between
-48V_A
VRTN_A and -48V_A
Voltage between
-48V_B
23h
28h
0.325 V/bit
VRTN_B and -48V_B
Average Unit
Temperature
(1.961 ºC/bit)
– 50 ºC
Temperature
Table 1: Internal register memory map.
Figure H: Typical I2C read transmission. Note: S = START, W =
WRITE, R = READ, AK = acknowledged, NACK = NOT acknowl-
edged, P = STOP. Clear boxes originate in the I2C Master and
shaded boxes originate in the I2C Slave.
Bit Name
Description Value
Translation
EN_A is Disabled
0
1
0
1
0
1
Enable A Signal
State
0
ENABLE_A
2
EN_A is Enabled
Example from the point of view of the I CꢀMaster:
EN_B is Disabled
Enable B Signal
State
1
ENABLE_B
1) START transmission.
2) Send 56h (addresses unit for writing, given address 56h was
selected as shown in Table 4).
3)ꢀSendꢀ22hꢀ(loadsꢀ22hꢀintoꢀData_Pointer).
4)ꢀSTOPꢀtransmission.
5) START next transmission.
6) Send 57h (addresses unit for reading).
7)ꢀUnitꢀwillꢀrespondꢀwithꢀtheꢀvalueꢀofꢀ-48V_Aꢀ(registerꢀ22hꢀasꢀ
shown in Table 1).
8)ꢀACKꢀ(Data_Pointerꢀisꢀautomaticallyꢀincrementedꢀtoꢀ23h).
9)ꢀUnitꢀwillꢀrespondꢀwithꢀtheꢀvalueꢀofꢀ-48V_Bꢀ(registerꢀ23h).
10)ꢀNACK.
EN_B is Enabled
Primary side Alarm is not SET
Primary side Alarm is SET
Alarm Signal
State
2
3
ALARM
N/A
Reserved
Holdup Cap is not connected
to -48V Out
0
1
Holdup Switch
State
4
5
HOLDUP
Holdup Cap is connected
to -48V Out
0
1
Hotswap switch is OFF
Hotswap switch is ON
Hotswap Switch
State
HOTSWAP
Output voltage is below
threshold
0
1
-48V Output
Under-Voltage
Alarm
VOUT_
LOW
11) Stop Transmission.
6
7
Output voltage is above
threshold
N/A
Reserved
Table 2: The status byte represents 6 different digital signals and
their digital state. Note: 1) Bit0 ⇒ LSb, Bit7 ⇒ MSb.
Product # IQ65033QMA10
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05/04/09
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Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
2
2
I2C Address structure:
I C Address selection:ꢀꢀTheꢀthreeꢀbitsꢀ(xyz)ꢀofꢀtheꢀI C Address
areꢀsetꢀwithꢀaꢀsingleꢀexternalꢀresistorꢀfromꢀtheꢀI2C_ADRꢀ(pinꢀ10)ꢀ
toꢀLOGIC_GNDꢀ(pinꢀ13).ꢀꢀTheꢀ8ꢀpossibleꢀaddressesꢀareꢀshownꢀinꢀ
Table 4 with the respective resistance values.
2
7 bit I CꢀAddressꢀ+ꢀR√Wꢀbit
Fourꢀbitsꢀareꢀfixedꢀ(0101),ꢀthreeꢀbitsꢀ(xyz)ꢀareꢀvariable,ꢀandꢀtheꢀ
least-significant bit is the read/write bit.
External programming resistances
for I2C address selection
2
8 bit I C Address
2
I C address for
write (R√W = 0)
xyz from Table 3
R (W)
0 1 0 1
x y z *
R√W
Table 3: I2C address structure.
5Eh
5Ch
5Ah
58h
56h
54h
52h
50h
2
111
110
101
100
011
010
001
000
Open
100000
40200
20000
10000
4020
2000
Short
Table 4: I C address selection.
Product # IQ65033QMA10
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Input:
Outputs:
Current:
Package:
36-75 V
5.0 V/ 3.3 V
10 A
Quarter-brick
Technical Specification
PART NUMBERING SYSTEM
ORDERING INFORMATION
The part numbering system for SynQor’s dc-dc converters
follows the format shown in the example below.
The tables below show the valid model numbers and ordering
options for converters in this product family. When ordering
SynQor converters, please ensure that you use the complete
15 character part number consisting of the 12 character base
part number and the additional 3 characters for options.
Addꢀ“-G”ꢀtoꢀtheꢀmodelꢀnumberꢀforꢀ6/6ꢀRoHSꢀcompliance.
IQ 65 033 Q M A 10 SNS - G
6/6 RoHS
Options (see
Ordering Information)
Output Current
36-75V Input/
Input
Voltage
MGMT
Power
Model Number
Output
Current
Thermal Design
Performance Level
Package Size
IQ65033QMA10xyz-G 36 - 75 V
5.0 V &
3.3 V
10 A
Output Voltage
Input Voltage
Product Family
The following options must be included in place of the x y z
spaces in the model numbers listed above.
The first 12 characters comprise the base part number and
theꢀ lastꢀ 3ꢀ charactersꢀ indicateꢀ availableꢀ options.ꢀ ꢀ Theꢀ “-G”ꢀ
suffix indicates 6/6 RoHS compliance.
Options Description: x y z
Threshold Protocols
Pin Style
Feature Set
K - 0.110"
N - 0.145"
R - 0.180"
Y - 0.250"
S - Standard (ATCA)
N - NEDS
S - Standard
F - Full Feature
Application Notes
E - ETSI
A variety of application notes and technical white papers can
be downloaded in pdf format from our website.
Notꢀ allꢀ combinationsꢀ makeꢀ validꢀ partꢀ numbers,ꢀ pleaseꢀ contactꢀ
SynQor for availability. See the Product Summary web page for
more options.
RoHS Compliance:ꢀTheꢀEUꢀledꢀRoHSꢀ(RestrictionꢀofꢀHazardousꢀ
Substances)ꢀDirectiveꢀbansꢀtheꢀuseꢀofꢀLead,ꢀCadmium,ꢀHexavalentꢀ
Chromium, Mercury, Polybrominated Biphenyls (PBB), and
Polybrominated Diphenyl Ether (PBDE) in Electrical and Electronic
Equipment. This SynQor product is 6/6 RoHS compliant. For
more information please refer to SynQor’s RoHS addendum
available at our RoHSꢀ Complianceꢀ /ꢀ Leadꢀ Freeꢀ Initiativeꢀ webꢀ
PATENTS
SynQor holds the following patents, one or more of which
might apply to this product:
page or e-mail us at rohs@synqor.com
.
5,999,417
6,594,159
6,927,987
7,119,524
6,222,742
6,731,520
7,050,309
7,269,034
6,545,890
6,894,468
7,072,190
7,272,021
6,577,109
6,896,526
7,085,146
7,272,023
Contact SynQor for further information:
Warranty
Phone:ꢀ 978-849-0600
Toll Free:ꢀ 888-567-9596
SynQor offers a three (3) year limited warranty. Complete warranty informa-
tion is listed on our website or is available upon request from SynQor.
Fax:ꢀ
E-mail:ꢀ power@synqor.com
Web:ꢀ www.synqor.com
978-849-0602
Information furnished by SynQor is believed to be accurate and reliable.
However, no responsibility is assumed by SynQor for its use, nor for any
infringements of patents or other rights of third parties which may result
fromꢀitsꢀuse.ꢀNoꢀlicenseꢀisꢀgrantedꢀbyꢀimplicationꢀorꢀotherwiseꢀunderꢀanyꢀ
patent or patent rights of SynQor.
Address:ꢀ 155ꢀSwansonꢀRoad
Boxborough, MA 01719
ꢀ
ꢀ
USA
Product # IQ65033QMA10
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Doc.# 005-IQ5033S Rev. G
05/04/09
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