HV9110NG [SUPERTEX]
High-Voltage Current-Mode PWM Controller; 高压电流模式PWM控制器
| 型号： | HV9110NG |
| 厂家： | 
Supertex, Inc |
| 描述： | High-Voltage Current-Mode PWM Controller |
| 文件： | 总7页 (文件大小：327K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HV9110
HV9112
HV9113
High-Voltage Current-Mode PWM Controller
Ordering Information
Package Options
14 Pin
+V
IN
Feedback
Max
14 Pin
20 Pin
Accuracy Duty Cycle
Die
Min
10V 120V
9.0V 80V
10V 120V
Max
Plastic DIP
Plastic PLCC Narrow Body SOIC
<
<
1%
2%
1%
49%
49%
99%
HV9110P
HV9112P
HV9113P
HV9110PJ
HV9112PJ
HV9113PJ
HV9110NG
HV9112NG
HV9113NG
HV9110X
HV9112X
HV9113X
Standard temperature range for all parts is industrial (-40° to +85°C).
Features
General Description
The Supertex HV9110 through HV9113 are a series of BiCMOS/
DMOS single-output, pulse width modulator ICs intended for use
in high-speed high-efficiency switchmode power supplies. They
provide all the functions necessary to implement a single-switch
current-mode PWM, in any topology, with a minimum of external
parts.
❏
❏
❏
❏
❏
❏
10 to 120V input range
Current-mode control
High efficiency
Up to 1.0MHz internal oscillator
Internal start-up circuit
Low internal noise
BecausetheyutilizeSupertex’sproprietaryBiCMOS/DMOStech-
nology, they require less than one tenth of the operating power of
conventional bipolar PWM ICs, and can operate at more than
twice their switching frequency. Dynamic range for regulation is
also increased, to approximately 8 times that of similar bipolar
parts. They start directly from any DC input voltages between 10
and 120VDC, requiring no external power resistor. The output
stage is push-pull CMOS and thus requires no clamping diodes
for protection, even when significant lead length exists between
the output and the external MOSFET. The clock frequency is set
with a single external resistor.
Applications
❏
❏
❏
❏
❏
DC/DC converters
Distributed power systems
ISDN equipment
PBX systems
Accessory functions are included to permit fast remote shutdown
(latching or nonlatching) and undervoltage shutdown.
Modems
For similar ICs intended to operate directly from up to 450VDC
input, please consult the data sheet for the HV9120/9123.
Absolute Maximum Ratings
+VIN, Input Voltage
HV9110/9113
120V
80V
HV9112
VDD, Logic Voltage
15.5V
Logic Linear Input, FB and
Sense Input Voltage
-0.3V to VDD+0.3V
-65°C to 150°C
750mW
Storage Temperature
Power Dissipation, SOIC
Power Dissipation, Plastic DIP
Power Dissipation PLCC
1000mW
1400mW
For detailed circuit and application information, please refer
to application notes AN-H13 and AN-H21 to AN-H24.
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
HV9110/HV9112/HV9113
Electrical Characteristics
(Unless otherwise specified, VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390KΩ, ROSC = 330KΩ,TA = 25°C.)
Symbol Parameters
Min
Typ
Max
Unit
Conditions
Reference
VREF
Output Voltage
HV9110/13
HV9112
3.92
3.88
3.82
4.00
4.00
4.00
4.08
4.12
4.16
V
RL = 10MΩ
HV9110/13
RL = 10MΩ,
TA = -55°C to 125°C
ZOUT
Output Impedance1
Short Circuit Current
15
30
45
KΩ
µA
ISHORT
∆VREF
125
0.25
250
VREF = -VIN
Change in VREF with Temperature1
mV/°C
TA = -55°C to 125°C
Oscillator
fMAX
Oscillator Frequency
1.0
80
3.0
100
200
MHz
KHz
ROSC = 0Ω
fOSC
Initial Accuracy2
120
240
15
ROSC = 330KΩ
160
ROSC = 150KΩ
Voltage Stability
%
9.5V < VDD <13.5V
Temperature Coefficient1
170
ppm/°C TA = -55°C to 125°C
PWM
DMAX
Maximum Duty Cycle1
HV9110/12
HV9113
49.0
95
49.4
97
49.6
99
%
Deadtime1
HV9113
225
nsec
%
DMIN
Minimum Duty Cycle
0
Minimum Pulse Width
80
125
nsec
Before Pulse Drops Out1
Current Limit
Maximum Input Signal
Delay to Output1
1.0
1.2
80
1.4
V
VFB = 0V
td
120
ns
VSENSE = 1.5V, VCOMP ≤ 2.0V
Error Amplifier
VFB
Feedback Voltage
HV9110/13
HV9112
3.96
3.92
4.00
4.00
25
4.04
4.08
500
V
VFB Shorted to Comp
IIN
Input Bias Current
nA
VFB = 4.0V
VOS
AVOL
GB
Input Offset Voltage
Open Loop Voltage Gain1
Unity Gain Bandwidth1
Output Impedance1
nulled during trim
except HV9111
60
80
1.3
dB
MHz
Ω
1.0
ZOUT
see Fig. 1
-2.0
ISOURCE Output Source Current
-1.4
mA
mA
dB
VFB = 3.4V
VFB = 4.5V
ISINK
Output Sink Current
0.12
0.15
PSRR
Power Supply Rejection1
see Fig. 2
Notes:
1. Guaranteed by design. Not subject to production test.
2. Stray capacitance on OSC In pin must be ≤5pF.
2
HV9110/HV9112/HV9113
Electrical Characteristics (continued)
(Unless otherwise specified, VDD = 10V, +VIN = 48V, Discharge = -VIN = 0V, RBIAS = 390KΩ, ROSC = 330KΩ,TA = 25°C.)
Symbol Parameters
Min
Typ
Max
Unit
Conditions
Pre-regulator/Startup
+VIN
Input Voltage
HV9110/13
HV9112
120
80
V
IIN < 10µA; VCC > 9.4V
+IIN
Input Leakage Current
10
µA
V
VDD > 9.4V
VTH
VDD Pre-regulator Turn-off Threshold Voltage
Undervoltage Lockout
8.0
7.0
8.7
8.1
9.4
8.9
IPREREG = 10µA
VLOCK
V
Supply
IDD
Supply Current
0.75
0.55
20
1.0
13.5
100
mA
mA
µA
V
CL < 75pF
IQ
Quiescent Supply Current
Nominal Bias Current
Operating Range
Shutdown = -VIN
IBIAS
VDD
9.0
Shutdown Logic
tSD
tSW
tRW
tLW
VIL
VIH
IIH
Shutdown Delay1
50
ns
ns
ns
ns
V
CL = 500pF, VSENSE = -VIN
Shutdown and reset low
Shutdown Pulse Width1
RESET Pulse Width1
50
50
25
Latching Pulse Width1
Input Low Voltage
2.0
Input High Voltage
7.0
V
Input Current, Input Voltage High
Input Current, Input Voltage Low
1.0
-25
5.0
-35
µA
µA
VIN = VDD
VIN = 0V
IIL
Output
VOH
Output High Voltage
HV9110/13
VDD -0.25
V
V
IOUT = 10mA
HV9112
V
DD -0.3
DD -0.3
HV9110/13
V
IOUT = 10mA,
TA = -55°C to 125°C
VOL
Output Low Voltage
Output Resistance
All
0.2
0.3
IOUT = -10mA
HV9110/13
IOUT = -10mA,
TA = -55°C to 125°C
ROUT
Pull Up
15
8.0
20
10
30
20
25
20
30
30
75
75
Ω
Ω
IOUT = 10mA
Pull Down
Pull Up
I
OUT = 10mA,
Pull Down
TA = -55°C to 125°C
CL = 500pF
tR
tF
Rise Time1
Fall Time1
ns
ns
CL = 500pF
Note:
1. Guaranteed by design. Not subject to production test.
3
HV9110/HV9112/HV9113
Truth Table
Shutdown
Reset
Output
Normal Operation
H
H
H
H → L
Normal Operation, No Change
Off, Not Latched
L
L
H
L
L
Off, Latched
L → H
Off, Latched, No Change
Shutdown Timing Waveforms
tF ≤ 10ns
1.5V
V
DD
50%
50%
Sense
Shutdown
Output
tR ≤ 10ns
0
0
t
t
SD
d
V
V
DD
DD
90%
90%
Output
0
0
t
SW
V
DD
50%
50%
Shutdown
Reset
tR, tF ≤ 10ns
0
t
LW
V
DD
50%
50%
50%
0
t
RW
Functional Block Diagram
OSC
In
OSC
Out
FB
COMP
Discharge
14
(19)
13
(18)
9
(12)
8 (11)
7 (10)
Error
Amplifier
OSC
–
10 (14)
To V
+
DD
V
2V
T
Q
Modulator
Comparator
REF
–
+
+
–
4V
R
Q
S
4 (6)
Output
REF
GEN
9113
9110
9112
5 (8)
Current Limit
Comparator
-V
IN
To
Internal
Circuits
1 (20)
Current
Sources
1.2V
BIAS
3 (5)
Current Sense
6 (9)
2 (3)
V
DD
V
DD
11 (16)
Undervoltage
Comparator
–
Shutdown
Reset
S
+V
IN
Q
+
R
8.1V
8.6V
–
12 (17)
+
Pre-regulator/Startup
Pin numbers in parentheses are for PLCC package
4
HV9110/HV9112/HV9113
Typical Performance Curves
Output Switching Frequency
vs. Oscillator Resistance
Fig. 1
Fig. 4
Error Amplifier Output Impedance (Z0)
106
105
104
103
102
10
1
1M
HV9113
HV9110, 9111, 9112
100k
.1
100Hz
10k
10k
100 k
1M
1KHz
100KHz
10KHz
1MHz
10MHz
Frequency
PSRR — Error Amplifier and Reference
ROSC (Ω)
Fig. 2
Fig. 5
Error Amplifier
Open Loop Gain/Phase
0
-10
-20
-30
-40
-50
-60
-70
-80
80
70
60
50
40
30
20
10
0
180
120
60
0
-60
-120
-180
-10
10
100
1K
10K
100K
1M
100
1K
10K
100K
1M
Frequency (Hz)
Frequency (Hz)
RDISCHARGE vs. tOFF (9113 only)
100
104
Fig. 3
Fig. 6
ROSC = 100K
VDD = 12V
VDD = 10V
10
103
ROSC = 10K
ROSC = 1K
103 104
1
102
106
105
107
10-1
100
101
102
105
106
RDISCHARGE (Ω)
Bias Resistance (Ω)
5
HV9110/HV9112/HV9113
Test Circuits
Error Amp ZOUT
PSRR
0.1V swept 10Hz – 1MHz
+10V
1.0V swept 100Hz – 2.2MHz
(VDD
)
100K1%
60.4K
–
100K1%
10.0V
V1
–
(FB)
+
Tektronix
P6021
(1 turn
4.00V
Reference
+
Reference
V1
V2
secondary)
V2
40.2K
GND
(–VIN
0.1µF
)
0.1µF
NOTE: Set Feedback Voltage so that
COMP = VDIVIDE 1mV before connecting transformer
V
Detailed Description
Preregulator
the 50% maximum duty cycle versions, a frequency dividing flip-
flop. A single external resistor between the OSC In and OSC Out
pins is required to set oscillator frequency (see graph). For the
50% maximum duty cycle versions the Discharge pin is internally
connected to GND. For the 99% duty cycle version, the discharge
pin can either be connected to VSS directly or connected to VSS
through a resistor used to set a deadtime.
Thepreregulator/startupcircuitfortheHV911Xconsistsofahigh-
voltage n-channel depletion-mode DMOS transistor driven by an
error amplifier to form a variable current path between the VIN
terminal and the VDD terminal. Maximum current (about 20 mA)
occurswhenVDD =0, withcurrentreducingasVDD rises. Thispath
shuts off altogether when VDD rises to somewhere between 7.8
and 9.4V, so that if VDD is held at 10 or 12V by an external source
(generallythesupplythechipiscontrolling). Nocurrentotherthan
leakage is drawn through the high voltage transistor. This mini-
mizes dissipation.
One difference exists between the Supertex HV911X and com-
petitive 911X’s: On the Supertex part the oscillator is shut off
when a shutoff command is received. This saves about 150µA of
quiescent current, which aids in the construction of power sup-
plies to meet CCITT specification I-430, and in other situations
where an absolute minimum of quiescent power dissipation is
required.
An external capacitor between VDD and VSS is generally required
to store energy used by the chip in the time between shutoff of the
high voltage path and the VDD supply’s output rising enough to
take over powering the chip. This capacitor should have a value
of 100X or more the effective gate capacitance of the MOSFET
being driven, i.e.,
Reference
Cstorage ≥ 100 x (gate charge of FET at 10V ÷ 10V)
as well as very good high frequency characteristics. Stacked
polyester or ceramic caps work well. Electrolytic capacitors are
generally not suitable.
The Reference of the HV911X consists of a stable bandgap
reference followed by a buffer amplifier which scales the voltage
up to approximately 4.0V. The scaling resistors of the reference
bufferamplifieraretrimmedduringmanufacturesothattheoutput
of the error amplifier when connected in a gain of –1 configuration
is as close to 4.000V as possible. This nulls out any input offset
of the error amplifier. As a consequence, even though the ob-
served reference voltage of a specific part may not be exactly
4.0V, the feedback voltage required for proper regulation will be.
A common resistor divider string is used to monitor VDD for both
the undervoltage lockout circuit and the shutoff circuit of the high
voltage FET. Setting the undervoltage sense point about 0.6V
lower on the string than the FET shutoff point guarantees that the
undervoltage lockout always releases before the FET shuts off.
A ≈50KΩ resistor is placed internally between the output of the
reference buffer amplifier and the circuitry it feeds (reference
output pin and non-inverting input to the error amplifier). This
allows overriding the internal reference with a low-impedance
voltage source ≤6.0V. Using an external reference reinstates the
input offset voltage of the error amplifier, and its effect of the exact
value of feedback voltage required.
Bias Circuit
Anexternalbiasresistor, connectedbetweenthebiaspinandVSS
is required by the HV911X to set currents in a series of current
mirrors used by the analog sections of the chip. Nominal external
bias current requirement is 15 to 20µA, which can be set by a
390KΩ to 510KΩ resistor if a 10V VDD is used, or a 510kΩ to
680KΩ resistor if VDD will be 12V. A precision resistor is not
required; 5% is fine.
Becausethereferenceofthe911Xisahighimpedancenode, and
usually there will be significant electrical noise near it, a bypass
capacitor between the reference pin and VSS is strongly recom-
mended. The reference buffer amplifier is intentionally compen-
sated to be stable with a capacitive load of 0.01 to 0.1µF.
Clock Oscillator
The clock oscillator of the HV911X consists of a ring of CMOS
inverters, timing capacitors, a capacitor discharge FET, and, in
6
HV9110/HV9112/HV9113
Detailed Description (continued)
Error Amplifier
Remote Shutdown
The error amplifier in the HV911X is a true low-power differential
inputoperationalamplifierintendedforaround-the-amplifiercom-
pensation. It is of mixed CMOS-bipolar construction: A PMOS
input stage is used so the common-mode range includes ground
and the input impedance is very high. This is followed by bipolar
gain stages which provide high gain without the electrical noise of
all-MOS amplifiers. The amplifier is unity-gain stable.
The shutdown and reset pins of the 911X can be used to perform
either latching or non-latching shutdown of a converter as re-
quired. These pins have internal current source pull-ups so they
can be driven from open-drain logic. When not used they should
be left open, or connected to VDD
.
Output Buffer
The output buffer of the HV911X is of standard CMOS construc-
tion (P-channel pull-up, N-channel pull-down). Thus the body-
drain diodes of the output stage can be used for spike clipping if
necessary, and external Schottky diode clamping of the output is
not required.
Current Sense Comparators
The HV911X uses a true dual comparator system with indepen-
dent comparators for modulation and current limiting. This allows
thedesignergreaterlatitudeincompensationdesign,asthereare
noclamps(exceptESDprotection)onthecompensationpin. Like
the error amplifier, the comparators are of low-noise BiCMOS
construction.
Pinout
1
2
3
4
5
6
7
14
13
12
11
10
9
BIAS
+VIN
FB
COMP
Reset
18
17
16
15
14
Sense
Output
–VIN
Shutdown
VREF
19
FB
13 NC
BIAS 20
Discharge
12
11
10
9
VDD
Discharge
OSC In
NC
NC
OSC In
OSC Out
VDD
1
2
3
•
8
OSC Out
14 Pin SOIC/DIP Package
+VIN
4
5
6
7
8
20-pin PJ Package
top view
11/12/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
7
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