HV861K7-G [SUPERTEX]

Dimmable, Low Noise, Dual EL Lamp Driver; 调光,低噪声,双EL灯驱动器
HV861K7-G
型号: HV861K7-G
厂家: Supertex, Inc    Supertex, Inc
描述:

Dimmable, Low Noise, Dual EL Lamp Driver
调光,低噪声,双EL灯驱动器

驱动器
文件: 总7页 (文件大小:680K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HV861  
Dimmable, Low Noise, Dual EL Lamp Driver  
The device uses a single inductor and a minimum number of  
passive components. Using the internal reference voltage,  
the regulated output voltage is at a nominal value of 90V.  
The EL Lamps will therefore see 90V. The two EL Lamps  
can be turned ON and OFF using two CMOS logic inputs,  
EN1 and EN2. The driver is disabled when both EN1 and  
EN2 are at logic low.  
Features  
Adjustable output regulation for dimming  
Lamp fade-in/fade-out capability  
Low audible noise  
180VPP output voltage for higher brightness  
1.5V enable input logic high  
Single cell lithium ion compatible  
One miniature inductor to power both lamps  
Separately adjustable lamp and converter frequencies  
Split supply capability  
The HV861 has two internal oscillators, a switching MOSFET,  
and two high voltage EL Lamp driver H-bridges. Each driver  
has its own half bridge common output, COM1 and COM2,  
which significantly minimizes the DC offset seen by the EL  
Lamp. The frequency for the switching MOSFET is set by an  
external resistor connected between the RSW-osc pin and  
the supply pin VDD. The EL Lamp driver frequency is set  
by an external resistor connected between the REL-osc pin  
and the VDD pin. An external inductor is connected between  
the LX and VDD pins or VIN for split supply applications.  
Depending upon the EL Lamp sizes, a 1.0nF to 10.0nF  
capacitor is connected between the CS and ground.  
16-Lead QFN package  
Applications  
Dual display cellular phones  
Keypad and LCD backlighting  
PDAs  
Handheld wireless communication products  
Global Positioning Systems (GPS)  
As the switching MOSFET charges the external inductor  
and discharges it into the capacitor at CS, the voltage at  
CS will start to increase. Once the voltage at CS reaches a  
nominal value of 90V, the switching MOSFET is turned OFF  
to conserve power.  
General Description  
The Supertex HV861 is a low noise, dimmable, high  
voltage, dual EL Lamp driver designed for driving two  
electroluminescent (EL) Lamps with a combined area of 5.0  
square inches. The input supply voltage range is from 2.5V  
to 4.5V. Enable input logic high can go as low as 1.5V, which  
allows logic interface operating from typical 1.8V supplies.  
The device is designed to minimize audible noise emitted by  
the EL Lamps.  
EL Lamp dimming can be accomplished by applying a PWM  
logic signal to the PWM pin. The EL Lamp brightness will be  
proportional to the PWM duty cycle. The HV861 can also  
slowly turn the EL Lamp ON/OFF giving a fade ON/OFF  
appearance.  
Typical Application Circuit  
VIN = 3.2V to 4.2V  
100µH Coilcraft  
1N4148  
4.7µF  
LPS4012  
3.3MΩ  
3.3nF  
100V NPO  
15  
14  
7
8
VREG VOUT LX  
CS  
12  
3
1
2
EL1  
VDD  
V
DD = 3.0V  
2.0MΩ  
EL1  
EL2  
REL-osc  
RSW-osc  
11  
9
0.1µF  
COM1  
EL2  
825kΩ  
Input Logic Control:  
ON = 1.5V to VDD  
OFF = 0V to 0.2V  
4
5
EN1  
EN2  
VREF PWM  
10  
COM2  
GND  
16  
13  
6
2.2µF  
HV861K7-G  
HV861  
Ordering Information  
Pin Configuration  
VREF VREG VOUT PWM  
16-Lead QFN  
16  
15 14 13  
Device  
3x3mm body,  
0.80mm height (max), 0.50mm pitch  
REL-osc  
RSW-osc  
VDD  
EL1  
1
2
3
4
12  
11  
HV861  
HV861K7-G  
COM1  
-G indicates package is RoHS compliant (‘Green’)  
10 COM2  
EL2  
EN1  
9
5
6
8
7
LX  
CS  
EN2 GND  
16-Lead QFN Package  
Absolute Maximum Ratings  
Parameter  
VDD, supply voltage  
Operating temperature  
Storage temperature  
Power dissipation  
Note:  
Value  
-0.5V to 5.5V  
-40°C to +85°C  
-65°C to +150°C  
1.6W  
Pads are at the bottom of the package. Center heat slug is at ground  
potential.  
Product Marking  
Y = Last Digit of Year Molded  
H861  
YWLL  
W = Code for Week Molded  
L = Lot Number  
VCS, output voltage  
-0.5V to +120V  
Absolute Maximum Ratings are those values beyond which damage to the  
device may occur. Functional operation under these conditions is not implied.  
Continuous operation of the device at the absolute rating level may affect  
device reliability. All voltages are referenced to device ground.  
= “Green” Packaging  
16-Lead QFN Package  
Thermal Resistance  
Package  
θja  
16-Lead QFN  
60 °C/W  
Recommended Operating Conditions  
Sym  
VDD  
fSW  
Parameter  
Min  
2.5  
40  
Typ  
Max Units Conditions  
Supply voltage  
-
-
-
-
-
4.5  
200  
500  
20  
V
kHz  
Hz  
nF  
---  
---  
---  
---  
---  
Switching frequency  
EL output frequency  
Total EL Lamp capacitance load  
Operating temperature  
fEL  
100  
0
CLOAD  
TA  
-40  
+85  
°C  
Electrical Characteristics (Over recommended operating conditions unless otherwise specified)  
Sym  
RDS(ON)  
VCS  
Parameter  
Min  
Typ  
Max Units Conditions  
On-resistance of switching transistor  
Maximum output regulation voltage  
-
80  
-
-
7.0  
V
I = 100mA  
90  
78  
62  
45  
-
100  
VDD = 2.5V to 4.5V  
-
VDD = 2.5V to 4.5V, VREG = 1.092V  
VDD = 2.5V to 4.5V, VREG = 0.862V  
VDD = 2.5V to 4.5V, VREG = 0.632V  
VDD = 2.5V to 4.5V  
VCS  
Output regulation voltage  
-
-
-
V
V
-
VREG  
External input voltage range  
0
1.40  
2
HV861  
Electrical Characteristics (cont.)  
Sym  
Parameter  
Min  
Typ  
Max Units Conditions  
VREFH  
VREF output high voltage  
1.12  
1.26 1.40  
V
VDD = 2.5V to 4.5V  
VDD = 2.5V to 4.5V  
VDD = 2.5V to 4.5V  
IREF(SOURCE) Average sourcing current from VREF pin  
-
-
6.0  
6.0  
-
-
µA  
µA  
IREF(SINK)  
Average sinking current from VREF pin  
V
= 2.5V,  
ENDD1 = EN2 = PWM = low  
-
-
-
-
-
-
300  
400  
500  
V
= 3.0V,  
ENDD1 = EN2 = PWM = low  
IDDQ  
Quiescent VDD supply current  
nA  
V
= 4.5V,  
ENDD1 = EN2 = PWM = low  
VDD = 2.5V to 4.5V, REL = 2.0MΩ,  
RSW = 825kΩ  
IDD  
Input current going into the VDD pin  
-
-
250  
µA  
IIN  
fEL  
Input current including inductor current  
EL Lamp frequency  
-
160  
84  
10  
-
25  
50  
220  
116  
100  
-
mA  
Hz  
VIN = 3.2V (see Test Circuit)  
REL = 2.0MΩ  
190  
fSW  
PWM  
D
Switching transistor frequency  
Input PWM frequency  
100  
kHz RSW = 825kΩ  
kHz ---  
-
88  
-
Switching transistor duty cycle  
Enable PWM input logic high voltage  
Enable PWM input logic low voltage  
Enable PWM input logic high current  
Enable PWM input logic low current  
Enable PWM input capacitance  
%
V
---  
VIH  
VIL  
IIH  
1.5  
0
VDD  
0.2  
1.0  
-1.0  
15  
VDD = 2.5V to 4.5V  
VDD = 2.5V to 4.5V  
VIH = VDD = 2.5V to 4.5V  
VIL = 0V, VDD = 2.5V to 4.5V  
---  
-
V
-
-
µA  
µA  
pF  
IIL  
-
-
CIN  
-
-
Function Table  
EN1  
EN2  
EL1  
Hi Z  
Hi Z  
ON  
EL2  
COM1  
COM2  
Hi Z  
ON  
IC  
0
0
1
1
0
1
0
1
Hi Z  
ON  
Hi Z  
Hi Z  
ON  
OFF  
ON  
ON  
ON  
Hi Z  
ON  
Hi Z  
ON  
ON  
ON  
Typical Performance  
Lamp Brightness  
VDD  
(V)  
VIN  
(V)  
IIN  
VCS  
FEL  
(cd/m2)  
Lamp  
(mA)  
(VPEAK  
)
(Hz)  
EL1  
14.8  
-
EL2  
-
EL1 ON  
EL2 ON  
16.9  
11.4  
25.0  
3.0  
4.0  
93  
188  
18.0  
17.7  
EL1 and EL2 ON  
14.6  
3
HV861  
Figure 1: Block Diagram  
VDD  
LX  
CS  
EN1  
EL1 Enable  
EL2 Enable  
EL1  
EN2  
PWM Switch  
Oscillator  
0 to 88%  
RSW-osc  
VCS  
VCS  
VCS  
COM1  
EL2  
Output  
Drivers  
VSENSE  
+
C
-
VREG  
VOUT  
1.26V  
VREF  
60pF  
GND  
COM2  
2 x EL Freq.  
1 x EL Freq.  
REL-osc  
PWM VREF  
Figure 2: Test Circuit  
IIN  
VIN  
100µH Coilcraft  
LPS4012  
4.7µF  
1N4148  
7
3.3MΩ  
3.3nF  
100V NPO  
15  
VREG VOUT LX  
14  
8
CS  
IDD  
12  
3
1
2
EL1  
V
DD  
VDD  
620Ω  
2.0MΩ  
12nF  
12nF  
REL-osc  
RSW-osc  
11  
9
0.1µF  
COM1  
EL2  
825kΩ  
620Ω  
Input Logic Control:  
ON = 1.5V to VDD  
OFF = 0V to 0.2V  
4
5
EN1  
EN2  
10  
COM2  
VREF PWM  
GND  
16  
13  
6
2.2µF  
HV861K7-G  
4
HV861  
Figure 3: Typical Waveform EL1, COM1 and Differential Waveform EL1 – COM1  
Split Supply Configuration  
Enable/Disable Configuration  
The HV861 can also be used for handheld devices operating EL1 and EL2 outputs can be enabled and disabled via a  
from a battery where a regulated voltage is available. This logic control signal on the EN1 and EN2 pins respectively.  
is shown in Figure 4. The regulated voltage can be used to When EN1 is high/low, the Lamp1 (EL1) will be ON/OFF.  
run the internal logic of the HV861. The amount of current When EN2 is high/low, the Lamp2 (EL2) will be ON/OFF.  
necessary to run the internal logic is 250µA max. Therefore, The control signal can be from a microprocessor.  
the regulated voltage could easily provide the current with-  
out being loaded down.  
Figure 4: Split Supply and Enable/Disable Configuration  
LX  
+
_
D
CIN  
Battery Voltage = VIN  
RREG  
CS  
15  
VREG VOUT LX  
14  
7
8
CS  
EL1  
12  
3
1
2
VDD  
REL  
+
_
EL1  
EL2  
REL-osc  
RSW-osc  
11  
9
CDD  
Regulated Voltage = VDD  
COM1  
EL2  
RSW  
4
5
Input Logic Control:  
Input Logic Control:  
EN1  
EN2  
VREF PWM  
10  
COM2  
GND  
16  
13  
6
CREF  
HV861K7-G  
5
HV861  
Pin Configuration and External Component Description  
Pin #  
Name  
Description  
External resistor from REL-Osc to VDD sets the EL frequency. The EL frequency is inversely pro-  
portional to the external REL resistor value. Reducing the resistor value by a factor of two will result  
in increasing the EL frequency by two.  
1
REL-Osc  
fEL = (2.0MΩ • 190Hz) / REL  
External resistor from RSW-Osc to VDD sets the switch converter frequency. The switch converter  
frequency is inversely proportional to the external R resistor value. Reducing the resistor value  
by a factor of two will result in increasing the switch ScWonverter frequency by two.  
2
RSW-Osc  
fSW = (825kΩ • 100kHz) / RSW  
3
4
VDD  
EN1  
Low voltage input supply pin.  
Enable input signal for EL Lamp 1. CMOS logic input pin. Refer to the function table.  
5
6
EN2  
Enable input signal for EL Lamp 2. CMOS logic input pin. Refer to the function table.  
Device ground.  
GND  
Drain of internal switching MOSFET. Connection for an external inductor.  
The inductor LX is used to boost the low input voltage by inductive flyback. When the internal  
switch is on, the inductor is being charged. When the internal switch is off, the charge stored in  
the inductor will be transferred to the high voltage capacitor CS. The energy stored in the capaci-  
tor is connected to the internal H-bridge, and therefore to the EL Lamp. In general, smaller value  
inductors, which can handle more current, are more suitable to drive larger size Lamps. As the  
inductor value decreases, the switching frequency of the inductor (controlled by RSW) should be  
increased to avoid saturation.  
7
LX  
Connect a 100V capacitor between this pin and ground. This capacitor stores the energy trans-  
ferred from the inductor.  
8
CS  
9
EL2  
COM2  
COM1  
EL1  
EL Lamp 2 connection.  
10  
11  
12  
Common connection for EL2 Lamp.  
Common connection for EL1 Lamp.  
EL Lamp 1 connection.  
PWM pulse input for EL Lamp dimming. The duty cycle of the PWM signal is proportional to the  
output voltage. If PWM dimming is not desired, then the PWM pin should be tied to ground.  
13  
14  
PWM  
VOUT  
Switched internal reference voltage.  
Input voltage to set V regulation voltage. This pin allows an external voltage source to control  
the VCS amplitude. ELCLSamp dimming can be accomplished by varying the input voltage to VREG.  
The VCS voltage is approximately 71 times the voltage seen on VREG.  
15  
16  
VREG  
VREF  
External resistor connected between VREG and VOUT pins controls the VCS charging rate. The  
charging rate is inversely proportional to the resistor value.  
Internal reference voltage to set the regulation voltage. Connect an external capacitor (C ) from  
VREF to ground to slowly brighten the lamp during power-up and dim down the lampREFduring  
power-down. The size of the capacitor determines the time taken to brighten up or dim down. If  
fade-in and fade-out are not required, this pin should be left floating. Fade in/fade out time = CREF  
x 210 x 103.  
6
HV861  
16-Lead QFN Package Outline (K7)  
(3x3mm body, 0.80mm height (max), 0.50mm pitch)  
Note 1  
(Index Area  
D/2 x E/2)  
D2  
D
16  
16  
1
1
e
Note 1  
(Index Area  
D/2 x E/2)  
E
E2  
b
View B  
Top View  
Bottom View  
Note 3  
θ
L
A
Seating  
Plane  
A3  
L1  
Note 2  
A1  
Side View  
View B  
Notes:  
1. Details of Pin 1 identifier are optional, but must be located within the indicated area. The Pin 1 identifier may be either a mold, or an embedded metal  
or marked feature.  
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.  
3. The inner tip of the lead may be either rounded or square.  
Symbol  
A
A1  
A3  
b
D
D2  
E
E2  
e
L
L1  
0.00  
-
θ
0O  
-
MIN  
NOM  
MAX  
0.70  
0.75  
0.80  
0.00  
0.02  
0.05  
0.18  
0.25  
0.30  
2.85  
3.00  
3.15  
1.50  
1.65  
1.80  
2.85  
3.00  
3.15  
1.50  
1.65  
1.80  
0.20*  
0.30*  
0.45  
Dimension  
(mm)  
0.20  
REF  
0.50  
BSC  
0.15  
14O  
JEDEC Registration MO-220, Variation WEED-4, Issue K, June 2006.  
Dimensions marked with (*) are non-JEDEC dimensions.  
Drawings are not to scale.  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline  
information go to http://www.supertex.com/packaging.html.)  
Doc.# DSFP-HV861  
A020708  
7

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