2N7008_13 [SUPERTEX]
N-Channel Enhancement-Mode Vertical DMOS FETs;![2N7008_13](http://pdffile.icpdf.com/pdf2/p00328/img/icpdf/2N7008-GP002_2017751_icpdf.jpg)
型号: | 2N7008_13 |
厂家: | ![]() |
描述: | N-Channel Enhancement-Mode Vertical DMOS FETs |
文件: | 总3页 (文件大小:592K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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2N7008
Supertex inc.
N-Channel Enhancement-Mode
Vertical DMOS FETs
Features
General Description
► Free from secondary breakdown
► Low power drive requirement
► Ease of paralleling
The Supertex 2N7008 is an enhancement-mode (normally-
off) transistor that utilizes a vertical DMOS structure
and Supertex’s well-proven silicon-gate manufacturing
process. This combination produces a device with the
power handling capabilities of bipolar transistors, and the
high input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
► Low CISS and fast switching speeds
► Excellent thermal stability
► Integral source-drain diode
► High input impedance and high gain
Applications
► Motor controls
► Converters
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
► Amplifiers
► Switches
► Power supply circuits
► Drivers (relays, hammers, solenoids, lamps,
memories, displays, bipolar transistors, etc.)
Ordering Information
Product Summary
RDS(ON)
(max)
Part Number
Package Option Packing
BVDSX/BVDGS
ID(ON)
2N7008-G
TO-92
TO-92
TO-92
TO-92
TO-92
TO-92
1000/Bag
2000/Reel
2000/Reel
2000/Reel
2000/Reel
2000/Reel
60V
7.5 Ω
500mA
2N7008-G P002
2N7008-G P003
2N7008-G P005
2N7008-G P013
2N7008-G PO14
Pin Configuration
DRAIN
-G denotes a lead (Pb)-free / RoHS compliant package.
Contact factory for Wafer / Die availablity.
SOURCE
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.
GATE
Absolute Maximum Ratings
Parameter
TO-92
Value
BVDSS
BVDGS
±30V
Product Marking
Drain-to-source voltage
Drain-to-gate voltage
Si2N
7 0 0 8
YYWW
YY = Year Sealed
WW = Week Sealed
Gate-to-source voltage
= “Green” Packaging
Operating and storage temperature
-55°C to +150°C
Package may or may not include the following marks: Si or
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
TO-92
Typical Thermal Characteristics
Package
θja
TO-92
132OC/W
* Mounted on FR4 board; 25mm x 25mm x 1.57mm
Doc.# DSFP-2N7008
C062813
Supertex inc.
www.supertex.com
2N7008
Thermal Characteristics
ID
†
IDR
ID
Power Dissipation
Package
IDRM
(continuous)†
(pulsed)
@TC = 25OC
TO-92
230mA
1.3A
1.0W
230mA
1.3A
Note:
†
ID (continuous) is limited by max rated Tj.
Electrical Characteristics (TA = 25°C unless otherwise specified)
Sym
Parameter
Min
60
1.0
-
Typ
Max
-
Units
V
Conditions
BVDSS Drain-to-source breakdown voltage
VGS(th) Gate threshold voltage
-
-
-
-
VGS = 0V, ID = -10µA
VGS = VDS, ID = 250µA
VGS = ±30V, VDS = 0V
VGS = 0V, VDS = 50V
2.5
100
1.0
V
IGSS
Gate body leakage current
Zero gate voltage drain current
On-state drain current
nA
-
IDSS
µA
VGS = 0V, VDS = 50V,
TA = 125OC
-
-
500
ID(ON)
500
-
-
-
-
-
-
-
-
-
-
-
mA
VGS = 10V, VDS ≥ 2.0VDS(ON)
VGS = 5.0V, ID = 50mA
VGS = 10V, ID = 500mA
-
-
7.5
7.5
-
Static drain-to-source
on-state resistance
RDS(ON)
Ω
GFS
CISS
COSS
CRSS
t(ON)
Forward transconductance
Input capacitance
80
-
mmho VDS = 10V, ID = 200mA
50
25
5.0
20
20
1.5
VGS = 0V, VDS = 25V,
f = 1.0MHz
Common source output capacitance
Reverse transfer capacitance
Turn-on time
-
pF
-
-
VDD = 30V, ID = 200mA,
RGEN = 25Ω
ns
t(OFF)
Turn-off time
-
VSD
Diode forward voltage drop
-
V
VGS = 0V, ISD = 150mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
VDD
90%
INPUT
0V
Pulse
RL
10%
Generator
OUTPUT
t(ON)
td(ON)
t(OFF)
td(OFF)
RGEN
tf
tr
VDD
OUTPUT
INPUT
D.U.T.
10%
10%
0V
90%
90%
Doc.# DSFP-2N7008
C062813
Supertex inc.
www.supertex.com
2
2N7008
3-Lead TO-92 Package Outline (N3)
D
A
Seating
Plane
1
2
3
L
c
b
e1
e
Side View
Front View
E
E1
1
3
2
Bottom View
Symbol
A
.170
-
b
.014†
-
c
D
.175
-
E
.125
-
E1
.080
-
e
e1
.045
-
L
.500
-
MIN
NOM
MAX
.014†
-
.095
-
Dimensions
(inches)
.210
.022†
.022†
.205
.165
.105
.105
.055
.610*
JEDEC Registration TO-92.
* This dimension is not specified in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version E041009.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2013 Supertex inc.All rights reserved. Unauthorized use or reproduction is prohibited.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
Doc.# DSFP-2N7008
C062813
3
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