VNS1NV04P-E
更新时间：2024-09-18 12:50:29
描述：OMNIFET II fully autoprotected Power MOSFET
概述
规格参数
数据手册VNS1NV04P-E 概述
OMNIFET II fully autoprotected Power MOSFET OMNIFET II完全autoprotected功率MOSFET 外围驱动器
VNS1NV04P-E 规格参数
| 是否Rohs认证： | 符合 | 生命周期： | Obsolete |
| 零件包装代码： | SOIC | 包装说明： | SOP, |
| 针数： | 8 | Reach Compliance Code： | compliant |
| ECCN代码： | EAR99 | HTS代码： | 8542.39.00.01 |
| 风险等级： | 7.44 | 内置保护： | TRANSIENT; OVER CURRENT; OVER VOLTAGE; THERMAL |
| 接口集成电路类型： | BUFFER OR INVERTER BASED PERIPHERAL DRIVER | JESD-30 代码： | R-PDSO-G8 |
| JESD-609代码： | e3 | 长度： | 4.9 mm |
| 湿度敏感等级： | 3 | 功能数量： | 1 |
| 端子数量： | 8 | 输出电流流向： | SINK |
| 标称输出峰值电流： | 1.7 A | 封装主体材料： | PLASTIC/EPOXY |
| 封装代码： | SOP | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 峰值回流温度（摄氏度）： | 260 |
| 认证状态： | Not Qualified | 座面最大高度： | 1.75 mm |
| 标称供电电压： | 5 V | 表面贴装： | YES |
| 端子面层： | Tin (Sn) | 端子形式： | GULL WING |
| 端子节距： | 1.27 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | 30 | 断开时间： | 5.5 µs |
| 接通时间： | 1 µs | 宽度： | 3.9 mm |
| Base Number Matches： | 1 |
VNS1NV04P-E 数据手册
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OMNIFET II
fully autoprotected Power MOSFET
Features
Parameter
Symbol Value
2
Max on-state resistance (per ch.)
Current limitation (typ)
RON
ILIMH
250 mΩ
1.7 A
3
2
1
Drain-source clamp voltage
VCLAMP
40 V
SOT-223
SO-8
■ Linear current limitation
■ Thermal shutdown
■ Short circuit protection
■ Integrated clamp
Description
■ Low current drawn from input pin
■ Diagnostic feedback through input pin
■ ESD protection
The VNN1NV04P-E, VNS1NV04P-E are
monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 kHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
■ Direct access to the gate of the Power
MOSFET (analog driving)
■ Compatible with standard Power MOSFET
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.
Device summary
Order codes
Package
Tube
Tape and reel
SOT-223 VNN1NV04P-E VNN1NV04PTR-E
SO-8
VNS1NV04P-E VNS1NV04PTR-E
October 2009
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www.st.com
28
Contents
VNN1NV04P-E, VNS1NV04P-E
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
2.3
2.4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
4.2
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5
6
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
5.2
5.3
5.4
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SOT-223 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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List of figures
VNN1NV04P-E, VNS1NV04P-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Static drain-source on resistance vs Id. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 29. Step response current limit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 30. SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 31. SOT-223 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . 17
Figure 32. SOT-223 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 33. SOT-223 thermal fitting model of a single channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 34. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 35. SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 19
Figure 36. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 37. SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 38. SOT-223 mechanical data and package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 39. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 40. SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 41. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 42. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Block diagram and pin description
1
Block diagram and pin description
Figure 1.
Block diagram
DRAIN
2
Overvoltage
Clamp
INPUT
Gate
Control
1
Linear
Current
Limiter
Over
Temperature
3
SOURCE
(a)
Figure 2.
Configuration diagram (top view)
1
DRAIN
DRAIN
DRAIN
DRAIN
SOURCE
SOURCE
SOURCE
INPUT
8
4
5
a. For the pins configuration related to SOT-223 see outline at page 1.
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Electrical specifications
VNN1NV04P-E, VNS1NV04P-E
2
Electrical specifications
Figure 3.
Current and voltage conventions
ID
VDS
DRAIN
RIN
IIN
INPUT
SOURCE
VIN
2.1
Absolute maximum ratings
Stress values that exceed those listed in the “Absolute maximum ratings” table can cause
permanent damage to the device. These are stress ratings only, and operation of the device
at these, or any other conditions greater than those, indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
SOT-223
Unit
SO-8
VDSn
VINn
IINn
Drain-source voltage (VINn=0 V)
Input voltage
Internally clamped
V
V
Internally clamped
Input current
+/-20
mA
Ω
RIN MINn Minimum input series impedance
330
Internally limited
-3
IDn
IRn
Drain current
A
Reverse DC output current
Electrostatic discharge (R=1.5 KΩ, C=100 pF)
A
VESD1
4000
V
Electrostatic discharge on output pins only
VESD2
16500
V
(R=330 Ω, C=150 pF)
Ptot
Tj
Total dissipation at Tc=25 °C
Operating junction temperature
Case operating temperature
Storage temperature
7
8.3
W
°C
°C
°C
Internally limited
Internally limited
-55 to 150
Tc
Tstg
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VNN1NV04P-E, VNS1NV04P-E
Electrical specifications
2.2
Thermal data
Table 3.
Thermal data
Max value
Unit
Symbol
Parameter
SOT-223
SO-8
Rthj-case
Rthj-lead
Rthj-amb
Thermal resistance junction-case
Thermal resistance junction-lead
Thermal resistance junction-ambient
18
°C/W
°C/W
°C/W
15
70(1)
65(1)
1. When mounted on a standard single-sided FR4 board with 50 mm2 of Cu (at least 35 μm thick) connected
to all DRAIN pins
2.3
Electrical characteristics
Table 4.
Symbol
Electrical characteristics
Parameter
Test conditions
Min
Typ
Max
Unit
Off (-40 °C<Tj<150 °C, unless otherwise specified)
VCLAMP Drain-source clamp voltage
VIN=0 V; ID=0.5 A
VIN=0 V; ID=2 mA
40
36
45
55
V
V
Drain-source clamp threshold
VCLTH
voltage
VINTH
IISS
Input threshold voltage
VDS=VIN; ID=1 mA
VDS=0 V; VIN=5 V
0.5
2.5
V
Supply current from input pin
100
6.8
150
µA
Input-source clamp
voltage
IIN=1 mA
IIN=-1 mA
6
8
VINCL
V
-1.0
-0.3
VDS=13 V; VIN=0 V; Tj=25 °C
VDS=25 V; VIN=0 V
30
75
Zero input voltage drain current
(VIN=0 V)
IDSS
µA
On (-40 °C<Tj<150 °C, unless otherwise specified)
VIN=5 V; ID=0.5 A; Tj=25 °C
VIN=5 V; ID=0.5 A
250
500
Static drain-source on
resistance
RDS(on)
mΩ
Dynamic (Tj=25 °C, unless otherwise specified)
(1)
gfs
Forward transconductance
Output capacitance
VDD=13 V; ID=0.5 A
2
S
COSS
VDS=13 V; f=1 MHz; VIN=0 V
90
pF
Switching (Tj=25 °C, unless otherwise specified)
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
70
200
500
ns
ns
ns
ns
V
DD=15 V; ID=0.5 A
170
350
200
Vgen=5 V; Rgen=RIN MIN=330 Ω
(see Figure 4)
Turn-off delay time
Fall time
1000
600
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Electrical specifications
VNN1NV04P-E, VNS1NV04P-E
Table 4.
Symbol
Electrical characteristics (continued)
Parameter
Test conditions
Min
Typ
Max
Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
0.25
1.3
1.8
1.0
4.0
5.5
4.0
µs
µs
µs
µs
V
DD=15 V; ID=0.5 A
Vgen=5 V; Rgen=2.2 KΩ
(see Figure 4)
Turn-off delay time
Fall time
1.2
VDD=15 V; ID=1.5 A
(dI/dt)on Turn-on current slope
5
5
A/µs
nC
Vgen=5 V; Rgen=RIN MIN=330 Ω
VDD=12 V; ID=0.5 A; VIN=5 V
Qi
Total input charge
Igen=2.13 mA (see Figure 7)
Source drain diode (Tj=25 °C, unless otherwise specified)
(1)
VSD
trr
Forward on voltage
ISD=0.5 A; VIN=0 V
0.8
205
100
0.7
V
ns
nC
A
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=0.5 A; dI/dt=6 A/µs
VDD=30 V; L=200 µH
(see Figure 5)
Qrr
IRRM
Protections (-40 °C<Tj<150 °C, unless otherwise specified)
Ilim
tdlim
Tjsh
Tjrs
Igf
Drain current limit
VIN=5 V; VDS=13 V
VIN=5 V; VDS=13 V
1.7
3.5
200
20
A
µs
Step response current limit
Over temperature shutdown
Over temperature reset
Fault sink current
2.0
150
135
10
175
°C
°C
mA
VIN=5 V; VDS=13 V; Tj=Tjsh
Starting Tj=25 °C; VDD=24 V
15
VIN=5 V Rgen=RIN MIN=330 Ω;
L=50 mH
Eas
Single pulse avalanche energy
55
mJ
(see Figure 6 and Figure 8)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %
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VNN1NV04P-E, VNS1NV04P-E
Electrical specifications
Figure 4.
Switching time test circuit for resistive load
V
D
R
gen
V
gen
I
D
90%
10%
t
t
f
r
t
t
t
d(on)
t
d(off)
V
gen
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Electrical specifications
Figure 5.
VNN1NV04P-E, VNS1NV04P-E
Test circuit for diode recovery times
A
A
B
D
I
FAST
DIODE
L=100uH
OMNIFET
S
B
330Ω
D
VDD
Rgen
I
OMNIFET
Vgen
S
8.5
Ω
Figure 6.
Unclamped inductive load test circuits
R
GEN
V
IN
P
W
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VNN1NV04P-E, VNS1NV04P-E
Electrical specifications
Figure 7.
Input charge test circuit
GEN
VIN
ND8003
Figure 8.
Unclamped inductive waveforms
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Electrical specifications
VNN1NV04P-E, VNS1NV04P-E
2.4
Electrical characteristics curves
Figure 9.
Source-drain diode forward
characteristics
Figure 10. Static drain-source on resistance
Vsd (mV)
Rds(on) (ohms)
4.5
1000
950
900
850
800
750
700
Tj=-40ºC
4
Vin=2.5V
3.5
Vin=0V
3
2.5
2
1.5
Tj=25ºC
1
Tj=150ºC
0.5
0
0
0.05
0.1
0.15
0.2
0.25
0.3
0
2
4
6
8
10
12
14
Id(A)
Id (A)
Figure 11. Derating curve
Figure 12. Static drain-source on resistance
vs input voltage (part 1/2)
Rds(on) (mohms)
500
450
Id=0.5A
400
Tj=150ºC
350
300
250
200
Tj=25ºC
150
Tj=-40ºC
100
50
0
3
3.5
4
4.5
5
5.5
6
6.5
7
Vin(V)
Figure 13. Static drain-source on resistance
vs input voltage (part 2/2)
Figure 14. Transconductance
Rds(on) (mohms)
500
Gfs (S)
6
Tj=150ºC
450
5.5
Tj=-40ºC
Vds=13V
5
400
Id=1.5A
Tj=25ºC
4.5
4
Id=1A
350
Tj=150ºC
300
3.5
3
Tj=25ºC
250
2.5
2
200
Id=1.5A
Id=1A
Tj=-40ºC
150
Id=1.5A
Id=1A
1.5
1
100
50
0
0.5
0
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
3
3.5
4
4.5
Vin(V)
5
5.5
6
6.5
Id(A)
12/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Electrical specifications
Figure 15. Static drain-source on resistance
vs Id
Figure 16. Transfer characteristics
Rds(on) (mohms)
500
Idon(A)
2.25
Vin=3.5V
Tj=25ºC
450
2
1.75
1.5
Tj=150ºC
Vds=13.5V
400
Vin=5V
350
300
1.25
1
250
Vin=3.5V
Tj=25ºC
Tj=150ºC
200
Tj=-40ºC
Vin=5V
0.75
0.5
Vin=3.5V
150
Tj=-40ºC
Vin=5V
100
0.25
50
0
0
1.5
2
2.5
3
3.5
4
4.5
5
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
1.75
2.25
2.75
3.25
3.75
4.25
4.75
Id(A)
Vin(V)
Figure 17. Turn-on current slope (part 1/2)
Figure 18. Turn-on current slope (part 2/2)
di/dt(A/us)
6
di/dt(A/us)
1.4
5
1.2
Vin=5V
Vin=3.5V
Vdd=15V
Id=1.5A
Vdd=15V
Id=1.5A
4
1
3
2
1
0
0.8
0.6
0.4
0.2
0
500
1000
1500
2000
2500
0
500
1000
1500
2000
2500
Rg(ohm)
Rg(ohm)
Figure 19. Input voltage vs input charge
Figure 20. Turn-off drain source voltage slope
(part 1/2)
dv/dt(V/us)
350
Vin (V)
6
300
5
Vds=12V
Vin=5V
Id=0.5A
250
200
150
100
50
Vdd=15V
Id=0.5A
4
3
2
1
0
0
0
1
2
3
4
5
6
0
500
1000
1500
2000
2500
Qg (nC)
Rg(ohm)
Doc ID 15586 Rev 2
13/28
Electrical specifications
VNN1NV04P-E, VNS1NV04P-E
Figure 21. Turn-off drain-source voltage slope Figure 22. Capacitance variations
(part 2/2)
C(pF)
dv/dt(V/us)
225
350
200
300
f=1MHz
Vin=0V
Vin=3.5V
Vdd=15V
Id=0.5A
175
150
125
100
75
250
200
150
100
50
50
0
0
5
10
15
20
25
30
35
0
500
1000
1500
2000
2500
Vds(V)
Rg(ohm)
Figure 23. Switching time resistive load
(part 1/2)
Figure 24. Switching time resistive load
(part 2/2)
t(ns)
550
t(us)
2
500
Vdd=15V
tr
1.75
450
400
350
300
250
200
150
100
50
Id=0.5A
td(off)
Vdd=15V
Rg=330ohm
1.5
Id=0.5A
Vin=5V
tr
1.25
td(off)
tf
tf
1
0.75
0.5
0.25
0
td(on)
td(on)
0
250
750
1250
1750
2250
2000 2500
0
500
1000
1500
3.25
3.5
3.75
4
4.25
4.5
4.75
5
5.25
Vin(V)
Rg(ohm)
Figure 25. Output characteristics
Figure 26. Normalized on resistance vs
temperature
ID(A)
2.4
Rds(on) (mOhm)
2.25
Vin=5.5V
2.2
2
2
Vin=4.5V
Vin=3.5V
Vin=5V
Id=0.5A
1.8
1.6
1.4
1.2
1.75
1.5
1.25
1
1
0.8
0.6
0.4
0.2
0
0.75
0.5
Vin=3V
-50
-25
0
25
50
75
100 125 150
175
0
1
2
3
4
5
6
7
8
9
10 11 12
Tc (ºC)
VDS(V)
14/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Electrical specifications
Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction
vs temperature
temperature
Vinth (V)
2
Ilim (A)
5
1.8
1.6
1.4
1.2
1
4.5
4
Vds=Vin
Id=1mA
Vin=5V
Vds=13V
3.5
3
2.5
2
0.8
0.6
0.4
0.2
1.5
1
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Figure 29. Step response current limit
Tdlim(us)
2.4
2.3
Vin=5V
Rg=330ohm
2.2
2.1
2
1.9
5
10
15
20
25
30
35
Vdd(V)
Doc ID 15586 Rev 2
15/28
Protection features
VNN1NV04P-E, VNS1NV04P-E
3
Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device then behaves like a standard Power MOSFET and can be used as a switch from
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current
I
(typ. 100 µA) flows into the input pin in order to supply the internal circuitry.
ISS
The device integrates:
●
Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
●
Linear current limiter circuit: limits the drain current I to I whatever the input pin
D
lim
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold T
jsh.
●
Over temperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
●
Status feedback: in the case of an over temperature fault condition (T > T ), the
j jsh
device tries to sink a diagnostic current I through the input pin in order to indicate fault
gf
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current I , the input pin will fall to 0 V.
gf
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current I
.
ISS
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL logic circuit.
16/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
SOT-223 thermal data
Figure 30. SOT-223 PC board
.
Note:
Layout condition of R and Z measurements (PCB FR4 area = 58 mm x 58 mm,PCB
th th
thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to
2
0.8 cm ).
Figure 31. SOT-223 R
vs PCB copper area in open box free air condition
thj-amb
140
footprint
130
120
110
100
90
80
70
60
0
0,5
1
1,5
2
2,5
PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)
Doc ID 15586 Rev 2
17/28
Package and PCB thermal data
VNN1NV04P-E, VNS1NV04P-E
Figure 32. SOT-223 thermal impedance junction ambient single pulse
ZTH (°C/ W)
1000
Footprint
100
10
1
2
2 cm
0,1
0,0001
0,001
0,01
0,1
Time (s)
1
10
100
1000
Equation 1: pulse calculation formula
= R ⋅ δ + Z (1 – δ)
Z
THδ
TH
THtp
where δ = t /T
P
Figure 33. SOT-223 thermal fitting model of a single channel
Table 5.
SOT-223 thermal parameter
Area/island (cm2)
FP
2
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
0.8
1.6
4.5
24
0.1
100
45
18/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Package and PCB thermal data
Table 5.
SOT-223 thermal parameter (continued)
Area/island (cm2)
FP
2
C1 (W·s/°C)
C2 (W·s/°C)
C3 (W·s/°C)
C4 (W·s/°C)
C5 (W·s/°C)
C6 (W·s/°C)
0.00006
0.0005
0.03
0.16
1000
0.5
2
4.2
SO-8 thermal data
Figure 34. SO-8 PC board
Note:
Layout condition of R and Z measurements (PCB FR4 area = 58 mm x 58 mm,PCB
th th
thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 2 cm ).
2
Figure 35. SO-8 R
vs PCB copper area in open box free air condition
thj-amb
105
footprint
95
85
75
65
0
0,5
1
1,5
2
2,5
PCB Cu heatsink area (cm^ 2) - (refer to PCB layout)
Doc ID 15586 Rev 2
19/28
Package and PCB thermal data
VNN1NV04P-E, VNS1NV04P-E
Figure 36. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/ W)
1000
Footprint
100
10
1
2
2 cm
0,1
0,0001
0,001
0,01
0,1
1
10
100
1000
Time (s)
Equation 2: pulse calculation formula
= R ⋅ δ + Z (1 – δ)
Z
THδ
TH
THtp
where δ = t /T
P
Figure 37. SO-8 thermal fitting model of a single channel
Table 6.
SO-8 thermal parameter
Area/island (cm2)
FP
2
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
0.8
2.6
3.5
21
20/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Package and PCB thermal data
Table 6.
SO-8 thermal parameter (continued)
Area/island (cm2)
FP
2
R5 (°C/W)
R6 (°C/W)
16
58
28
C1 (W·s/°C)
C2 (W·s/°C)
C3 (W·s/°C)
C4 (W·s/°C)
C5 (W·s/°C)
C6 (W·s/°C)
0.00006
0.0005
0.0075
0.045
0.35
1.05
2
Doc ID 15586 Rev 2
21/28
Package and packing information
VNN1NV04P-E, VNS1NV04P-E
5
Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
5.1
SOT-223 mechanical data
Figure 38. SOT-223 mechanical data and package outline
22/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Package and packing information
5.2
SO8 mechanical data
Table 7.
SO-8 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
A1
A2
b
1.75
0.25
0.10
1.25
0.28
0.17
4.80
5.80
3.80
0.48
0.23
5.00
6.20
4.00
c
D(1)
4.90
6.00
3.90
1.27
E
E1(2)
e
h
0.25
0.40
0.50
1.27
L
L1
k
1.04
0°
8°
ccc
0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Doc ID 15586 Rev 2
23/28
Package and packing information
VNN1NV04P-E, VNS1NV04P-E
Figure 39. SO-8 package dimension
0016023 D
24/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Package and packing information
5.3
SOT-223 packing information
Figure 40. SOT-223 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
1000
1000
330
1.5
13
20.2
12.4
60
G (+ 2 / -0)
N (min)
T (max)
18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (+ 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
5.5
4.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
Doc ID 15586 Rev 2
25/28
Package and packing information
VNN1NV04P-E, VNS1NV04P-E
5.4
SO8 packing information
Figure 41. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
100
2000
C
Tube length (± 0.5)
532
3.2
6
A
A
B
C (± 0.1)
0.6
All dimensions are in mm.
Figure 42. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
2500
2500
330
1.5
13
20.2
12.4
60
G (+ 2 / -0)
N (min)
T (max)
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (+ 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
5.5
4.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
26/28
Doc ID 15586 Rev 2
VNN1NV04P-E, VNS1NV04P-E
Revision history
6
Revision history
Table 8.
Date
Document revision history
Revision
Changes
16-May-2009
29-Sep-2009
1
2
Initial release.
Removed target specification on cover page.
Doc ID 15586 Rev 2
27/28
VNN1NV04P-E, VNS1NV04P-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
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Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
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28/28
Doc ID 15586 Rev 2
VNS1NV04P-E 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| VNS1NV04PTR-E | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS1NV04TR | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS3NV04 | STMICROELECTRONICS | “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET | 获取价格 |
|
| VNS3NV0413TR | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS3NV04D | STMICROELECTRONICS | “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET | 获取价格 |
|
| VNS3NV04D-E | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS3NV04D13TR | STMICROELECTRONICS | OMNIFET II FULLY AUTOPROTECTED POWER MOSFET | 获取价格 |
|
| VNS3NV04DP-E | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS3NV04DPTR-E | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
| VNS3NV04DTR-E | STMICROELECTRONICS | OMNIFET II fully autoprotected Power MOSFET | 获取价格 |
|
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