VN5012AK-E [STMICROELECTRONICS]
Single channel high side driver with analog current sense for automotive applications; 模拟电流检测用于汽车应用的单通道高侧驱动器![VN5012AK-E](http://pdffile.icpdf.com/pdf1/p00098/img/icpdf/VN5012AKTR-E_524306_icpdf.jpg)
型号: | VN5012AK-E |
厂家: | ![]() |
描述: | Single channel high side driver with analog current sense for automotive applications |
文件: | 总31页 (文件大小:611K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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VN5012AK-E
Single channel high side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41V
Operating voltage range
VCC 4.5 to 36V
Max On-State resistance (per ch.) RON
12 mΩ
65 A
2 µA(1)
PowerSSO-24
Current limitation (typ)
ILIMH
IS
– Electrostatic discharge protection
Off state supply current (typ)
1. Typical value with all loads connected
Application
■ General features
■ All types of resistive, inductive and capacitive
– Inrush current active management by
power limitation
loads
– Very low stand-by current
Description
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
The VN5012AK-E is a monolithic device made
using STMicroelectronics VIPower M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active V pin voltage clamp protects the
CC
■ Diagnostic functions
device against low energy spikes (see ISO7637
transient compatibility table). This device
integrates an analog current sense which delivers
a current proportional to the load current
(according to a known ratio) when CS_DIS is
driven low or left open. When CS_DIS is driven
high, the CURRENT SENSE pin is in a high
impedance condition. Output current limitation
protects the device in overload condition. In case
of long overload duration, the device limits the
dissipated power to safe level up to thermal shut-
down intervention. Thermal shut-down with
automatic restart allows the device to recover
normal operation as soon as fault condition
disappears.
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protections
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Thermal shut down
– Reverse battery protection (see Figure 26)
Table 1. Device summary
Order codes
Tape & Reel
Package
Tube
PowerSSO-24
VN5012AK-E
VN5012AKTR-E
August 2008
Rev 6
1/31
www.st.com
31
Contents
VN5012AK-E
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
2.4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
GND Protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
3.1.1
3.1.2
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 21
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . 22
3.2
3.3
3.4
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
4
5
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1
5.2
5.3
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PowerSSO-24 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 27
PowerSSO-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
2/31
VN5012AK-E
List of tables
List of tables
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 9.
Table 8.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V<V <16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
CC
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3/31
List of figures
VN5012AK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6.
Figure 7.
Figure 8.
Figure 9.
I
/I
Vs. I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
OUT SENSE
OUT
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 11. Off state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 12. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 13. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 14. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 15. Input low level. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 17. On state resistance Vs. T
Figure 18. On state resistance Vs. V
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 20. Vs. T
I
LIMH
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 21. Turn- On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 22. Turn- Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 23. CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Application schematic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 27. Maximum turn Off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 25
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 25
Figure 32. PowerSSO-24 package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 33. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 34. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4/31
VN5012AK-E
Block diagram and pin description
1
Block diagram and pin description
Figure 1. Block diagram
V
CC
V
CC
UNDERVOLTAGE
PwCLAMP
CLAMP
DRIVER
OUTPUT
GND
I
LIM
V
DSLIM
LOGIC
Pwr
LIM
INPUT
OVERTEMP.
I
OUT
CURRENT
SENSE
K
CS_DIS
Table 2.
Pin function
Name
VCC
Function
Battery connection.
Power output.
OUTPUT
Ground connection. Must be reverse battery protected by an external diode/resistor
network.
GND
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
INPUT
CURRENT
SENSE1,2
Analog current sense pin, delivers a current proportional to the load current.
Active high CMOS compatible pin, to disable the current sense pin.
CS_DIS
5/31
Block diagram and pin description
Figure 2. Configuration diagram (top view)
VN5012AK-E
VCC
GND
NC
NC
INPUT
1
2
3
4
5
6
24
23
22
21
20
19
NC
NC
NC
OUTPUT
OUTPUT
OUTPUT
NC
CURRENT SENSE
7
8
9
10
11
12
18
17
16
15
14
13
OUTPUT
OUTPUT
OUTPUT
NC
NC
NC
NC
CS_DIS
NC
NC
VCC
TAB = VCC
Table 3.
Suggested connections for unused and N.C. pins
Connection / Pin
Current Sense
N.C.
Output
Input
CS_DIS
Floating
N.R.(1)
X
X
X
X
Through 10KΩ
Through 1KΩ
Through 10KΩ
To ground
X
N.R.
resistor
resistor
resistor
1. Not recommended.
6/31
VN5012AK-E
Electrical specifications
2
Electrical specifications
Figure 3. Current and voltage conventions
I
S
V
CC
V
F
V
CC
I
I
OUT
CSD
OUTPUT
CS_DIS
INPUT
V
V
OUT
CSD
I
IN
I
SENSE
CURRENT SENSE
GND
V
SENSE
V
IN
I
GND
Note:
V = V
- V during reverse battery condition.
F
OUT CC
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 4.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
V
VCC
-VCC
-IGND
IOUT
-IOUT
IIN
DC supply voltage
41
0.3
Reverse DC supply voltage
DC reverse ground pin current
DC output current
V
200
mA
A
Internally limited
-30
Reverse DC output current
DC input current
A
-1 to 10
-1 to 10
200
mA
mA
mA
ICSD
DC current sense disable input current
-ICSENSE DC reverse CS pin current
V
CC-41
V
V
VCSENSE Current Sense maximum voltage
+VCC
7/31
Electrical specifications
VN5012AK-E
Table 4.
Symbol
Absolute maximum ratings (continued)
Parameter
Value
Unit
Maximum switching energy
EMAX
VESD
VESD
Tj
508
mJ
(L=1.25 mH; RL=0Ω; Vbat=13.5V; Tjstart=150°C;
Electrostatic discharge
4000
2000
V
V
(Human Body Model: R=1.5KΩ; C=100pF)
Charge device model (CDM-AEC-Q100-011)
Junction operating temperature
Storage temperature
750
V
-40 to 150
-55 to 150
°C
°C
Tstg
2.2
Thermal data
Table 5.
Symbol
Thermal data
Parameter
Max value
Unit
Thermal resistance junction-case (MAX) (With one
channel On)
Rthj-case
0.4
°C/W
°C/W
Rthj-amb Thermal resistance junction-ambient (Max.)
See Figure 29
8/31
VN5012AK-E
Electrical specifications
2.3
Electrical characteristics
8V<V <36V; -40°C<T <150°C, unless otherwise specified.
CC
j
Table 6.
Symbol
Power section
Parameter
Test conditions
Min. Typ. Max. Unit
VCC
Operating supply voltage
Undervoltage shutdown
4.5
13
36
V
V
VUSD
3.5
4.5
Undervoltage shut-down
hysteresis
VUSDhyst
0.5
V
IOUT= 5A; Tj=25°C
12
24
16
mΩ
mΩ
mΩ
RON
On state resistance(2)
Clamp voltage
IOUT= 5A; Tj=150°C
IOUT= 5A; VCC=5V; Tj=25°C
Vclamp
IS=20mA
41
46
52
V
Off State; VCC=13V; Tj=25°C;
VIN=VOUT=VSENSE=VCSD=0V
IS
Supply current
2(1)
1.5
5(1)
3
µA
On State; VCC=13V; VIN=5V;
IOUT=0A
mA
VIN=VOUT=0V; VCC=13V;
Tj=25°C
0
0
0.01
3
5
Off state output
current(2)
IL(off)
µA
V
VIN=VOUT=0V; VCC=13V;
Tj=125°C
Output - VCC diode
voltage(2)
VF
-IOUT= 8A; Tj=150°C
0.7
1. PowerMOS leakage included.
2. For each channel.
Table 7.
Symbol
td(on)
td(off)
Switching (V = 13V; T = 25°C)
CC j
Parameter
Test conditions
Min. Typ. Max. Unit
Turn-On delay time
Turn-Off delay time
RL= 2.6 Ω (see Figure 8)
RL= 2.6 Ω (see Figure 8)
RL= 2.6 Ω
30
µs
µs
55
dVOUT/dt(on) Turn-On voltage slope
dVOUT/dt(off) Turn-Off voltage slope
See Figure 21
See Figure 22
V/ µs
V/ µs
RL= 2.6 Ω
Switching energy losses
during twon
WON
RL= 2.6 Ω (see Figure 8)
RL= 2.6 Ω (see Figure 8)
1.2
0.7
mJ
mJ
Switching energy losses
during twoff
WOFF
9/31
Electrical specifications
VN5012AK-E
Table 8.
Symbol
Logic input
Parameter
Test conditions
Min. Typ. Max. Unit
VIL
IIL
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
0.9
V
µA
V
VIN=0.9V
1
VIH
2.1
IIH
VIN=2.1V
10
µA
V
VI(hyst)
0.25
5.5
IIN=1mA
IIN=-1mA
7
V
V
VICL
VCSDL
ICSDL
Input clamp voltage
-0.7
CS_DIS low level voltage
0.9
V
Low level CS_DIS
current
VCSD=0.9V
1
µA
CS_DIS high level
voltage
VCSDH
ICSDH
VCSD(hyst)
2.1
V
µA
V
High level CS_DIS
current
V
CSD=2.1V
10
7
CS_DIS hysteresis
voltage
0.25
5.5
I
CSD=1mA
V
V
VCSCL
CS_DIS clamp voltage
ICSD=-1mA
-0.7
(1)
Table 9.
Symbol
Protections and diagnostics
Parameter
Test conditions
CC=13V
Min.
Typ. Max. Unit
V
45
65
90
90
A
A
IlimH
DC Short circuit current
5V<VCC<36V
Short circuit current
during thermal cycling
IlimL
VCC=13V TR<Tj<TTSD
24
A
TTSD
TR
Shutdown temperature
Reset temperature
150
175
200
°C
°C
T
+ 1 T + 5
RS
RS
Thermal reset of
STATUS
TRS
135
°C
°C
V
Thermal hysteresis
THYST
7
(T
-T )
R
TSD
Turn-off output voltage
clamp
VDEMAG
IOUT=2A; VIN=0; L=6mH
VCC-41 VCC-46 VCC-52
IOUT= 0.5A;
Output voltage drop
limitation
VON
Tj= -40°C...+150°C
(see Figure 9)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/31
VN5012AK-E
Electrical specifications
Table 10. Current sense (8V<V <16V)
CC
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
IOUT=0.25A; VSENSE=0.5V;
VCSD=0V;
K0
IOUT/ISENSE
3090 5080 7070
Tj= -40°C...150°C
IOUT=5A; VSENSE=0.5V;VCSD=0V;
Tj= -40°C...150°C
3590 4480 5370
3790 4480 5170
K1
IOUT/ISENSE
IOUT=5A; VSENSE=0.5V;VCSD=0V;
Tj= 25°C...150°C
IOUT=5A; VSENSE= 0.5V;
VCSD=0V;
Current sense ratio
drift
(1)
dK /K
-8
+8
%
%
%
1
1
2
3
TJ= -40 °C to 150 °C
IOUT=10A; VSENSE=4V;VCSD=0V;
Tj= -40°C...150°C
4080 4510 4980
4160 4510 4860
K2
IOUT/ISENSE
IOUT=10A; VSENSE=4V;VCSD=0V;
Tj= 25°C...150°C
IOUT=10 A; VSENSE= 4 V;
VCSD=0V;
Current sense ratio
drift
(1)
dK /K
-5
+5
2
TJ= -40 °C to 150 °C
IOUT=25A; VSENSE=4V;VCSD=0V;
Tj= -40°C...150°C
4420 4600 4780
4460 4600 4740
K3
IOUT/ISENSE
IOUT=25A; VSENSE=4V;VCSD=0V;
Tj= 25°C...150°C
IOUT=25 A; VSENSE= 4 V;
VCSD=0V;
Current sense ratio
drift
(1)
dK /K
-4
+4
3
TJ= -40 °C to 150 °C
I
OUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V; Tj=-40°C...150°C
VCSD=0V; VIN=5V; Tj=-40°C...150°C
0
0
1
2
µA
µA
Analog sense
leakage current
ISENSE0
IOUT= 2A; VSENSE= 0V;
VCSD= 5V; VIN=5V; Tj=-40°C...150°C
0
1
µA
Openload On state
current detection
threshold
IOL
VIN = 5V, ISENSE= 5 µA
IOUT=15A; VCSD=0V
10
45
mA
Max analog sense
output voltage
VSENSE
5
V
V
Analog sense
output voltage in
overtemperature
condition
VSENSEH
VCC=13V; RSENSE=2.2KΩ
9
8
Analog sense
output current in
overtemperature
condition
ISENSEH
VCC= 13V; VSENSE= 5V
mA
11/31
Electrical specifications
Table 10. Current sense (8V<V <16V) (continued)
VN5012AK-E
CC
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V
SENSE<4V, 1.5A<Iout<25A
Delay response
time from falling
edge of CS_DIS pin
t
ISENSE=90% of ISENSE max
50
5
100
20
µs
µs
µs
DSENSE1H
(see Figure 4)
V
SENSE<4V, 1.5A<Iout<25A
Delay response
tDSENSE1L time from rising
edge of CS_DIS pin
ISENSE=10% of ISENSE max
(see Figure 4)
VSENSE<4V, 1.5A<Iout<25A
Delay response
time from rising
t
ISENSE=90% of ISENSE max
270
400
DSENSE2H
edge of INPUT pin
(see Figure 4)
Delay response
time between rising
edge of output
current and rising
edge of current
sense
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX= 5A (see Figure 5)
∆t
300
250
µs
µs
DSENSE2H
VSENSE<4V, 1.5A<Iout<25A
ISENSE=10% of ISENSE max
(see Figure 4)
Delay response
tDSENSE2L time from falling
edge of INPUT pin
100
1. Parameter guaranteed by design, it is not tested.
Figure 4. Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
tDSENSE1L
tDSENSE1H
tDSENSE2L
12/31
VN5012AK-E
Figure 5.
Electrical specifications
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
V
IN
∆t
DSENSE2H
t
t
t
I
OUT
I
OUTMAX
90% I
OUTMAX
I
SENSE
I
SENSEMAX
90% I
SENSEMAX
13/31
Electrical specifications
Figure 6.
VN5012AK-E
I
/I
Vs. I
OUT SENSE OUT
IOUT/ISENSE
5500
5000
4500
4000
3500
3000
max Tj = -40°C to 150°C
max Tj= 25°C to 150°C
typical value
min Tj= 25°C to 150°C
min Tj= -40°C to 150°C
5
7
9
11
13
15
17
19
21
23
25
IOUT (A)
Figure 7.
Maximum current sense ratio drift vs load current
dk/k(%)
15
10
5
0
-5
-10
-15
5
10
15
OUT
20
25
I
(A)
Note:
Parameter guaranteed by design; it is not tested.
14/31
VN5012AK-E
Electrical specifications
Sense (VCSD=0V)(1)
Table 11. Truth table
Conditions
Input
Output
L
L
0
Normal operation
H
H
Nominal
L
L
L
0
Overtemperature
Undervoltage
H
VSENSEH
L
L
L
0
0
H
L
H
H
L
L
L
0
Short circuit to GND
0 if Tj < TTSD
(Rsc ≤10 mΩ)
VSENSEH if Tj > TTSD
L
H
H
0
Short circuit to VCC
H
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Figure 8. Switching characteristics
VOUT
t
t
Won
Woff
90%
80%
tr
dVOUT/dt(off)
dVOUT/dt(on)
10%
tf
t
INPUT
td(on)
td(off)
t
Figure 9. Output voltage drop limitation
V
-V
cc out
Tj=150oC
Tj=25oC
Tj=-40oC
V
on
I
out
V
/R
on on(T)
15/31
Electrical specifications
Table 12. Electrical transient requirements
VN5012AK-E
Test levels(1)
ISO 7637-2:
2004(E)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
III
IV
Test pulse
1
-75V
+37V
-100V
+75V
-100V
+50V
-150V
+100V
5000 pulses
0.5 s
0.2 s
5 s
2 ms, 10 Ω
50 µs, 2 Ω
2a
3a
3b
5000 pulses
5 s
1h
1h
90 ms
90 ms
100 ms
100 ms
0.1 µs, 50 Ω
0.1 µs, 50 Ω
100 ms, 0.01
4
-6V
-7V
1 pulse
1 pulse
Ω
5b(2)
+65V
+87V
400 ms, 2 Ω
Test level results(1)
ISO 7637-2:
2004(E)
III
C
C
C
C
C
C
IV
C
C
C
C
C
C
Test pulse
1
2
3a
3b
4
5(2)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
E
16/31
VN5012AK-E
Figure 10. Waveforms
Electrical specifications
NORMAL OPERATION
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
SHORT TO VCC
INPUT
CS_DIS
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERLOAD OPERATION
TTSD
TRS
TR
Tj
INPUT
CS_DIS
ILIMH
ILIML
LOAD CURRENT
SENSE CURRENT
VSENSEH
thermal cycling
SHORTED LOAD
current
limitation
power
limitation
NORMAL LOAD
17/31
Electrical specifications
VN5012AK-E
2.4
Electrical characteristics curves
Figure 11. Off state output current
Figure 12. High level input current
Iloff (uA)
0.3
Iih (uA)
5
4.5
Vin=2.1V
0.25
Off State
4
Vcc=13V
Vin=Vout=0V
3.5
3
0.2
0.15
0.1
0.05
0
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
150
150
175
175
175
Tc (°C )
Tc (°C )
Figure 13. Input clamp voltage
Figure 14. Input high level
Vicl (V)
7
Vih (V)
4
6.8
3.5
3
lin=1mA
6.6
6.4
6.2
6
2.5
2
5.8
5.6
5.4
5.2
5
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C )
Tc (°C )
Figure 15. Input low level
Figure 16. Input hysteresis voltage
Vil (V)
2
Vihyst (V)
1
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.8
0.6
0.4
0.2
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C )
Tc (°C )
18/31
VN5012AK-E
Electrical specifications
Figure 17. On state resistance Vs. T
Figure 18. On state resistance Vs. V
CC
case
Ron (mOhm)
20
Ron (mOhm)
18
17
18
16
14
12
10
8
Io u t=5A
Vcc=13V
16
Tc=150°C
Tc=125°C
15
14
13
12
11
10
9
Tc=25°C
Tc=-40°C
6
8
0
5
10
15
20
25
30
35
40
-50
-25
0
25
50
75
100
125
150
175
175
175
Vcc (V)
Tc (°C )
Figure 19. Undervoltage shutdown
Figure 20. I
Vs. T
LIMH
case
Ilimh (A)
100
Vusd (V)
16
90
80
70
60
50
40
30
20
10
0
14
12
10
8
Vcc=13V
6
4
2
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
Tc (°C )
Tc (°C )
Figure 21. Turn- On voltage slope
Figure 22. Turn- Off voltage slope
(dVout/dt)on (V/ms)
1000
(dVout/dt)off (V/ms)
1000
900
900
Vcc=13V
RI=2.6Ohm
Vcc=13V
RI=2.6Ohm
800
800
700
700
600
500
400
300
200
100
0
600
500
400
300
200
100
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Tc (°C )
19/31
Electrical specifications
VN5012AK-E
Figure 23. CS_DIS high level voltage
Figure 24. CS_DIS clamp voltage
Vcsdcl (V)
8
Vcsdh (V)
8
7.5
7
6
5
4
3
2
1
0
Ic s d=1mA
7
6.5
6
5.5
5
4.5
4
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Tc (°C )
Figure 25. CS_DIS low level voltage
Vcsdl (V)
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
20/31
VN5012AK-E
Application information
3
Application information
Figure 26. Application schematic
+5V
V
CC
R
prot
CS_DIS
D
ld
µC
R
INPUT
prot
OUTPUT
R
prot
CURRENT SENSE
GND
R
SENSE
R
GND
V
D
GND
GND
C
ext
3.1
GND Protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (R
only)
GND
This can be used with any type of load.
The following is an indication on how to dimension the R
resistor.
GND
1.
2.
R
R
≤600mV / (I
).
GND
GND
S(on)max
≥ (−V ) / (-I
)
CC
GND
where -I
is the DC reverse ground pin current and can be found in the absolute
GND
maximum rating section of the device datasheet.
Power Dissipation in R
(when V <0: during reverse battery situations) is:
CC
GND
2
P = (-V ) /R
D
CC
GND.
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where I
maximum on-state currents of the different devices.
becomes the sum of the
S(on)max
Please note that if the microprocessor ground is not shared by the device ground then the
will produce a shift (I * R ) in the input thresholds and the status output
R
GND
S(on)max
GND
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same R
.
GND
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
21/31
Application information
VN5012AK-E
3.1.2
Solution 2: a diode (D
) in the ground line
GND
A resistor (R
inductive load.
=1kΩ) should be inserted in parallel to D if the device drives an
GND
GND
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if m.ore than one HSD shares the same diode/resistor
network.
3.2
3.3
Load dump protection
D is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
ld
V
max DC rating. The same applies if the device is subject to transients on the V line
CC
CC
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
MCU I/Os protection
If a ground protection network is used and negative transient are present on the V line,
CC
the control pins will be pulled negative. ST suggests to insert a resistor (R ) in line to
prot
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (input levels compatibility) with the latch-up limit of µC
I/Os.
-V
/I
≤R
≤(V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND IHmax
Calculation example:
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
5kΩ ≤R
≤180kΩ.
prot
Recommended values: R
= 10kΩ, C
= 10nF.
EXT
prot
22/31
VN5012AK-E
Application information
3.4
Maximum demagnetization energy (VCC = 13.5V)
Figure 27. Maximum turn Off current versus inductance
100
A
B
C
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with R =0 Ω. In case of repetitive pulses, T
(at beginning of each
jstart
L
demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
23/31
Package and PCB thermal data
VN5012AK-E
4
Package and PCB thermal data
4.1
PowerSSO-24 thermal data
Figure 28. PowerSSO-24 PC board
Note:
Layout condition of R and Z measurements (PCB: Double layer, Thermal Vias, FR4
th th
area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70 µm (front and back side),
2
Copper areas: from minimum pad lay-out to 8cm ).
Figure 29. R
Vs. PCB copper area in open box free air condition
thj-amb
RTHj_amb(°C/W)
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
24/31
VN5012AK-E
Package and PCB thermal data
Figure 30. PowerSSO-24 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Footprint
100
10
2 cm2
8 cm2
1
0.1
0.01
0.0001 0.001
0.01
0.1
1
10
100
1000
Time (s)
Equation 1: pulse calculation formula
ZTHδ = RTH ⋅ δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
(a)
Figure 31. Thermal fitting model of a single channel HSD in PowerSSO-24
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
25/31
Package and PCB thermal data
Table 13. Thermal parameter
VN5012AK-E
8
Area/island (cm2)
Footprint
0.1
2
R1 (°C/W)
R2 (°C/W)
0.3
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
9
9
8
R6 (°C/W)
28
17
10
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.0025
0.0024
0.025
0.75
1
4
5
9
2.2
17
26/31
VN5012AK-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
PowerSSO-24 package mechanical data
Figure 32. PowerSSO-24 package dimensions
27/31
Package and packing information
Table 14. PowerSSO-24 mechanical data
VN5012AK-E
Millimeters
Typ.
Symbol
Min.
2.15
2.15
0
Max.
2.47
2.40
0.1
A
A2
a1
b
0.33
0.23
10.10
7.4
0.51
0.32
10.50
7.6
c
D
E
e
0.8
8.8
e3
G
G1
H
h
0.1
0.06
10.5
0.4
10.1
0.55
L
0.85
10deg
4.7
N
X
4.1
6.5
Y
7.1
28/31
VN5012AK-E
Package and packing information
5.3
PowerSSO-24 packing information
Figure 33. PowerSSO-24 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
49
1225
Tube length ( 0.5)
A
532
3.5
C
B
B
13.8
0.6
C ( 0.1)
All dimensions are in mm.
A
Figure 34. PowerSSO-24 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
1000
1000
330
1.5
13
20.2
24.4
100
G (+ 2 / -0)
N (min)
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing P0 ( 0.1)
W
24
4
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
P
12
D ( 0.05) 1.55
D1 (min) 1.5
F ( 0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing
P1 ( 0.1)
2
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
29/31
Revision history
VN5012AK-E
6
Revision history
Table 15. Document revision history
Date
Revision
Changes
24-Jan-2006
1
Initial release.
Document reformatted and restructured.
13-Feb-2007
2
Added Section 3.4: Maximum demagnetization energy (VCC = 13.5V).
Document reformatted and restructured.
Added lists of tables and figures.
Added ECOPACK® packages information.
Table 4: Absolute maximum ratings: changed EMAX value from 283 to
508 mJ.
Table 10: Current sense (8V<VCC<16V) : added dk1/k1, dk2/k2,
03-Oct-2007
3
dk3/k3, ∆tDSEN 2H parameters.
SE
Added Figure 5: Delay response time between rising edge of ouput
current and rising edge of current sense (CS enabled) .
Updated Figure 6: IOUT/ISENSE Vs. IOUT
.
Added Figure 7: Maximum current sense ratio drift vs load current.
Table 12: Electrical transient requirements - Updated test level values
III and IV for test pulse 5b and notes.
Updated Table 10: Current sense (8V<VCC<16V) :
– changed dk1/k1 values from 7 to 8 %
– changed dk2/k2 values from 3 to 5 %
– changed dk3/k3 values from 2 to 4 %
– changed tDSENSE2H max value from 600 µs to 400 µs
13-Dec-2007
4
– changed ∆tDSEN 2H max value from 250 µs to 300 µs
SE
– added IOL parameter.
Updated Figure 7: Maximum current sense ratio drift vs load current
with new dk/k values.
Corrected typing error in Table 10: Current sense (8V<VCC<16V) :
12-Feb-2008
01-Aug-2008
5
6
changed IOL test condition from VIN = 0V to VIN = 5V.
Updated Table 14: PowerSSO-24 mechanical data: changed a1 max.
value from 0.075 mm to 0.1 mm.
30/31
VN5012AK-E
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VN5012AKTR-E
Single channel high side driver with analog current sense for automotive applications
STMICROELECTR
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VN5012SAKTR-E
Single channel high side driver with analog current sense for automotive applications
STMICROELECTR
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VN5016AJ-E
Single channel high side driver with analog current sense for automotive applications
STMICROELECTR
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VN5016AJ-E_08
Single channel high side driver with analog current sense for automotive applications
STMICROELECTR
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VN5016AJTR-E
Single channel high side driver with analog current sense for automotive applications
STMICROELECTR
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VN50300L-18
Small Signal Field-Effect Transistor, 0.033A I(D), 500V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-226AA,
TEMIC
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VN50300L-18
Small Signal Field-Effect Transistor, 0.033A I(D), 500V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-226AA
VISHAY
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