STK24N4LLH5 [STMICROELECTRONICS]
N-channel 40 V, 0.0046 Ω, 24 A, PolarPAK® STripFET™V Power MOSFET; N沟道40 V， 0.0046 Ω ， 24 A， PolarPAK®的STripFET ™ V功率MOSFET
| 型号： | STK24N4LLH5 |
| 厂家： | 
ST |
| 描述： | N-channel 40 V, 0.0046 Ω, 24 A, PolarPAK® STripFET™V Power MOSFET |
| 文件： | 总13页 (文件大小：336K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STK24N4LLH5
N-channel 40 V, 0.0046 Ω, 24 A, PolarPAK®
STripFET™V Power MOSFET
Preliminary Data
Features
RDS(on)
max
VDSS
RDS(on)*Qg
Type
STK24N4LLH5
40 V
< 0.0055 Ω 96 nC*mΩ
■ Ultra low top and bottom junction to case
thermal resistance
■ R
* Q industry benchmark
g
DS(on)
PolarPAK®
■ Extremely low on-resistance R
DS(on)
■ Very low switching gate charge
■ Fully encapsulated die
■ 100% matte tin finish (in compliance with the
2002/95/EC european directive)
■ High avalanche ruggedness
Figure 1.
Internal schematic diagram
■ PolarPAK® is a trademark of VISHAY
Application
■ Switching applications
Description
This product utilizes the 5th generation of design
rules of ST’s proprietary STripFET™ technology.
The lowest available R
*Q , in this chip scale
DS(on)
g
Bottom View
Top View
package, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
Table 1.
Device summary
Order code
Marking
Package
PolarPAK®
Packaging
STK24N4LLH5
244L5
Tape and reel
September 2008
Rev 2
1/13
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
www.st.com
13
Contents
STK24N4LLH5
Contents
1
2
3
4
5
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Test circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
STK24N4LLH5
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings
Parameter
Value
40
Unit
V
VDS
VGS
Drain-source voltage (VGS = 0)
Gate-source voltage
22
V
(1)
Drain current (continuous) at TC = 25 °C
Drain current (continuous) at TC = 100 °C
24
A
ID
ID
15.3
96
A
(2)
Drain current (pulsed)
A
IDM
(1)
Total dissipation at TC = 25 °C
Derating factor
5.2
0.0416
TBD
W
W/°C
J
PTOT
(3)
Single pulse avalanche energy
EAS
Tj
Operating junction temperature
Storage temperature
-55 to 150
°C
Tstg
1. When mounted on FR-4 board of 1inch2, 2 oz Cu and ≤10sec
2. Pulse width limited by package
3. Starting TJ = 25 °C, ID = 12 A, VDD = 25 V
Table 3.
Symbol
Thermal data
Parameter
Typ.
Max.
24
Unit
°C/W
°C/W
°C/W
Rthj-amb(1)
Rthj-c(2)
Thermal resistance junction-amb
20
1
Thermal resistance junction-case (top drain)
Thermal resistance junction-case (source)
1.2
3.4
Rthj-c(3)
2.8
1. When mounted on FR-4 board of 1inch2, 2 oz Cu and ≤10sec
2. Steady state
3. Measured at source pin when the device is mounted on FR-4 board in steady state
3/13
Electrical characteristics
STK24N4LLH5
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 4.
Symbol
On/off states
Parameter
Test conditions
Min. Typ.
Max. Unit
Drain-source breakdown
voltage
V(BR)DSS
ID = 250 µA, VGS= 0
40
V
V
DS = Max rating,
1
µA
µA
Zero gate voltage drain
current (VGS = 0)
IDSS
VDS = Max rating,Tc=125°C
10
Gate body leakage current
(VDS = 0)
IGSS
VGS = 22 V
±100
nA
V
VGS(th)
RDS(on)
VDS= VGS, ID = 250 µA
Gate threshold voltage
1
2.5
VGS= 10 V, ID= 12 A
VGS= 4.5 V, ID= 12 A
0.0046 0.0055
0.0058 0.0065
Ω
Ω
Static drain-source on
resistance
Table 5.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
Input capacitance
Ciss
Coss
Crss
2350
335
50
pF
pF
pF
Output capacitance
VDS =25 V, f=1 MHz, VGS=0
Reverse transfer
capacitance
Qg
Qgs
Qgd
VDD=15 V, ID = 24 A
VGS =4.5 V
Total gate charge
Gate-source charge
Gate-drain charge
20
nC
nC
nC
TBD
TBD
(see Figure 3)
f=1 MHz Gate DC Bias = 0
Test signal level = 20 mV
open drain
RG
Gate input resistance
TBD
Ω
4/13
STK24N4LLH5
Electrical characteristics
Min. Typ. Max. Unit
Table 6.
Switching times
Parameter
Symbol
Test conditions
VDD= 15 V, ID= 12 A,
RG=4.7 Ω, VGS=4.5 V
(see Figure 2)
td(on)
tr
Turn-on delay time
Rise time
TBD
TBD
ns
ns
V
DD=15 V, ID= 12 A,
td(off)
tf
Turn-off delay time
Fall time
TBD
TBD
ns
ns
RG=4.7 Ω, VGS=4.5 V
(see Figure 2)
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
Source-drain current
ISD
24
96
A
A
Source-drain current
(pulsed)
(1)
ISDM
(2)
ISD= 24 A, VGS=0
Forward on Voltage
1.1
V
VSD
trr
ISD= 24 A, di/dt = 100 A/µs,
VDD=20 V, Tj=150°C
Reverse recovery time
Reverse recovery charge
Reverse recovery current
TBD
TBD
TBD
ns
nC
A
Qrr
(see Figure 7)
IRRM
1. Pulse width limited by package
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
5/13
Test circuits
STK24N4LLH5
3
Test circuits
Figure 2. Switching times test circuit for
resistive load
Figure 3. Gate charge test circuit
Figure 4. Test circuit for inductive load
switching and diode recovery times
Figure 5. Unclamped inductive load test
circuit
Figure 6. Unclamped inductive waveform
Figure 7. Switching time waveform
6/13
STK24N4LLH5
Test circuits
Figure 8. Gate charge waveform
Id
Vds
Vgs
Vgs(th)
Qgs1
Qgs2
Qgd
7/13
Package mechanical data
STK24N4LLH5
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
8/13
STK24N4LLH5
Package mechanical data
®
Table 8.
PolarPAK (option “S”) mechanical data
mm
inch
Ref.
Min.
Typ.
Max.
Min.
Typ.
Max.
A
A1
b1
b2
b3
b4
b5
c
0.75
0.80
0.85
0.05
0.68
0.61
2.39
1.19
0.43
0.30
6.30
6.04
5.31
5.05
0.030
0.031
0.033
0.002
0.027
0.024
0.094
0.047
0.017
0.012
0.248
0.238
0.209
0.199
0.48
0.41
2.19
0.89
0.23
0.20
6
0.58
0.51
2.29
1.04
0.33
0.25
6.15
5.89
5.16
4.90
0.019
0.016
0.086
0.035
0.009
0.008
0.236
0.226
0.197
0.187
0.009
0.018
0.012
0.018
0.075
0.014
0.166
0.009
0.169
0.135
0.009
0.002
0.006
0.137
0.022
0.047
0.154
0.023
0.020
0.090
0.041
0.013
0.010
0.242
0.232
0.203
0.193
D
D1
E
5.74
5.01
4.75
0.23
0.45
0.31
0.45
1.92
0.38
4.22
0.24
4.30
3.43
0.22
0.05
0.15
3.48
0.56
1.20
3.90
E1
H1
H2
H3
H4
I1
0.56
0.51
0.56
2.02
0.48
4.52
0.022
0.020
0.022
0.079
0.018
0.178
0.41
0.016
1.97
0.43
4.37
0.077
0.016
0.172
J1
K1
K4
M1
M2
M3
M4
P1
T1
T2
T3
T4
T5
<
4.50
3.58
4.70
3.73
0.177
0.141
0.185
0.147
0.20
3.64
0.76
0.25
4.10
0.95
0.008
0.143
0.030
0.010
0.161
0.037
0.18
10°
0.36
12°
0.007
10°
0.014
12°
0°
0°
9/13
Package mechanical data
Figure 9.
STK24N4LLH5
®
PolarPAK (option “S”) drawings
10/13
STK24N4LLH5
Figure 10. Recommended PAD layout
Package mechanical data
11/13
Revision history
STK24N4LLH5
5
Revision history
Table 9.
Date
Document revision history
Revision
Changes
07-Jul-2008
03-Sep-2008
1
2
First release
RDS(on) value updated
VDS value updated in Table 2 and Table 4
12/13
STK24N4LLH5
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