STB5600TR [STMICROELECTRONICS]

RF/MICROWAVE DOWN CONVERTER, TQFP-32;


型号：	STB5600TR
厂家：	ST
描述：	RF/MICROWAVE DOWN CONVERTER, TQFP-32 全球定位系统
文件：	总10页 (文件大小：75K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

STB5600

GPS RF FRONT-END IC

■

ONE CHIP SYSTEM TO INTERFACE

ACTIVE ANTENNA TO ST20GP1

MICROCONTROLLER

COMPLETE RECEIVER USING NOVEL

DUAL CONVERSION ARCHITECTURE WITH

SINGLE IF FILTER

■

MINIMUM EXTERNAL COMPONENTS

COMPATIBLE WITH GPS L1 SPS SIGNAL

INTERNALLY STABILISED POWER RAILS

CMOS OUTPUT LEVELS

FROM 3.3 TO 5.9V SUPPLY VOLTAGE

TQFP32 PACKAGE

TQFP32

MARKING:

STB5600

TRACEAB. CODE

ASSY CODE

DESCRIPTION

The STB5600, using STMicroelectronics HSB2,

High Speed Bipolar technology, implements a

Global Positioning System RF front-end.

PIN CONNECTION (top view)

The chip provides down conversion from the GPS

(L1) signal at 1575 MHz via an IF of 20MHz to an

output frequency of 4MHz suitable for ST20GP1

GPS processor.

It uses a single external reference oscillator to

generate both RF local oscillator signals and the

processor reference clock.

1/10

August 1998

STB5600

FUNCTIONAL DESCRIPTION

The STB5600 GPS front-end is fed with the signal from an active antenna, via a ceramic RF filter. The

gain between the antenna element and the STB5600 is expected to be between 10dB and 35dB

overall, made up of the antenna LNA gain, the feeder loss, connector loss, and the ceramic filter loss.

In order to use an off-the-shelfceramic filter, conventionally50 Ohms single ended, a matchingcircuit is

used. (see appendix A.1), which provides a 300 Ohm differential drive to the STB5600. A similar circuit

can be used to feed the LO signal if using the recommended low-cost oscillator circuit (appendix A.3).

Note that the STB5600 radio architecture and the oscillator described here are covered by various

patents held by SGS-Thomson and by others. The use of the circuits described in this data-sheetfor any

other purposemay infringe such patents.

- RF SECTION

The differential input signal is amplified by the RF-Amp and mixed with the oscillator signal amplified

from the LO+,LO- inputs to generate a balanced 20.46MHz IF signal. The LO buffer amplifier may be

fed differentialor single ended signals, at levels between -60dBm and -20dBm .

- IF SECTION

The 20MHz differential signal from the mixer is fed through an external LC filter to suppressundesirable

signals and mixer products. The multi-stage high-sensitivity limiting amplifier is connected to a D-type

latch clocked by an internally derived 16MHz clock.. The effect of sampling the 20MHz signal at 16MHz

is to create a sub-sampling alias at 4MHz. This is fed to the output level-converters.

- DIVIDER SECTION

The 80MHz oscillator signal may be provided single-ended or differentially to the high impedance

80MHz+, 80MHz- inputs. Any unused inputs should be connected to GNDLOGIC via a 1nF capacitor.

The 80MHz signal is amplified, then divided by 5 to create the 16.368MHz clock required by the

ST20GP1processor, also used to clock the outputlatch of the STB5600.

- OUTPUT SECTION

The output latch samples the 20.46MHz intermediate frequency at a 16.368MHz rate, performing the

dual function of second downconversion and latching. The downconversion occurs by sub-sampling

aliasing, such that the digital output represents a 4.096MHz centre frequency

The output buffers perform level translation from the internal ECL levels to CMOS compatible outputs

referred to external ground.

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V_CC

DC Supply Voltage

5.9

RF+, RF- RF Input

150

dBm

^oC

T_j

Junction Temperature

T_stg

Storage Temperature Range

-40 to 125

^oC

^oC/W

R_thj-ambThermal Resistance Junction-ambient

2/10

STB5600

PIN CONFIGURATION

Apply 5V at the CE, V_CCRF, V_CCIF, V_CCLOGICpins, apply 3 V at the V_CCDRIVE

Symbol

IF1+

Typ. DC Bias

3.6 V

5 V

Dexription

Mixer Output 1

External circuit

see application circuit

100 nF to V_EERF

AC Coupled

IF1-

Mixer Output 2

V_CCRF

RF Power Supply

RF Input

RF+

3.5 V

5 V

RF-

RF Input

AC Coupled

V_CCRF

RF Power Supply

RF Voltage Reference

RF Ground

100 nF to VEERF

100 nF to VCCRF

V_EERF

2 V

GNDRF

V_CCRF

0 V

5 V

RF Power Supply

Local Oscillator Input

RF Power Supply

Logic Power Supply

80 MHz Clock Input

Logic Power Supply

Logic Voltage Reference

16 MHz Clock CMOS Output

100 nF to VEERF

AC Coupled

LO+

3.5 V

5 V

LO-

AC Coupled

V_CCRF

100 nF to VEERF

100 nF to VEELOGIC

AC Coupled

V_CCLOGIC

80 MHz+

80 MHz-

V_CCLOGIC

V_EELOGIC

CLOCK+

Not Connected

GND_DRIVE

DATA

5 V

4 V

AC Coupled

5 V

100 nF to VEELOGIC

100 nF to VCCLOGIC

7 pF to GND_DRIVE

2 V

0.3 V or 3 V

0 V

0.3 V or 3 V

0 V

CMOS Drive Ground

4 MHz Data CMOS Output

CMOS Drive Ground

CMOS Drive Power Supply

Chip Enable

7 pF to GND_DRIVE

GND_DRIVE

V_CCDRIVE

3 V

GND

0 V

Substrate Ground

Logic Ground

GND_LOGIC

GND_IF

V_EEIF

0 V

IF Ground

2 V

IF Voltage Reference

IF Power Supply

100 nF to VCCIF

100 nF to VEEIF

V_CCIF

5 V

IF2-

4 V

Limiting Amplifier Input

IF Power Supply

see application circuit

100 nF to VEEIF

IF2+

4 V

V_CCIF

5 V

3/10

STB5600

ELECTRICAL SPECIFICATION (V_VCCRF= 3.3 V ...5.9 V; V_VCCIF= 3.3 V ...5.9 V; V_{VCC LOGIC}= 3.3 V

...5.9 V V_VCCDRIVE= 3 V; T_a= 25 ^oC unless otherwise specified)

LNA MIXER

Symbol

I_VCCRF

Z_in

Parameter

Note

Min.

Typ.

Max.

Unit

Supply Current

VVCCRF = 5 V

Differential Input

Impedance

@ 1575 MHz AC Coupled at RF+

RF- inputs

300

Ω

Z_out

G_C

Differential Output

Impedance

@ 20 MHz AC Coupled at IF1+ IF1-

outputs

Ω

Voltage Conversion

Gain

R_L> 3KΩ, P_IN= -80 dBm

(V_in= 75 µVp on 300 Ω)

IIP1

Input Compression

Point (1dB)

(see application circuit)

-60

dBm

f_RF

Noise figure

Input Signal

1575

MHz

Frequency (L1)

f_IF

Output Signal

Frequency

MHz

LO INPUT BUFFER

Symbol

Parameter

Note

Min.

Typ.

Max.

Unit

Z_in

Differential Input

Impedance

@ 1555 MHz AC Coupled at LO+

LO- inputs

300

Ω

Input Signal Level

-60

-40

-20

dBm

LIMITING AMPLIFIER

Symbol

I_VCCIF

Z_in

Parameter

Note

Min.

Typ.

Max.

Unit

Supply Current

VVCCIF = 5 V

2.5

3.5

Differential Input

Impedance

@ 20 MHz AC Coupled at IF2+ IF2-

inputs

KΩ

Bandwidth 3dB

MHz

µVp

Sens

V_INMAX

Limiter sensitivity

Input Signal @ 20 MHz AC Coupled

100

Maximum Input Signal Input Signal @ 20 MHz AC Coupled

0.5

CLOCK INPUT BUFFER

Symbol

Parameter

Note

VVCC LOGIC = 5 V

Min.

Typ.

Max.

Unit

I_VCCLOGICSupply Current

Z_in

Differential Input

Impedance

@ 80 MHz AC Coupled at 8O MHz+

80 MHz- inputs

KΩ

Input Signal Level

@ 80 MHz AC Coupled at 8O MHz+

80 MHz- inputs

100

mVp

Division Ratio

4/10

STB5600

ELECTRICAL CHARACTERISTICS (Continued)

OUTPUT SECTION

Symbol

Parameter

Note

Min.

Typ.

Max.

Unit

I_VCCDRIVESupply Current

V_VCCDRIVE= 3 V

V_OH

V_OL

t_r

High output voltage

Low output voltage

Rise Time

Vp = V_VCCDRIVE= 3 V

Vn = GNDDRIVE

C_LOAD= 7 pF

Vp-0.4

Vn+0.4

t_f

Fall Time

C_LOAD= 7 pF

APPLICATION CIRCUIT

A typical application circuit is shown in figure 1. The RF input from the antenna downlead is fed via a

ceramic filter and matching circuit to the RF+,RF- pins. The external LNA in the antenna should have

between 10 and 35dB of amplifier gain, so the noise measured in a one MHz bandwidth should be

-114dBm for kTB in 1 MHz

+ 2dB LNA noise figure

+10/35 dB LNA gain (net)

Total -102/ 77dBm at connector.

Allowing 2dB for filter loss, -104/-79 is available at the matching circuit.

Fig. 1 Typical Application Circuit

5/10

STB5600

A.1 Matching Network

The matching circuit may be a 50 Ohm / 300 Ohm balun transformer(figure 2), but a more economical

solution is a tuned match as shown below. A single 10nH inductor is optimal in cost, but may not meet

the users tolerance requirements over spreads of silicon and pcb material, as it has only around 1pF

tuning capacitance ( 2pF in series with 2pF inside the package).

Fig. 2 Matching Network with Balun

The first example (figure 3) increases the capacitance with a discrete capacitor, and uses a lower

inductance value. Both examples assume that the ceramic filter is dc blocking, both input to output, and

output to ground.

Fig. 3 Matching Network with two elements

The second (figure 4) example allows optimum matching by rationing the capacitors appropriately to

achieve voltage gain commensurate with the impedance translation. While it has a higher component

count, it is the versionmost tolerant of componentvariations and board capacitance.

6/10

STB5600

Fig. 4 Matching Network with fourelements

A.2 IF Filter

The recommended IF filter is shown in figure 5. The stop band of the filter is to reject the alias images

around 12MHz, and around28MHz, where it should have at least 15dBc rejection.

Note that the mixer output is low impedance,(70 Ohms), and the IF input is high impedance(15kOhms),

so considerablevoltage gain is achieved in the impedance matching filter.

The filter also sets the bandwidth of the receiver, using the load impedance with the L/C ratio to set the

filter Q. If desired, an external resistor may be added in parallel to reduce the Q. Note that the

bandwidth must be much wider than the 2MHz needed to pass the power of the GPS signal... it must

maintain linear phase across the 2MHz, even at the extremes of component tolerance.

Fig. 5 IF Filter

7/10

STB5600

A.3 Reference Oscillator

The recommended dual output oscillator shown in figure 6 generates both the 81.84MHz signal that is

divided down for the CPU 16.368MHz clock, but also the low amplitude 1555MHz first local oscillator

signal .

Note that some 2 volts of the 82MHz signal is available, and the capacitivetap on the tank circuit is used

to reduce the amplitude to preventexcessive radiation.

Note that the transistor must be a high frequency type, Ft of 8 GHz or greater, and that the collector

inductor must have a self resonant frequency of 2.5GHz or higher.

Fig. 6 Reference Oscillator

8/10

STB5600

TQFP32 MECHANICAL DATA

inch

DIM.

MIN.

TYP.

MAX.

1.60

0.15

1.45

0.45

0.20

MIN.

TYP.

MAX.

0.063

0.006

0.057

0.018

0.008

0.05

1.35

0.30

0.09

0.002

0.053

0.012

0.004

1.40

0.37

0.055

0.015

9.00

7.00

5.60

0.80

9.00

7.00

5.60

0.60

1.00

0.354

0.276

0.220

0.031

0.354

0.276

0.220

0.024

0.039

0.45

0.75

0.018

0.030

0^o(min.), 7^o(max.)

0.10mm

.004

Seating Plane

TQFP32

0060661

9/10

STB5600

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences

of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is

granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are

subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products

are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

1998 STMicroelectronics – Printed in Italy – All RightsReserved

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

10/10

STB5600TR [STMICROELECTRONICS]

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