SRIX512-A5S/XXX [STMICROELECTRONICS]
IC,TRANSPONDER,CMOS,DIE;
| 型号： | SRIX512-A5S/XXX |
| 厂家： | 
ST |
| 描述： | IC,TRANSPONDER,CMOS,DIE 电信 电信集成电路 |
| 文件： | 总41页 (文件大小：254K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SRIX512
13.56MHz Short Range Contactless Memory Chip
with 512 bit EEPROM, Anti-Collision and Anti-Clone Functions
FEATURES SUMMARY
■
ISO 14443 - 2 Type B Air Interface Compliant
Figure 1. Delivery Forms
■
ISO 14443 - 3 Type B Frame Format
Compliant
■
■
■
■
13.56MHz Carrier Frequency
847kHz Sub-carrier Frequency
106 kbit/second Data Transfer
France Telecom Proprietary Anti-Clone
Function
■
■
8 bit Chip_ID based anticollision system
2 Count-Down Binary Counters with
automated anti-tearing protection
Antenna (A3)
■
■
■
■
■
■
■
■
64-bit Unique Identifier
512-bit EEPROM with Write Protect Feature
READ BLOCK and WRITE BLOCK (32 Bits)
Internal Tuning Capacitor
1million ERASE/WRITE Cycles
40-Year Data Retention
Antenna (A4)
Self-Timed Programming Cycle
5ms Typical Programming Time
Antenna (A5)
Wafer
August 2005
1/41
SRIX512
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
AC1, AC0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
DATA TRANSFER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Input Data Transfer from the Reader to the SRIX512 (Request Frame) . . . . . . . . . . . . . . . . . . . 5
Character Transmission Format for Request Frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Request Start Of Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Request End Of Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Output Data Transfer from the SRIX512 to the Reader (Answer Frame) . . . . . . . . . . . . . . . . . . 6
Character Transmission Format for Answer Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Answer Start Of Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Answer End Of Frame. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Transmission Frame . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
CRC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
MEMORY MAPPING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Resettable OTP Area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
32-bit Binary Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
EEPROM Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
System Area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
OTP_Lock_Reg. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Fixed Chip_ID (Option) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SRIX512 OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SRIX512 STATES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
POWER-OFF State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
READY State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
INVENTORY State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SELECTED State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DESELECTED State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DEACTIVATED State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
ANTI-COLLISION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Description of an Anti-Collision Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ANTI-CLONE FUNCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SRIX512 COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
INITIATE() Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/41
SRIX512
PCALL16() Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SLOT_MARKER(SN) Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SELECT(Chip_ID) Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
COMPLETION() Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
RESET_TO_INVENTORY() Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
READ_BLOCK(Addr) Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
WRITE_BLOCK (Addr, Data) Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
GET_UID() Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Power-On State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
APPENDIX A.ISO14443 TYPE B CRC CALCULATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
APPENDIX B.SRIX512 COMMAND BRIEF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
3/41
SRIX512
SUMMARY DESCRIPTION
The SRIX512 is a contactless memory, powered
by an externally transmitted radio wave. It contains
a 512-bit user EEPROM fabricated with STMicro-
electronics CMOS technology. The memory is or-
ganized as 16 blocks of 32 bits. The SRIX512 is
accessed via the 13.56MHz carrier. Incoming data
are demodulated and decoded from the received
Amplitude Shift Keying (ASK) modulation signal
and outgoing data are generated by load variation
using Bit Phase Shift Keying (BPSK) coding of a
847kHz sub-carrier. The received ASK wave is
10% modulated. The Data transfer rate between
the SRIX512 and the reader is 106kbit/s in both re-
ception and emission modes.
The SRIX512 contactless EEPROM can be ran-
domly read and written in block mode (each block
containing 32 bits). The instruction set includes the
following ten commands:
■
■
■
■
■
■
■
■
■
■
READ_BLOCK
WRITE_BLOCK
INITIATE
PCALL16
SLOT_MARKER
SELECT
COMPLETION
RESET_TO_INVENTORY
AUTHENTICATE
GET_UID
The SRIX512 follows the ISO 14443 part 2 type B
recommendation for the radio-frequency power
and signal interface.
The SRIX512 memory is organized in three areas,
as described in Figure 13.. The first area is a reset-
table OTP (one time programmable) area in which
bits can only be switched from 1 to 0. Using a spe-
cial command, it is possible to erase all bits of this
area to 1. The second area provides two 32-bit bi-
nary counters which can only be decremented
from FFFFFFFFh to 00000000h, and gives a ca-
pacity of 4,294,967,296 units per counter. The last
area is the EEPROM memory. It is accessible by
block of 32 bits and includes an auto-erase cycle
during each WRITE_BLOCK command.
Figure 2. Logic Diagram
SRIX512
AC1
Power
Supply
Regulator
ASK
Demodulator
512-bit
User
EEPROM
BPSK
Load
Figure 3. Die Floor Plan
Modulator
AC0
AI08560
The SRIX512 is specifically designed for short
range applications that need secure and re-usable
products. The SRIX512 includes an anti-collision
mechanism that allows it to detect and select tags
present at the same time within range of the read-
er. The anti-collision is based on a probabilistic
scanning method using slot markers. The
SRIX512 provides an anti-clone function which al-
lows its authentication. Using the STMicroelec-
tronics single chip coupler, CRX14, it is easy to
design a reader with the authentication capability
and to build a system with a high level of security.
AC0
AC1
AI09055
Table 1. Signal Names
AC1
AC0
Antenna Coil
Antenna Coil
SIGNAL DESCRIPTION
AC1, AC0. The pads for the Antenna Coil. AC1
and AC0 must be directly bonded to the antenna.
4/41
SRIX512
DATA TRANSFER
Input Data Transfer from the Reader to the
SRIX512 (Request Frame)
The reader must generate a 13.56MHz sinusoidal
carrier frequency at its antenna, with enough ener-
gy to “remote-power” the memory. The energy re-
ceived at the SRIX512’s antenna is transformed
into a Supply Voltage by a regulator, and into data
bits by the ASK demodulator. For the SRIX512 to
decode correctly the information it receives, the
reader must 10% amplitude-modulate the
13.56MHz wave before sending it to the SRIX512.
This is represented in Figure 4.. The data transfer
rate is 106 kbits/s.
Figure 4. 10% ASK Modulation of the Received Wave
DATA BIT TO TRANSMIT
TO THE
SRIX512
10% ASK MODULATION
OF THE 13.56MHz WAVE,
GENERATED BY THE READER
Transfer time for one data bit is 1/106 kHz
Ai09716
Character Transmission Format for Request
Frame. The SRIX512 transmits and receives data
bytes as 10-bit characters, with the least signifi-
gether to form a Command Frame as shown in
Figure 11.. A frame includes an SOF, commands,
addresses, data, a CRC and an EOF as defined in
the ISO14443-3 type B Standard. If an error is de-
tected during data transfer, the SRIX512 does not
execute the command, but it does not generate an
error frame.
cant bit (b ) transmitted first, as shown in Figure
0
5.. Each bit duration, an ETU (Elementary Time
Unit), is equal to 9.44µs (1/106kHz).
These characters, framed by a Start Of Frame
(SOF) and an End Of Frame (EOF), are put to-
Figure 5. SRIX512 Request Frame Character Format
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
Start
"0"
Stop
"1"
LSb
Information Byte
MSb
1 ETU
ai07664
Table 2. Bit Description
Bit
Description
Value
b
b = 0
Start bit used to synchronize the transmission
Information Byte (command, address or data)
Stop bit used to indicate the end of a character
0
0
The information byte is sent with the least
significant bit first
b to b
1
8
b
b = 1
9
9
5/41
SRIX512
Request Start Of Frame. The SOF described in
Figure 6. is composed of:
–
–
–
–
one falling edge,
followed by 10 ETUs at logic-0,
followed by a single rising edge,
followed by at least 2 ETUs (and at most 3) at
logic-1.
Figure 6. Request Start Of Frame
b0
0
b1
0
b2
0
b3
0
b4
0
b5
0
b6
0
b7
0
b8
0
b9
0
b10
1
b11
1
ETU
ai07665
Request End Of Frame. The EOF shown in Fig-
ure 7. is composed of:
–
–
–
one falling edge,
followed by 10 ETUs at logic-0,
followed by a single rising edge.
Figure 7. Request End Of Frame
b0
0
b1
0
b2
0
b3
0
b4
0
b5
0
b6
0
b7
0
b8
0
b9
0
ETU
ai07666
Output Data Transfer from the SRIX512 to the
Reader (Answer Frame)
The data bits issued by the SRIX512 use retro-
modulation. Retro-modulation is obtained by mod-
ifying the SRIX512 current consumption at the an-
tenna (load modulation). The load modulation
causes a variation at the reader antenna by induc-
tive coupling. With appropriate detector circuitry,
the reader is able to pick up information from the
SRIX512. To improve load-modulation detection,
data is transmitted using a BPSK encoded,
847kHz sub-carrier frequency ƒ as shown in Fig-
s
ure 8., and as specified in the ISO14443-2 type B
Standard.
Figure 8. Wave Transmitted using BPSK Sub-carrier Modulation
Data Bit to be Transmitted
to the Reader
Or
847kHz BPSK Modulation
Generated by the SRIX512
BPSK Modulation at 847kHz
During a One-bit Data Transfer Time (1/106kHz)
AIi9717
6/41
SRIX512
Character Transmission Format for Answer
Frame. The character format is the same as for
input data transfer (Figure 5.). The transmitted
frames are made up of an SOF, data, a CRC and
an EOF (Figure 11.). As with an input data trans-
fer, if an error occurs, the reader does not issue an
error code to the SRIX512, but it should be able to
detect it and manage the situation. The data trans-
fer rate is 106 kbits/second.
Answer Start Of Frame. The SOF described in
Figure 9. is composed of:
–
–
followed by 10 ETUs at logic-0
followed by 2 ETUs at logic-1
Figure 9. Answer Start Of Frame
b0
0
b1
0
b2
0
b3
0
b4
0
b5
0
b6
0
b7
0
b8
0
b9
0
b10
1
b11
1
ETU
ai07665
Answer End Of Frame. The EOF shown in Fig-
ure 10. is composed of:
–
–
followed by 10 ETUs at logic-0,
followed by 2 ETUs at logic-1.
Figure 10. Answer End Of Frame
b0
0
b1
0
b2
0
b3
0
b4
0
b5
0
b6
0
b7
0
b8
0
b9
0
b10
1
b11
1
ETU
ai07665
Transmission Frame
Between the Request data transfer and the An-
swer data transfer, all ASK and BPSK modulations
are suspended for a minimum time of t = 128/ƒ .
This delay allows the reader to switch from Trans-
for a period of t = 128/ƒ to allow the reader to
1 S
synchronize. After t , the first phase transition gen-
1
erated by the SRIX512 forms the start bit (‘0’) of
the Answer SOF. After the falling edge of the An-
0
S
swer EOF, the reader waits a minimum time, t ,
2
before sending a new Request Frame to the
SRIX512.
mission to Reception mode. It is repeated after
each frame. After t , the 13.56MHz carrier fre-
0
quency is modulated by the SRIX512 at 847kHz
Figure 11. Example of a Complete Transmission Frame
Sent by the
SOF
Data CRC CRC EOF
SOF
Cmd
Reader
10 bits
10 bits
10 bits
10 bits
10 bits
12 bits
f =847.5kHz
s
tDR
at 106kb/s
Sent by the
SRIX512
Sync
SOF Data CRC CRC EOF
t0
t1
10 bits
10 bits
10 bits
12 bits
12 bits
128/fs
128/fs
t2
Input data transfer using ASK
Output data transfer using BPSK
Ai09718
7/41
SRIX512
CRC
Upon reception of a Request from a reader, the
SRIX512 verifies that the CRC value is valid. If it is
invalid, the SRIX512 discards the frame and does
not answer the reader.
Upon reception of an Answer from the SRIX512,
the reader should verify the validity of the CRC. In
case of error, the actions to be taken are the read-
er designer’s responsibility.
The 16-bit CRC used by the SRIX512 is generated
in compliance with the ISO14443 type B recom-
mendation. For further information, please see
APPENDIX A.. The initial register contents are all
1s: FFFFh.
The two-byte CRC is present in every Request
and in every Answer Frame, before the EOF. The
CRC is calculated on all the bytes between SOF
(not included) and the CRC field.
The CRC is transmitted with the Least Significant
Byte first and each byte is transmitted with the
least significant bit first.
Figure 12. CRC Transmission Rules
LSByte
MSByte
MSbit
LSbit
MSbit LSbit
CRC 16 (8 bits)
CRC 16 (8 bits)
ai07667
8/41
SRIX512
MEMORY MAPPING
The SRIX512 is organized as 16 blocks of 32 bits
as shown in Figure 13.. All blocks are accessible
by the READ_BLOCK command. Depending on
the write access, they can be updated by the
WRITE_BLOCK command. A WRITE_BLOCK up-
dates all the 32 bits of the block.
Figure 13. SRIX512 Memory Mapping
Msb
32 bits Block
Lsb
Block
Addr
Description
b
b
b
b
b
b b
8
b
31
24 23
16 15
7
0
0
1
32 bits Boolean Area
32 bits Boolean Area
32 bits Boolean Area
32 bits Boolean Area
32 bits Boolean Area
32 bits binary counter
32 bits binary counter
User Area
2
Resettable OTP bits
3
4
5
Count down
Counter
6
7
8
User Area
9
User Area
10
11
12
13
14
15
User Area
User Area
Lockable EEPROM
User Area
User Area
User Area
User Area
Fixed Chip_ID
(Option)
255
OTP_Lock_Reg
ST Reserved
System OTP bits
ROM
UID0
UID1
64 bits UID Area
9/41
SRIX512
Resettable OTP Area
previously at 0 remain unchanged. When the 32
bits of a block are all at 0, the block is empty, and
cannot be updated any more. See Figure 15. and
Figure 16. for examples of the result of the
WRITE_BLOCK command in the resettable OTP
area.
In this area contains five individual 32-bit Boolean
Words (see Figure 14. for a map of the area). A
WRITE_BLOCK command will not erase the pre-
vious contents of the block as the Write cycle is not
preceded by an Auto Erase cycle. This feature can
be used to reset selected bits from 1 to 0. All bits
Figure 14. Resettable OTP Area (addresses 0 to 4)
MSb
b31
32-bit Block
b16 b15
LSb
b0
Block
Address
Description
b24 b23
b8 b7
0
1
2
3
4
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
32-bit Boolean Area
Resettable
OTP Bit
ai07657
Figure 15. WRITE_BLOCK Update in Standard Mode (Binary Format)
b31
b0
Previous data stored in block
Data to be written
1
1
1
...
...
...
1
1
1
1
0
0
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
1
0
0
1
1
1
0
1
0
1
1
1
1
1
1
New data stored in block
ai07658
The five 32-bit blocks making up the Resettable
OTP area can be erased in one go by adding an
Auto Erase cycle to the WRITE_BLOCK com-
mand. An Auto Erase cycle is added each time the
SRIX512 detects a Reload command. The Reload
command is implemented through a specific up-
date of the 32-bit binary counter located at block
address 6 (see “32-bit Binary Counters” for de-
tails).
Figure 16. WRITE_BLOCK Update in Reload Mode (Binary Format)
b31
b0
Previous data stored in block
Data to be written
1
1
1
...
...
...
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
1
0
0
1
1
1
0
1
1
1
1
1
1
1
1
New data stored in block
ai07659
10/41
SRIX512
32-bit Binary Counters
WRITE_BLOCK command to block address 5 or
6, depending on which counter is to be updated.
The WRITE_BLOCK command writes the new 32-
bit value to the counter block address. Figure 18.
shows examples of how the counters operate.
The counter programming cycles are protected by
automated anti-tearing logic. This function allows
the counter value to be protected in case of power
down within the programming cycle. In case of
power down, the counter value is not updated and
the previous value continues to be stored.
The two 32-bit binary counters located at block ad-
dresses 5 and 6, respectively, are used to count
32
down from 2 (4096 million) to 0. The SRIX512
uses dedicated logic that only allows the update of
a counter if the new value is lower than the previ-
ous one. This feature allows the application to
count down by steps of 1 or more. The initial value
in Counter 5 is FFFFFFFEh and is FFFFFFFFh in
Counter 6. When the value displayed is
00000000h, the counter is empty and cannot be
reloaded. The counter is updated by issuing the
Figure 17. Binary Counter (addresses 5 to 6)
MSb
b31
32-bit Block
b16 b15
LSb
b0
Block
Address
Description
b24 b23
b8 b7
5
32-bit Binary Counter
32-bit Binary Counter
Count down
Counter
6
ai07660
Figure 18. Count Down Example (Binary Format)
b31
b0
Initial data
1
...
...
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1-unit decrement
1-unit decrement
1-unit decrement
8-unit decrement
Increment not allowed
1
0
1
1
...
...
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
1
0
1
1
...
...
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
0
0
0
0
0
ai07661
The counter with block address 6 controls the Re-
load command used to reset the resettable OTP
command for locations 0 to 4 (see the “Resettable
OTP Area” paragraph). The Erase cycle remains
active until a POWER-OFF or a SELECT com-
mand is issued. The SRIX512’s resettable OTP
area (addresses 0 to 4). Bits b to b act as an
31
21
11-bit Reload counter; whenever one of these 11
bits is updated, the SRIX512 detects the change
and adds an Erase cycle to the WRITE_BLOCK
11
area can be reloaded up to 2,047 times (2 -1).
11/41
SRIX512
EEPROM Area
always includes an Auto-Erase cycle prior to the
Write cycle.
Blocks 7 to 15 can be Write-protected. Write ac-
The 9 blocks between addresses 7 and 15 are EE-
PROM blocks of 32 bits each (36 Bytes in total).
(See Figure 19. for a map of the area.) These
blocks can be accessed using the READ_BLOCK
cess is controlled by the
8
bits of the
OTP_Lock_Reg located at block address 255 (see
“OTP_Lock_Reg” for details). Once protected,
these blocks (7 to 15) cannot be unprotected.
and
WRITE_BLOCK
commands.
The
WRITE_BLOCK command for the EEPROM area
Figure 19. EEPROM (Addresses 7 to 15)
MSb
b31
32-bit Block
b16 b15
LSb
b0
Block
Address
Description
b24 b23
b8 b7
7
User Area
User Area
User Area
User Area
User Area
User Area
User Area
User Area
User Area
8
9
10
11
12
13
14
15
Lockable
EEPROM
Ai09719
12/41
SRIX512
System Area
A WRITE_BLOCK command in this area will not
erase the previous contents. Selected bits can
thus be set from 1 to 0. All bits previously at 0 re-
main unchanged. Once all the 32 bits of a block
are at 0, the block is empty and cannot be updated
any more.
This area is used to modify the settings of the
SRIX512. It contains 3 registers: OTP_Lock_Reg,
Fixed Chip_ID and ST Reserved. See Figure 20.
for a map of this area.
Figure 20. System Area
MSb
b31
32-bit Block
LSb
Block
Address
Description
b24 b23
b16 b15
b8 b7
b0
Fixed Chip_ID
(Option)
255
OTP_Lock_Reg
ST Reserved
OTP
ai07663
OTP_Lock_Reg. The 8 bits, b to b , of the
Fixed Chip_ID (Option). The SRIX512 is provid-
ed with an anti-collision feature based on a ran-
dom 8-bit Chip_ID. Prior to selecting an SRIX512,
an anti-collision sequence has to be run to search
for the Chip_ID of the SRIX512. This is a very flex-
ible feature, however the searching loop requires
time to run.
31
24
System Area (block address 255) are used as
OTP_Lock_Reg bits in the SRIX512. They control
the Write access to the 9 EEPROM blocks with ad-
dresses 7 to 15 as follows:
–
When b is at 0, blocks 7 and 8 are Write-
protected
24
For some applications, much time could be saved
by knowing the value of the SRIX512 Chip_ID be-
forehand, so that the SRIX512 can be identified
and selected directly without having to run an anti-
collision sequence. This is why the SRIX512 was
designed with an optional mask setting used to
–
–
–
–
–
–
–
When b is at 0, block 9 is Write-protected
25
When b is at 0, block 10 is Write-protected
26
When b is at 0, block 11 is Write-protected
27
When b is at 0, block 12 is Write-protected
28
When b is at 0, block 13 is Write-protected
29
program a fixed 8-bit Chip_ID to bits b to b of the
7
0
When b is at 0, block 14 is Write-protected
30
system area. When the fixed Chip_ID option is
used, the random Chip_ID function is disabled.
When b is at 0, block 15 is Write-protected.
31
The OTP_Lock_Reg bits cannot be erased. Once
Write-protected, EEPROM blocks behave like
ROM blocks and cannot be unprotected.
13/41
SRIX512
SRIX512 OPERATION
All commands, data and CRC are transmitted to
the SRIX512 as 10-bit characters using ASK mod-
ulation. The start bit of the 10 bits, b , is sent first.
an invalid frame is decoded by the SRIX512
(wrong command or CRC error), the memory does
not return any error code.
0
The command frame received by the SRIX512 at
the antenna is demodulated by the 10% ASK de-
modulator, and decoded by the internal logic. Prior
to any operation, the SRIX512 must have been se-
lected by a SELECT command. Each frame trans-
mitted to the SRIX512 must start with a Start Of
Frame, followed by one or more data characters,
two CRC Bytes and the final End Of Frame. When
When a valid frame is received, the SRIX512 may
have to return data to the reader. In this case, data
is returned using BPSK encoding, in the form of
10-bit characters framed by an SOF and an EOF.
The transfer is ended by the SRIX512 sending the
2 CRC Bytes and the EOF.
SRIX512 STATES
The SRIX512 can be switched into different states.
Depending on the current state of the SRIX512, its
logic will only answer to specific commands.
These states are mainly used during the anti-colli-
sion sequence, to identify and to access the
SRIX512 in a very short time. The SRIX512 pro-
vides 6 different states, as described in the follow-
ing paragraphs and in Figure 21..
SLOT_MARKER(), and then remain in the INVEN-
TORY state. It will switch to the SELECTED state
after a SELECT(Chip_ID) command is issued, if
the Chip_ID in the command matches its own. If
not, it will remain in INVENTORY state.
SELECTED State
In SELECTED state, the SRIX512 is active and re-
sponds to all READ_BLOCK(), WRITE_BLOCK(),
AUTHENTICATE() and GET_UID() commands.
When an SRIX512 has entered the SELECTED
state, it no longer responds to anti-collision com-
mands. So that the reader can access another tag,
the SRIX512 can be switched to the DESELECT-
ED state by sending a SELECT(Chip_ID2) with a
Chip_ID that does not match its own, or it can be
placed in DEACTIVATED state by issuing a COM-
PLETION() command. Only one SRIX512 can be
in SELECTED state at a time.
POWER-OFF State
The SRIX512 is in POWER-OFF state when the
electromagnetic field around the tag is not strong
enough. In this state, the SRIX512 does not re-
spond to any command.
READY State
When the electromagnetic field is strong enough,
the SRIX512 enters the READY state. After Pow-
er-up, the Chip_ID is initialized with a random val-
ue. The whole logic is reset and remains in this
state until an INITIATE() command is issued. Any
other command will be ignored by the SRIX512.
DESELECTED State
Once the SRIX512 is in DESELECTED state, only
a SELECT(Chip_ID) command with a Chip_ID
matching its own can switch it back to SELECTED
state. All other commands are ignored.
DEACTIVATED State
When in this state, the SRIX512 can only be
turned off. All commands are ignored.
INVENTORY State
The SRIX512 switches from the READY to the IN-
VENTORY state after an INITIATE() command
has been issued. In INVENTORY state, the
SRIX512 will respond to any anti-collision com-
mands:
INITIATE(),
PCALL16()
and
14/41
SRIX512
Figure 21. State Transition Diagram
POWER-OFF
Out of
Field
On Field
READY
Chip_ID = RND
8bits
INITIATE()
Out of
Field
INITIATE() or PCALL16()
or SLOT_MARKER(SN) or
SELECT(wrong Chip_ID)
INVENTORY
Out of
Field
SELECT(Chip_ID)
RESET_TO_INVENTORY()
SELECTED
Out of
Field
Out of
Field
SELECT(Chip_ID)
COMPLETION()
DESELECTED
DEACTIVATED
SELECT(≠ Chip_ID)
SELECT(Chip_ID)
READ_BLOCK()
WRITE_BLOCK()
AUTHENTICATE()
GET_UID()
AI05733
15/41
SRIX512
ANTI-COLLISION
The SRIX512 provides an anti-collision mecha-
nism that searches for the Chip_ID of each device
that is present in the reader field range. When
known, the Chip_ID is used to select an SRIX512
individually, and access its memory. The anti-col-
lision sequence is managed by the reader through
a set of commands described in the “SRIX512 OP-
ERATION” section:
es are invited to answer with minimum
identification data: the Chip_ID. The number of
slots is fixed at 16 for the PCALL16() command.
For the INITIATE() command, there is no slot and
the SRIX512 answers after the command is is-
sued. SRIX512 devices are allowed to answer
only once during the anticollision sequence. Con-
sequently, even if there are several SRIX512 de-
vices present in the reader field, there will probably
be a slot in which only one SRIX512 answers, al-
lowing the reader to capture its Chip_ID. Using the
Chip_ID, the reader can then establish a commu-
nication channel with the identified SRIX512. The
purpose of the anti-collision sequence is to allow
the reader to select one SRIX512 at a time.
The SRIX512 is given an 8-bit Chip_ID value used
by the reader to select only one among up to 256
tags present within its field range. The Chip_ID is
initialized with a random value during the READY
state, or after an INITIATE() command in the IN-
VENTORY state.
■
■
■
INITIATE()
PCALL16()
SLOT_MARKER().
The reader is the master of the communication
with one or more SRIX512 device(s). It initiates the
tag communication activity by issuing an INI-
TIATE(), PCALL16() or SLOT_MARKER() com-
mand to prompt the SRIX512 to answer. During
the anti-collision sequence, it might happen that
two or more SRIX512 devices respond simulta-
neously, so causing a collision. The command set
allows the reader to handle the sequence, to sep-
arate SRIX512 transmissions into different time
slots. Once the anti-collision sequence has com-
pleted, SRIX512 communication is fully under the
control of the reader, allowing only one SRIX512
to transmit at a time.
The four least significant bits (b to b ) of the
0
3
Chip_ID
are
also
known
as
the
CHIP_SLOT_NUMBER. This 4-bit value is used
by the PCALL16() and SLOT_MARKER() com-
mands during the anti-collision sequence in the IN-
VENTORY state.
The Anti-collision scheme is based on the defini-
tion of time slots during which the SRIX512 devic-
Figure 22. SRIX512 Chip_ID Description
b7
b6
b5
b4
b3
8-bit Chip_ID
b2
b1
b0
b0 to b3: CHIP_SLOT_NUMBER
ai07668
Each time the SRIX512 receives a PCALL16()
command, the CHIP_SLOT_NUMBER is given a
command, it compares its CHIP_SLOT_NUMBER
with the SLOT_NUMBER parameter (SN). If they
match, the SRIX512 returns its Chip_ID as a re-
sponse to the command. If they do not, the
new 4-bit random value. If the new value is 0000 ,
b
the SRIX512 returns its whole 8-bit Chip_ID in its
answer to the PCALL16() command. The
PCALL16() command is also used to define the
slot number 0 of the anti-collision sequence. When
the SRIX512 receives the SLOT_MARKER(SN)
SRIX512
does
not
answer.
The
SLOT_MARKER(SN) command is used to define
all the anti-collision slot numbers from 1 to 15.
16/41
SRIX512
Figure 23. Description of a Possible Anti-Collision Sequence
Note: The value X in the Answer Chip_ID means a random hexadecimal character from 0 to F.
17/41
SRIX512
Description of an Anti-Collision Sequence
into account as it will not respond to the
PCALL16() or SLOT_MARKER(SN) command
(READY state). To be considered during the anti-
collision sequence, it must have received the INI-
TIATE() command and entered the INVENTORY
state.
Table 3. shows the elements of a standard anti-
collision sequence. (See Figure 24. for an exam-
ple.)
The anti-collision sequence is initiated by the INI-
TIATE() command which triggers all the SRIX512
devices that are present in the reader field range,
and that are in INVENTORY state. Only SRIX512
devices in INVENTORY state will respond to the
PCALL16() and SLOT_MARKER(SN) anti-colli-
sion commands.
A new SRIX512 introduced in the field range dur-
ing the anti-collision sequence will not be taken
Table 3. Standard Anti-Collision Sequence
Step 1 Init:
Send INITIATE().
– If no answer is detected, go to step1.
– If only 1 answer is detected, select and access the SRIX512. After accessing the
SRIX512, deselect the tag and go to step1.
– If a collision (many answers) is detected, go to step2.
Step 2
Step 3
Step 4
Slot 0
Send PCALL16().
– If no answer or collision is detected, go to step3.
– If 1 answer is detected, store the Chip_ID, Send SELECT() and go to step3.
Slot 1
Slot 2
Send SLOT_MARKER(1).
– If no answer or collision is detected, go to step4.
– If 1 answer is detected, store the Chip_ID, Send SELECT() and go to step4.
Send SLOT_MARKER(2).
– If no answer or collision is detected, go to step5.
– If 1 answer is detected, store the Chip_ID, Send SELECT() and go to step5.
Step N Slop N
Step 17 Slot 15
Step 18
Send SLOT_MARKER(3 up to 14) ...
– If no answer or collision is detected, go to stepN+1.
– If 1 answer is detected, store the Chip_ID, Send SELECT() and go to stepN+1.
Send SLOT_MARKER(15).
– If no answer or collision is detected, go to step18.
– If 1 answer is detected, store the Chip_ID, Send SELECT() and go to step18.
All the slots have been generated and the Chip_ID values should be stored into the
reader memory. Issue the SELECT(Chip_ID) command and access each identified
SRIX512 one by one. After accessing each SRIX512, switch them into DESELECTED
or DEACTIVATED state, depending on the application needs.
– If collisions were detected between Step2 and Step17, go to Step2.
– If no collision was detected between Step2 and Step17, go to Step1.
After each SLOT_MARKER() command, there
may be several, one or no answers from the
SRIX512 devices. The reader must handle all the
cases and store all the Chip_IDs, correctly decod-
ed. At the end of the anti-collision sequence, after
SLOT_MARKER(15), the reader can start working
with one SRIX512 by issuing a SELECT() com-
mand containing the desired Chip_ID. If a collision
is detected during the anti-collision sequence, the
reader has to generate a new sequence in order to
identify all unidentified SRIX512 devices in the
field. The anti-collision sequence can stop when
all SRIX512 devices have been identified.
18/41
SRIX512
Figure 24. Example of an Anti-Collision Sequence
Tag 1
Tag 2
Tag 3
Tag 4
Tag 5
Tag 6
Tag 7
Tag 8
Command
Comments
Chip_ID Chip_ID Chip_ID Chip_ID Chip_ID Chip_ID Chip_ID Chip_ID
Each tag gets a random Chip_ID
28h
75h
40h
01h
02h
FEh
A9h
7Ch
READY State
INITIATE ()
Each tag get a new random Chip_ID.
All tags answer: collisions
40h
45h
13h
12h
3Fh
30h
4Ah
43h
50h
55h
48h
43h
52h
53h
7Ch
73h
All CHIP_SLOT_NUMBERs get
a new random value
PCALL16()
Slot0: only one answer
30h
30h
SELECT(30h)
Tag3 is identified
SLOT_MARKER(1)
SLOT_MARKER(2)
SELECT(12h)
Slot1: no answer
Slot2: only one answer
Tag2 is identified
Slot3: collisions
12h
12h
SLOT_MARKER(3)
43h
43h
53h
73h
SLOT_MARKER(4)
SLOT_MARKER(5)
Slot4: no answer
Slot5: collisions
45h
55h
53h
SLOT_MARKER(6)
SLOT_MARKER(N)
SLOT_MARKER(F)
Slot6: no answer
SlotN: no answer
SlotF: no answer
All CHIP_SLOT_NUMBERs get
a new random value
Slot0: collisions
40h
40h
41h
42h
50h
50h
74h
PCALL16()
41h
41h
SLOT_MARKER(1)
SELECT(41h)
Slot1: only one answer
Tag4 is identified
SLOT_MARKER(2)
SELECT(42h)
42h
42h
Slot2: only one answer
Tag6 is identified
SLOT_MARKER(3)
53h
53h
Slot3: only one answer
SELECT(53h)
Tag5 is identified
SLOT_MARKER(4)
74h
74h
Slot4: only one answer
SELECT(74h)
Tag8 is identified
SlotN: no answer
SLOT_MARKER(N)
All CHIP_SLOT_NUMBERs get
a new random value
Slot0: only one answer
41h
50h
50h
50h
PCALL16()
SELECT(50h)
Tag7 is identified
Slot1: only one answer but already
found for tag4
SLOT_MARKER(1)
SLOT_MARKER(N)
PCALL16()
41h
43h
SlotN: no answer
All CHIP_SLOT_NUMBERs get
a new random value
Slot0: only one answer
SLOT_MARKER(3)
SELECT(43h)
43h
43h
Slot3: only one answer
Tag1 is identified
All tags are identified
ai07669
19/41
SRIX512
ANTI-CLONE FUNCTION
The SRIX512 provides an anti-clone function that
allows the application to authentication the device.
This function uses reserved data that is stored in
the SRIX512 memory at its time of manufacture.
the prime example). A reader system, based on
the ST CRX14 chip coupler, can check each
SRIX512 tag for authenticity, and protect the appli-
cation system against silicon copies or emulators.
The Authentication system is based on a propri-
etary challenge/response mechanism which al-
lows the application software to authenticate any
member of the secure memory tag SRXxxx family
from STMicroelectronics (of which the SRIX512 is
A complete description of the Authentication sys-
tem is available under Non Disclosure Agreement
(NDA) with STMicroelectronics. For more details
about this SRIX512 function, please contact your
nearest STMicroelectronics sales office.
SRIX512 COMMANDS
See the paragraphs below for a detailed descrip-
tion of the Commands available on the SRIX512.
The commands and their hexadecimal codes are
summarized in Table 4.. A brief is given in APPEN-
DIX B..
Table 4. Command Code
Hexadecimal Code
Command
06h-00h
06h-04h
x6h
INITIATE()
PCALL16()
SLOT_MARKER (SN)
READ_BLOCK(Addr)
WRITE_BLOCK(Addr, Data)
AUTHENTICATE(RND)
GET_UID()
08h
09h
0Ah
0Bh
0Ch
RESET_TO_INVENTORY
SELECT(Chip_ID)
0Eh
0Fh
COMPLETION()
20/41
SRIX512
INITIATE() Command
Command Code = 06h - 00h
INITIATE() is used to initiate the anti-collision se-
quence of the SRIX512. On receiving the INI-
TIATE() command, all SRIX512 devices in
READY state switch to INVENTORY state, set a
new 8-bit Chip_ID random value, and return their
Chip_ID value. This command is useful when only
one SRIX512 in READY state is present in the
reader field range. It speeds up the Chip_ID
search process. The CHIP_SLOT_NUMBER is
not used during INITIATE() command access.
Figure 25. INITIATE Request Format
SOF
INITIATE
CRC
CRC
EOF
L
H
06h
00h
8 bits
8 bits
AI07670
Request parameter:
–
No parameter
Figure 26. INITIATE Response Format
SOF
Chip_ID
8 bits
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07671
Response parameter:
–
Chip_ID of the SRIX512
Figure 27. INITIATE Frame Exchange Between Reader and SRIX512
Reader
SOF
06h
00h
CRC
CRC
EOF
L
H
SRIX512
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI10824
21/41
SRIX512
PCALL16() Command
Command Code = 06h - 04h
The SRIX512 must be in INVENTORY state to in-
terpret the PCALL16() command.
On receiving the PCALL16() command, the
SRIX512 first generates
CHIP_SLOT_NUMBER value (in the 4 least signif-
icant bits of the Chip_ID). CHIP_SLOT_NUMBER
can take on a value between 0 an 15 (1111 ). The
value is retained until a new PCALL16() or INI-
is powered off. The new CHIP_SLOT_NUMBER
value is then compared with the value 0000 . If
b
they match, the SRIX512 returns its Chip_ID val-
ue. If not, the SRIX512 does not send any re-
sponse.
The PCALL16() command, used together with the
SLOT_MARKER() command, allows the reader to
search for all the Chip_IDs when there are more
than one SRIX512 device in INVENTORY state
present in the reader field range.
a
new random
b
TIATE() command is issued, or until the SRIX512
Figure 28. PCALL16 Request Format
SOF
PCALL16
CRC
CRC
EOF
L
H
06h
04h
8 bits
8 bits
AI07673
Request parameter:
–
No parameter
Figure 29. PCALL16 Response Format
SOF
Chip_ID
8 bits
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07671
Response parameter:
–
Chip_ID of the SRIX512
Figure 30. PCALL16 Frame Exchange Between Reader and SRIX512
Reader
SOF
06h
04h
CRC
CRC
EOF
L
H
SRIX512
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI10823
22/41
SRIX512
SLOT_MARKER(SN) Command
Command Code = x6h
The SRIX512 must be in INVENTORY state to in-
terpret the SLOT_MARKER(SN) command.
The SLOT_MARKER Byte code is divided into two
parts:
On receiving the SLOT_MARKER() command, the
SRIX512 compares its CHIP_SLOT_NUMBER
value with the SLOT_NUMBER value given in the
command code. If they match, the SRIX512 re-
turns its Chip_ID value. If not, the SRIX512 does
not send any response.
The SLOT_MARKER() command, used together
with the PCALL16() command, allows the reader
to search for all the Chip_IDs when there are more
than one SRIX512 device in INVENTORY state
present in the reader field range.
–
b to b : 4-bit command code
3 0
with fixed value 6.
–
b to b : 4 bits known as the SLOT_NUMBER
7
4
(SN). They assume a value between 1 and 15.
The value 0 is reserved by the PCALL16()
command.
Figure 31. SLOT_MARKER Request Format
SOF
SLOT_MARKER
X6h
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07675
Request parameter:
x: Slot number
–
Figure 32. SLOT_MARKER Response Format
SOF
Chip_ID
8 bits
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07671
Response parameters:
–
Chip_ID of the SRIX512
Figure 33. SLOT_MARKER Frame Exchange Between Reader and SRIX512
Reader
SOF
X6h
CRC
CRC
EOF
L
H
SRIX512
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI10822
23/41
SRIX512
SELECT(Chip_ID) Command
Command Code = 0Eh
The SELECT() command allows the SRIX512 to
enter the SELECTED state. Until this command is
issued, the SRIX512 will not accept any other
command, except for INITIATE(), PCALL16() and
SLOT_MARKER(). The SELECT() command re-
turns the 8 bits of the Chip_ID value. An SRIX512
in SELECTED state, that receives a SELECT()
command with a Chip_ID that does not match its
own is automatically switched to DESELECTED
state.
Figure 34. SELECT Request Format
SOF
SELECT
0Eh
Chip_ID
8 bits
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07677
Request parameter:
–
8-bit Chip_ID stored during the anti-collision
sequence
Figure 35. SELECT Response Format
SOF
Chip_ID
8 bits
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07671
Response parameters:
–
Chip_ID of the selected tag. Must be equal to
the transmitted Chip_ID
Figure 36. SELECT Frame Exchange Between Reader and SRIX512
Reader
SOF
0Eh
Chip_ID CRC
CRC
EOF
L
H
SRIX512
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI10821
24/41
SRIX512
COMPLETION() Command
Command Code = 0Fh
On receiving the COMPLETION() command, a
SRIX512 in SELECTED state switches to DEAC-
TIVATED state and stops decoding any new com-
mands. The SRIX512 is then locked in this state
until a complete reset (tag out of the field range).
A new SRIX512 can thus be accessed through a
SELECT() command without having to remove the
previous one from the field. The COMPLETION()
command does not generate a response.
All SRIX512 devices not in SELECTED state ig-
nore the COMPLETION() command.
Figure 37. COMPLETION Request Format
SOF
COMPLETION
0Fh
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07679
Request parameters:
No parameter
–
Figure 38. COMPLETION Response Format
No Response
AI07680
Figure 39. COMPLETION Frame Exchange Between Reader and SRIX512
Reader
SOF
0Fh
CRC
CRC
EOF
L
H
SRIX512
No Response
AI10820
25/41
SRIX512
RESET_TO_INVENTORY() Command
Command Code = 0Ch
time. Forcing them to go through the anti-collision
sequence again allows the reader to generates
new PCALL16() commands and so, to set new
random Chip_IDs.
The RESET_TO_INVENTORY() command does
not generate a response.
All SRIX512 devices that are not in SELECTED
state ignore the RESET_TO_INVENTORY() com-
mand.
On receiving the RESET_TO_INVENTORY()
command, all SRIX512 devices in SELECTED
state revert to INVENTORY state. The concerned
SRIX512 devices are thus resubmitted to the anti-
collision sequence. This command is useful when
two SRIX512 devices with the same 8-bit Chip_ID
happen to be in SELECTED state at the same
Figure 40. RESET_TO_INVENTORY Request Format
SOF
RESET_TO_INVENTORY
0Ch
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07682
Request parameter:
No parameter
–
Figure 41. RESET_TO_INVENTORY Response Format
No Response
AI07680
Figure 42. RESET_TO_INVENTORY Frame Exchange Between Reader and SRIX512
Reader
SOF
0Ch
CRC
CRC
EOF
L
H
SRIX512
No Response
AI10825
26/41
SRIX512
READ_BLOCK(Addr) Command
Command Code = 08h
commands issued with a block address above 15
will not be interpreted and the SRIX512 will not re-
turn any response, except for the System area lo-
cated at address 255.
The SRIX512 must have received a SELECT()
command and be switched to SELECTED state
before any READ_BLOCK() command can be ac-
cepted. All READ_BLOCK() commands sent to
the SRIX512 before a SELECT() command is is-
sued are ignored.
On receiving the READ_BLOCK command, the
SRIX512 reads the desired block and returns the
4 data Bytes contained in the block. Data Bytes
are transmitted with the Least Significant Byte first
and each byte is transmitted with the least signifi-
cant bit first.
The address byte gives access to the 16 blocks of
the SRIX512 (addresses 0 to 15). READ_BLOCK
Figure 43. READ_BLOCK Request Format
SOF
READ_BLOCK
08h
ADDRESS
8 bIts
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07684
Request parameter:
–
ADDRESS: block addresses from 0 to 15, or
255
Figure 44. READ_BLOCK Response Format
SOF
DATA 1
8 bIts
DATA 2
8 bIts
DATA 3
8 bIts
DATA 4
8 bIts
CRC
CRC
EOF
L
H
8 bits
8 bIts
AI07685
Response parameters:
–
–
–
–
DATA 1: Less significant data Byte
DATA 2: Data Byte
DATA 3: Data Byte
DATA 4: Most significant data Byte
Figure 45. READ_BLOCK Frame Exchange Between Reader and SRIX512
Reader
SOF 08h ADDR CRC CRC EOF
L
H
DATA DATA DATA DATA
SRIX512
<-t -> <-t ->
SOF
CRC CRC EOF
0
1
L
H
1
2
3
4
AI10826
27/41
SRIX512
WRITE_BLOCK (Addr, Data) Command
Command Code = 09h
ing paragraphs for a complete description of the
WRITE_BLOCK command:
–
–
–
Resettable OTP Area (addresses 0 to 4).
Binary Counter (addresses 5 to 6).
EEPROM (Addresses 7 to 15).
On receiving the WRITE_BLOCK command, the
SRIX512 writes the 4 bytes contained in the com-
mand to the addressed block, provided that the
block is available and not Write-protected. Data
Bytes are transmitted with the Least Significant
Byte first, and each byte is transmitted with the
least significant bit first.
The address Byte gives access to the 16 blocks of
the SRIX512 (addresses 0 to 15). WRITE_BLOCK
commands issued with a block address above 15
will not be interpreted and the SRIX512 will not re-
turn any response, except for the System area lo-
cated at address 255.
The WRITE_BLOCK command does not give rise
to a response from the SRIX512. The reader must
check after the programming time, t , that the
data was correctly programmed. The SRIX512
must have received a SELECT() command and be
switched to SELECTED state before any
WRITE_BLOCK command can be accepted. All
WRITE_BLOCK commands sent to the SRIX512
before a SELECT() command is issued, are ig-
nored.
W
The result of the WRITE_BLOCK command is
submitted to the addressed block. See the follow-
Figure 46. WRITE_BLOCK Request Format
SOF WRITE_BLOCK
09h
ADDRESS
8 bIts
DATA 1
8 bIts
DATA 2
8 bIts
DATA 3
8 bIts
DATA 4
8 bIts
CRC
CRC
EOF
L
H
8 bits
8 bIts
AI07687
Request parameters:
–
ADDRESS: block addresses from 0 to 15, or
255
–
–
–
–
DATA 1: Less significant data Byte
DATA 2: Data Byte
DATA 3: Data Byte
DATA 4: Most significant data Byte.
Figure 47. WRITE_BLOCK Response Format
No Response
AI07680
Figure 48. WRITE_BLOCK Frame Exchange Between Reader and SRIX512
DATA DATA DATA DATA
Reader
CRC CRC EOF
SOF 09h
ADDR
L
H
1
2
3
4
No Response
SRIX512
AI10827
28/41
SRIX512
GET_UID() Command
Command Code = 0Bh
On receiving the GET_UID command, the
SRIX512 returns its 8 UID Bytes. UID Bytes are
transmitted with the Least Significant Byte first,
and each byte is transmitted with the least signifi-
cant bit first.
The SRIX512 must have received a SELECT()
command and be switched to SELECTED state
before any GET_UID() command can be accept-
ed. All GET_UID() commands sent to the SRIX512
before a SELECT() command is issued, are ig-
nored.
Figure 49. GET_UID Request Format
SOF
GET_UID
0Bh
CRC
CRC
EOF
L
H
8 bits
8 bits
AI07693
Request parameter:
No parameter
–
Figure 50. GET_UID Response Format
UID 0
8 bits
UID 1
8 bIts
UID 2
8 bIts
UID 3
8 bIts
UID 4
8 bIts
UID 5
UID 6
8 bIts
UID 7
8 bIts
CRC
CRC
H
SOF
EOF
L
8 bIts
8 bits
8 bIts
AI07694
Response parameters:
–
–
–
UID 0: Less significant UID Byte
UID 1 to UID 6: UID Bytes
UID 7: Most significant UID Byte.
Figure 51. GET_UID Frame Exchange Between Reader and SRIX512
S
O
F
E
O
F
Reader
0Bh CRC CRC
L
H
S
O
F
E
O
F
UID UID UID UID UID UID UID UID
SRIX512
<-t -> <-t ->
CRC CRC
0
1
L
H
0
1
2
3
4
5
6
7
AI10828
Power-On State
After Power-On, the SRIX512 is in the following
state:
–
–
–
It is in the low-power state.
It is in READY state.
It shows highest impedance with respect to
the reader antenna field.
–
It will not respond to any command except
INITIATE().
29/41
SRIX512
MAXIMUM RATING
Stressing the device above the rating listed in the
Absolute Maximum Ratings table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 5. Absolute Maximum Ratings
Symbol
Parameter
Min.
Max.
25
Unit
°C
15
Wafer
23
months
kept in its antistatic bag
T
STG, hSTG, tSTG Storage Conditions
15
25
60%
2
°C
A3, A4, A5
40%
RH
years
mA
V
I
Supply Current on AC0 / AC1
–20
–7
20
7
CC
V
Input Voltage on AC0 / AC1
MAX
1
–100
100
1000
4000
V
V
V
Machine model
1
2
VESD
Electrostatic Discharge Voltage
–1000
–4000
Human Body model
Human Body model
Note: 1. Mil. Std. 883 - Method 3015
2. ESD test: ISO10373-6 for proximity cards
30/41
SRIX512
DC AND AC PARAMETERS
Table 6. Operating Conditions
Symbol
Parameter
Ambient Operating Temperature
Min.
Max.
Unit
TA
–20
85
°C
Table 7. DC Characteristics
Symbol
Parameter
Condition
Min
Max
3.5
Unit
V
V
Regulated Voltage
Supply Current (Active in Read)
Supply Current (Active in Write)
Retromodulation Induced Voltage
Internal Tuning Capacitor
2.5
CC
I
V
= 3.0V
= 3.0V
100
250
µA
µA
mV
pF
CC
CC
CC
I
V
CC
V
ISO10373-6
20
64
RET
C
70pF at 13.56MHz
78
TUN
Table 8. AC Characteristics
Symbol
Parameter
Condition
Min
Max
Unit
MHz
%
f
External RF Signal Frequency
Carrier Modulation Index
13.553 13.567
CC
MI
MI=(A-B)/(A+B)
8
14
CARRIER
t
, t
10% Rise and Fall times
0.8
2.5
µs
RFR RFF
t
ETU = 128/f
Minimum Pulse Width for Start bit
ASK modulation Data Jitter
9.44
µs
RFSBL
CC
t
Coupler to SRIX512
–2
5
+2
µs
JIT
Minimum Time from Carrier
Generation to First Data
t
ms
MIN CD
f
f
/16
Subcarrier Frequency
Antenna Reversal Delay
847.5
151
kHz
µs
S
CC
t
128/f
0
S
S
t
128/f
Synchronization Delay
151
µs
1
t
Answer to New Request Delay
Time Between Request Characters
Time Between Answer Characters
14 ETU
132
0
µs
2
t
Coupler to SRIX512
SRIX512 to Coupler
57
3
µs
DR
t
0
µs
DA
With no Auto-Erase Cycle
(OTP)
ms
t
W
Programming Time for WRITE
With Auto-Erase Cycle
(EEPROM)
5
7
ms
ms
Binary Counter Decrement
Note: 1. All timing measurements were performed on a reference antenna with the following characteristics:
External size: 75mm x 48mm
Number of turns: 3
Width of conductor: 1mm
Space between 2 conductors: 0.4mm
Value of the coil: 1.4µH
Tuning Frequency: 14.4MHz.
31/41
SRIX512
Figure 52. SRIX512 Synchronous Timing, Transmit and Receive
ASK Modulated signal from the Reader to the Contactless device
t
RFF
t
A
B
RFR
ƒ
cc
t
RFSBL
t
MIN CD
FRAME Transmission between the reader and the contactless device
t
t
DR
DR
DATA
1
EOF
1
0
FRAME Transmitted by the reader in ASK
1
1
0
847KHz
SOF
1 1
0
0
DATA
DATA
FRAME Transmitted by the SRIX512
in BPSK
t
t
t
t
DA
0
1
DA
Data jitter on FRAME Transmitted by the reader in ASK
t
t
JIT
t
t
t
JIT
JIT
JIT
JIT
0
START
t
t
t
t
t
RFSBL
RFSBL
RFSBL
RFSBL
RFSBL
Ai09720
32/41
SRIX512
PACKAGE MECHANICAL
Figure 53. A3 Antenna Specification
A1
A
B
B1
AI09046B
Table 9. A3 Antenna Specification
Symbol
Parameter
Type
Min
37.5
37.5
42.5
42.5
90
Max
38.5
38.5
43.5
43.5
130
Unit
mm
mm
mm
mm
µm
A
B
Coil Width
Coil Length
Inlay Width
Inlay Length
38
38
A1
B1
43
43
Overall Thickness of Copper Antenna Coil
Silicon Thickness
110
180
40
165
195
µm
Q
Unloaded Q Value
F
Unloaded Free-air Resonance
15.1
MHz
NOM
0.5
114
A/m
dbµA/m
P
A
H-field Energy for Device Operation
33/41
SRIX512
Figure 54. A4 Antenna Specification
A
A1
B
B1
AI07696B
Table 10. A4 Antenna Specification
Symbol
Parameter
Type
15
Min
14.5
14.5
18.5
18.5
90
Max
15.5
15.5
19.5
19.5
130
Unit
mm
mm
mm
mm
µm
A
B
Coil Width
Coil Length
Inlay Width
Inlay Length
15
A1
B1
19
19
Overall Thickness of Copper Antenna Coil
Silicon Thickness
110
180
30
165
195
µm
Q
Unloaded Q Value
F
Unloaded Free-air Resonance
14.5
MHz
NOM
1.5
123.5
A/m
dbµA/m
P
A
H-field Energy for Device Operation
34/41
SRIX512
Figure 55. A5 Antenna Specification
A
A1
B
B1
AI09071B
Table 11. A5 Antenna Specification
Symbol
Parameter
Type
42
Min
41.5
64.5
45.5
69.5
130
Max
42.5
65.5
46.5
70.5
150
Unit
mm
mm
mm
mm
µm
A
B
Coil Width
Coil Length
Inlay Width
Inlay Length
65
A1
B1
46
70
Overall Thickness of Copper Antenna Coil
Silicon Thickness
140
180
30
165
195
µm
Q
Unloaded Q Value
F
Unloaded Free-air Resonance
14.8
MHz
NOM
0.25
108
A/m
dbµA/m
P
A
H-field Energy for Device Operation
35/41
SRIX512
PART NUMBERING
Table 12. Ordering Information Scheme
Example:
SRIX512
–
W4
/ XXX
Device Type
SRIX512
Package
W4 =180 µm ± 15 µm Unsawn Wafer
SBN18= 180µm ± 15 µm Bumped and Sawn Wafer on 8-inch Frame
A3T= 38mm x 38mm Copper Antenna on Continuous Tape
A3S= 38mm x 38mm Copper Singulated Adhesive Antenna on Tape
A4T= 15mm x 15mm Copper Antenna on Continuous Tape
A4S= 15mm x 15mm Copper Singulated Adhesive Antenna on Tape
A5T= 42mm x 65mm Copper Antenna on Continuous Tape
A5S= 42mm x 65mm Copper Singulated Adhesive Antenna on Tape
Customer Code
XXX = Given by STMicroelectronics
Note: Devices are shipped from the factory with the memory content bits erased to 1.
For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device,
please contact your nearest ST Sales Office.
36/41
SRIX512
APPENDIX A. ISO14443 TYPE B CRC CALCULATION
#include <stdio.h>
chBlock = *Data++;
#include <stdlib.h>
UpdateCrc(chBlock, &wCrc);
} while (--Length);
#include <string.h>
#include <ctype.h>
wCrc = ~wCrc; // ISO 3309
#define BYTE unsigned char
#define USHORT unsigned short
*TransmitFirst = (BYTE) (wCrc & 0xFF);
*TransmitSecond = (BYTE) ((wCrc >> 8) &
0xFF);
return;
unsigned short UpdateCrc(BYTE ch, USHORT
*lpwCrc)
}
{
ch = (ch^(BYTE)((*lpwCrc) & 0x00FF));
ch = (ch^(ch<<4));
int main(void)
{
*lpwCrc = (*lpwCrc >> 8)^((USHORT)ch <<
8)^((USHORT)ch<<3)^((USHORT)ch>>4);
return(*lpwCrc);
BYTE BuffCRC_B[10] = {0x0A, 0x12, 0x34,
0x56}, First, Second, i;
printf("Crc-16 G(x) = x^16 + x^12 + x^5
+ 1”);
}
printf("CRC_B of [ ");
for(i=0; i<4; i++)
printf("%02X ",BuffCRC_B[i]);
ComputeCrc(BuffCRC_B, 4, &First,
&Second);
printf("] Transmitted: %02X then
%02X.”, First, Second);
return(0);
void ComputeCrc(char *Data, int Length,
BYTE *TransmitFirst, BYTE *TransmitSecond)
{
BYTE chBlock; USHORTt wCrc;
wCrc = 0xFFFF; // ISO 3309
do
{
37/41
SRIX512
APPENDIX B. SRIX512 COMMAND BRIEF
Figure 56. INITIATE Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
06h
00h
CRC
CRC
EOF
L
H
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI07672
Figure 57. PCALL16 Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
06h
04h
CRC
CRC
EOF
L
H
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI07674
Figure 58. SLOT_MARKER Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
X6h
CRC
CRC
EOF
L
H
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI07676
Figure 59. SELECT Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
0Eh
Chip_ID CRC
CRC
EOF
L
H
<-t ->
<-t ->
SOF Chip_ID CRC
1
CRC
EOF
0
L
H
AI07678
Figure 60. COMPLETION Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
0Fh
CRC
CRC
EOF
L
H
No Response
AI07681
38/41
SRIX512
Figure 61. RESET_TO_INVENTORY Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF
0Ch
CRC
CRC
EOF
L
H
No Response
AI07681
Figure 62. READ_BLOCK Frame Exchange Between Reader and SRIX512
Reader
SRIX4K
SOF 08h ADDR CRC CRC EOF
L
H
DATA DATA DATA DATA
<-t -> <-t ->
SOF
CRC CRC EOF
L H
0
1
1
2
3
4
AI07686
Figure 63. WRITE_BLOCK Frame Exchange Between Reader and SRIX512
DATA DATA DATA DATA
Reader
SRIX4K
CRC CRC EOF
SOF 09h
ADDR
L
H
1
2
3
4
No Response
AI07688
Figure 64. GET_UID Frame Exchange Between Reader and SRIX512
S
O
F
E
O
F
Reader
SRIX4K
0Bh CRC CRC
L
H
S
O
F
E
O
F
UID UID UID UID UID UID UID UID
<-t -> <-t ->
CRC CRC
0
1
L
H
0
1
2
3
4
5
6
7
AI07692
39/41
SRIX512
REVISION HISTORY
Table 13. Document Revision History
Date
Version
1.0
Description of Revision
11-Jul-2003
26-Apr-2004
29-Nov-2004
13-Dec-2004
17-Aug-2005
First Issue
2.0
First public release of full datasheet
3.0
PACKAGE MECHANICAL section revised.
V
and C
parameters added to Table 7., DC Characteristics.
TUN
4.0
RET
5.0
Updated initial counter values in 32-bit Binary Counters, page 11.
40/41
SRIX512
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
41/41
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