M27C4001-35XN6X [STMICROELECTRONICS]
4 Mbit 512Kb x 8 UV EPROM and OTP EPROM; 4兆位512KB ×8 UV EPROM和OTP EPROM型号: | M27C4001-35XN6X |
厂家: | ST |
描述: | 4 Mbit 512Kb x 8 UV EPROM and OTP EPROM |
文件: | 总17页 (文件大小:160K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
M27C4001
4 Mbit (512Kb x 8) UV EPROM and OTP EPROM
■ 5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
■ ACCESS TIME: 35ns
■ LOW POWER CONSUMPTION:
– Active Current 30mA at 5MHz
– Standby Current 100µA
32
32
1
1
FDIP32W (F)
PDIP32 (B)
■ PROGRAMMING VOLTAGE: 12.75V ± 0.25V
■ PROGRAMMING TIME: 100µs/word
■ ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 41h
LCCC32W (L)
DESCRIPTION
The M27C4001 is a 4 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It is ideally suited for micro-
processor systems requiring large programs and
is organised as 524,288 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
and LCCC32W (leadless chip carrier package)
have a transparent lid which allow the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
TSOP32 (N)
8 x 20 mm
PLCC32 (C)
Figure 1. Logic Diagram
For applications where the content is programmed
only one time and erasure is not required, the
M27C4001 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
V
V
PP
CC
19
8
A0-A18
Q0-Q7
E
M27C4001
G
V
SS
AI00721B
November 2000
1/17
M27C4001
Figure 2A. DIP Connections
Figure 2B. LCC Connections
V
1
2
3
4
5
6
7
8
9
32
V
CC
PP
A16
A15
A12
A7
31 A18
30 A17
29 A14
28 A13
27 A8
1 32
A7
A14
A13
A8
A6
A5
A4
A6
A5
26 A9
A9
A4
25 A11
M27C4001
A3
A2
A1
A0
Q0
9
M27C4001
25 A11
G
A3
24
23 A10
22
G
A2 10
A1 11
A0 12
Q0 13
Q1 14
Q2 15
A10
E
E
21 Q7
20 Q6
19 Q5
18 Q4
17 Q3
Q7
17
V
16
SS
AI00723
AI00722
Figure 2C. TSOP Connections
Table 1. Signal Names
A0-A18
Q0-Q7
E
Address Inputs
Data Outputs
Chip Enable
Output Enable
A11
A9
1
32
G
A10
E
G
A8
A13
A14
A17
A18
Q7
Q6
Q5
Q4
Q3
V
Program Supply
Supply Voltage
Ground
PP
V
CC
V
SS
V
8
9
M27C4001 25
CC
(Normal)
V
24
V
SS
PP
A16
Q2
Q1
Q0
A0
A1
A2
A3
A15
A12
A7
A6
A5
A4
16
17
AI01155B
2/17
M27C4001
(1)
Table 2. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
°C
°C
°C
V
(3)
T
A
–40 to 125
–50 to 125
–65 to 150
–2 to 7
Ambient Operating Temperature
T
Temperature Under Bias
BIAS
T
STG
Storage Temperature
(2)
Input or Output Voltage (except A9)
V
IO
V
Supply Voltage
–2 to 7
–2 to 13.5
–2 to 14
V
V
V
CC
(2)
A9 Voltage
V
A9
V
Program Supply Voltage
PP
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
+0.5V with possible overshoot to V
+2V for a period less than 20ns.
CC
CC
(1)
Table 3. Operating Modes
Mode
V
E
G
A9
X
Q7 - Q0
Data Out
Hi-Z
pp
V
IL
V
V
V
or V
Read
IL
IH
IH
CC
CC
SS
V
IL
V
V
or V
Output Disable
Program
X
SS
V
Pulse
V
X
Data In
Data Out
Hi-Z
IL
PP
PP
PP
V
V
V
V
Verify
X
IH
IH
IH
IL
V
V
V
Program Inhibit
Standby
X
IH
V
or V
SS
X
X
Hi-Z
CC
V
V
IL
V
ID
V
CC
Electronic Signature
Codes
IL
Note: 1. X = V or V , V = 12V ± 0.5V.
IH IL ID
Table 4. Electronic Signature
Identifier
A0
Q7
0
Q6
0
Q5
1
Q4
0
Q3
0
Q2
0
Q1
0
Q0
0
Hex Data
20h
V
IL
Manufacturer’s Code
Electronic Signature
V
0
1
0
0
0
0
0
1
41h
IH
3/17
M27C4001
Table 5. AC Measurement Conditions
High Speed
≤ 10ns
Standard
≤ 20ns
Input Rise and Fall Times
Input Pulse Voltages
0 to 3V
1.5V
0.4 to 2.4V
0.8 and 2V
Input and Output Timing Ref. Voltages
Figure 3. AC Testing Input Output Waveform
Figure 4. AC Testing Load Circuit
1.3V
High Speed
1N914
3V
1.5V
3.3kΩ
0V
DEVICE
UNDER
TEST
OUT
Standard
C
L
2.4V
2.0V
0.8V
0.4V
C
C
C
= 30pF for High Speed
= 100pF for Standard
includes JIG capacitance
L
L
L
AI01822
AI01823B
(1)
Table 6. Capacitance
Symbol
(T = 25 °C, f = 1 MHz)
A
Parameter
Input Capacitance
Output Capacitance
Test Condition
Min
Max
6
Unit
pF
C
V
= 0V
= 0V
IN
IN
C
OUT
V
OUT
12
pF
Note: 1. Sampled only, not 100% tested.
DEVICE OPERATION
dresses are stable, the address access time
(t
(t
of t
) is equal to the delay from E to output
). Data is available at the output after a delay
AVQV
ELQV
The operating modes of the M27C4001 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
from the falling edge of G, assuming that
GLQV
E has been low and the addresses have been sta-
levels except for V and 12V on A9 for Electronic
PP
ble for at least t
-t
.
AVQV GLQV
Signature.
Standby Mode
Read Mode
The M27C4001 has a standby mode which reduc-
es the supply current from 30mA to 100µA. The
M27C4001 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
The M27C4001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
4/17
M27C4001
(1)
Table 7. Read Mode DC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V
)
A
CC
PP
Test Condition
0V ≤ V ≤ V
CC
Symbol
Parameter
Input Leakage Current
Output Leakage Current
Min
Max
Unit
µA
I
±10
±10
LI
IN
CC
I
LO
0V ≤ V
≤ V
OUT CC
µA
E = V , G = V ,
IL
IL
I
Supply Current
30
mA
CC
I
= 0mA, f = 5MHz
OUT
I
E = V
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
1
mA
µA
µA
V
CC1
IH
I
E > V – 0.2V
CC
100
10
CC2
I
V
= V
PP CC
PP
V
Input Low Voltage
–0.3
2
0.8
IL
(2)
V
+ 1
Input High Voltage
V
V
IH
CC
V
I
= 2.1mA
= –400µA
= –100µA
Output Low Voltage
0.4
V
OL
OL
I
I
Output High Voltage TTL
Output High Voltage CMOS
2.4
V
OH
OH
V
OH
V
CC
– 0.7V
V
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Maximum DC voltage on Output is V +0.5V.
CC
(1)
Table 8A. Read Mode AC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V
)
A
CC
PP
CC
M27C4001
(3)
(3)
(3)
Symbol
Alt
Parameter
Test Condition
Unit
-35
Min
-45
-55
Min
Max
Min
Max
Max
Address Valid to
Output Valid
t
t
E = V , G = V
35
35
20
30
30
45
55
55
30
30
30
ns
ns
ns
ns
ns
ns
AVQV
ACC
IL
IL
Chip Enable Low to
Output Valid
t
t
G = V
IL
45
25
30
30
ELQV
CE
Output Enable Low to
Output Valid
t
t
E = V
IL
GLQV
OE
Chip Enable High to
Output Hi-Z
(2)
t
t
t
G = V
0
0
0
0
0
0
0
0
0
t
DF
DF
IL
EHQZ
Output Enable High to
Output Hi-Z
(2)
E = V
t
IL
GHQZ
Address Transition to
Output Transition
t
E = V , G = V
IL IL
AXQX
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V
PP
CC
PP
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Two Line Output Control
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
5/17
M27C4001
(1)
Table 8B. Read Mode AC Characteristics
(T = 0 to 70 °C or –40 to 85 °C; V = 5V ± 5% or 5V ± 10%; V = V
)
A
CC
PP
CC
M27C4001
-80/-90
Symbol
Alt
Parameter
Test Condition
-70
Max
-10/-12/-15
Unit
Min
Min
Max
Min
Max
Address Valid to
Output Valid
t
t
E = V , G = V
70
70
35
30
30
80
100
ns
ns
ns
ns
ns
ns
AVQV
ACC
IL
IL
Chip Enable Low to
Output Valid
t
t
G = V
80
40
30
30
100
50
ELQV
CE
IL
IL
IL
IL
Output Enable Low to
Output Valid
t
t
E = V
G = V
E = V
GLQV
OE
Chip Enable High to
Output Hi-Z
(2)
t
t
t
0
0
0
0
0
0
0
0
0
30
t
DF
EHQZ
Output Enable High to
Output Hi-Z
(2)
30
t
DF
GHQZ
Address Transition to
Output Transition
t
E = V , G = V
IL IL
AXQX
OH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
Figure 5. Read Mode AC Waveforms
VALID
tGLQV
VALID
A0-A18
tAVQV
tAXQX
E
tEHQZ
tGHQZ
G
tELQV
Hi-Z
Q0-Q7
AI00724B
System Considerations
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I , has three seg-
ic capacitor be used on every device between V
CC
and V . This should be a high frequency capaci-
SS
CC
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
tion, a 4.7µF bulk electrolytic capacitor should be
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
used between V and V for every eight devic-
CC
SS
es. The bulk capacitor should be located near the
power supply connection point. The purpose of the
bulk capacitor is to overcome the voltage drop
caused by the inductive effects of PCB traces.
6/17
M27C4001
(1)
Table 9. Programming Mode DC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V)
A
CC
PP
Symbol
Parameter
Test Condition
Min
Max
±10
50
Unit
µA
mA
mA
V
I
0 ≤ V ≤ V
Input Leakage Current
Supply Current
LI
IN
CC
I
CC
I
PP
E = V
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
A9 Voltage
50
IL
V
–0.3
2
0.8
IL
V
IH
V
+ 0.5
CC
V
V
OL
I
= 2.1mA
OL
0.4
V
V
OH
I
= –400µA
OH
2.4
V
V
ID
11.5
12.5
V
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
(1)
Table 10. Programming Mode AC Characteristics
(T = 25 °C; V = 6.25V ± 0.25V; V = 12.75V ± 0.25V)
A
CC
PP
Symbol
Alt
Parameter
Test Condition
Min
2
Max
Unit
µs
t
t
AS
Address Valid to Chip Enable Low
Input Valid to Chip Enable Low
AVEL
t
t
2
µs
QVEL
DS
t
t
V
High to Chip Enable Low
High to Chip Enable Low
2
µs
VPHEL
VPS
VCS
PP
CC
t
t
V
2
µs
VCHEL
t
t
PW
Chip Enable Program Pulse Width
95
105
µs
ELEH
Chip Enable High to Input
Transition
t
t
DH
2
2
µs
µs
EHQX
Input Transition to Output Enable
Low
t
t
QXGL
OES
t
t
OE
Output Enable Low to Output Valid
Output Enable High to Output Hi-Z
100
130
ns
ns
GLQV
t
t
DFP
0
0
GHQZ
Output Enable High to Address
Transition
t
t
ns
GHAX
AH
Note: 1. V must be applied simultaneously with or before V and removed simultaneously or after V .
PP
CC
PP
2. Sampled only, not 100% tested.
Programming
light (UV EPROM). The M27C4001 is in the pro-
gramming mode when V input is at 12.75V, G is
PP
When delivered (and after each erasure for UV
EPROM), all bits of the M27C4001 are in the ’1’
state. Data is introduced by selectively program-
ming ’0’s into the desired bit locations. Although
only ’0’s will be programmed, both ’1’s and ’0’s can
be present in the data word. The only way to
change a ’0’ to a ’1’ is by die exposure to ultraviolet
at V and E is pulsed to V . The data to be pro-
IH
IL
grammed is applied to 8 bits in parallel to the data
output pins. The levels required for the address
and data inputs are TTL. V
is specified to be
CC
6.25V ± 0.25V.
7/17
M27C4001
Figure 6. Programming and Verify Modes AC Waveforms
VALID
A0-A18
tAVPL
Q0-Q7
DATA IN
DATA OUT
tQVEL
tVPHEL
tVCHEL
tEHQX
V
PP
tGLQV
tGHQZ
tGHAX
V
CC
E
tELEH
tQXGL
G
PROGRAM
VERIFY
AI00725
Figure 7. Programming Flowchart
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 52.5 seconds. Pro-
gramming with PRESTO II consists of applying a
sequence of 100µs program pulses to each byte
until a correct verify occurs (see Figure 7). During
programming and verify operation, a MARGIN
MODE circuit is automatically activated in order to
guarantee that each cell is programmed with
enough margin. No overprogram pulse is applied
since the verify in MARGIN MODE provides the
necessary margin to each programmed cell.
V
= 6.25V, V
= 12.75V
PP
CC
n = 0
E = 100µs Pulse
NO
NO
++n
= 25
VERIFY
YES
++ Addr
Program Inhibit
YES
Programming of multiple M27C4001s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C4001 may be common. A TTL low level
Last
Addr
NO
FAIL
pulse applied to a M27C4001’s E input, with V
PP
YES
at 12.75V, will program that M27C4001. A high
level E input inhibits the other M27C4001s from
being programmed.
CHECK ALL BYTES
1st: V
2nd: V
= 6V
= 4.2V
CC
CC
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
AI00760B
at V , E at V , V at 12.75V and V at 6.25V.
IL
IH
PP
CC
8/17
M27C4001
Electronic Signature
ERASURE OPERATION (applies to UV EPROM)
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27C4001. To activate the ES
mode, the programming equipment must force
11.5V to 12.5V on address line A9 of the
The erasure characteristics of the M27C4001 are
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Data
shows that constant exposure to room level fluo-
rescent lighting could erase a typical M27C4001 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27C4001 is to be exposed to
these types of lighting conditions for extended pe-
riods of time, it is suggested that opaque labels be
put over the M27C4001 window to prevent unin-
tentional erasure. The recommended erasure pro-
cedure for the M27C4001 is exposure to short
wave ultraviolet light which has wavelength of
2537 Å. The integrated dose (i.e. UV intensity x
exposure time) for erasure should be a minimum
M27C4001 with V = V
= 5V. Two identifier
PP
CC
bytes may then be sequenced from the device out-
puts by toggling address line A0 from V to V . All
IL
IH
other address lines must be held at V during
IL
Electronic Signature mode. Byte 0 (A0 = V ) rep-
IL
resents the manufacturer code and byte 1
(A0 = V ) the device identifier code. For the
IH
STMicroelectronics M27C4001, these two identifi-
er bytes are given in Table 4 and can be read-out
on outputs Q7 to Q0.
2
of 15 W-sec/cm . The erasure time with this dos-
age is approximately 15 to 20 minutes using an ul-
2
traviolet lamp with 12000 µW/cm power rating.
The M27C4001 should be placed within 2.5 cm (1
inch) of the lamp tubes during the erasure. Some
lamps have a filter on their tubes which should be
removed before erasure.
9/17
M27C4001
Table 11. Ordering Information Scheme
Example:
M27C4001
-45
X
C
1
TR
Device Type
M27
Supply Voltage
C = 5V
Device Function
4001 = 4 Mbit (512Kb x 8)
Speed
(1)
-35
-45
-55
= 35 ns
= 45 ns
= 55 ns
(1)
(1)
-70 = 70 ns
-80 = 80 ns
-90 = 90 ns
-10 = 100 ns
-12 = 120 ns
-15 = 150 ns
V
Tolerance
CC
blank = ± 10%
X = ± 5%
Package
F = FDIP32W
L = LCCC32W
B = PDIP32
C = PLCC32
N = TSOP32: 8 x 20 mm
Temperature Range
1 = 0 to 70 °C
6 = –40 to 85 °C
Options
X = Additional Burn-in
TR = Tape & Reel Packing
Note: 1. High Speed, see AC Characteristics section for further information.
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.
10/17
M27C4001
Table 12. Revision History
Date
Revision Details
July 1998
09/25/00
11/29/00
First Issue
AN620 Reference removed
PLCC codification changed (Table 11)
11/17
M27C4001
Table 13. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
5.72
1.40
4.57
4.50
0.56
–
Typ
Max
0.225
0.055
0.180
0.177
0.022
–
A
A1
A2
A3
B
0.51
3.91
3.89
0.41
–
0.020
0.154
0.153
0.016
–
B1
C
1.45
0.057
0.23
41.73
–
0.30
42.04
–
0.009
1.643
–
0.012
1.655
–
D
D2
E
38.10
15.24
1.500
0.600
–
–
–
–
E1
e
13.06
–
13.36
–
0.514
–
0.526
–
2.54
0.100
0.590
eA
eB
L
14.99
–
–
–
–
16.18
3.18
1.52
–
18.03
0.637
0.125
0.060
–
0.710
S
2.49
–
0.098
–
Ø
7.11
0.280
α
4°
11°
4°
11°
N
32
32
Figure 8. FDIP32W - 32 pin Ceramic Frit-seal DIP with window, Package Outline
A2
A3
A1
A
L
α
B1
B
e
C
eA
eB
D2
D
S
N
1
E1
E
FDIPW-a
Drawing is not to scale.
12/17
M27C4001
Table 14. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Mechanical Data
millimeters
inches
Min
–
Symbol
Typ
Min
–
Max
5.08
–
Typ
Max
0.200
–
A
A1
A2
B
0.38
3.56
0.38
–
0.015
0.140
0.015
–
4.06
0.51
–
0.160
0.020
–
B1
C
1.52
0.060
0.20
41.78
–
0.30
42.04
–
0.008
1.645
–
0.012
1.655
–
D
D2
E
38.10
15.24
1.500
0.600
–
–
–
–
E1
e1
eA
eB
L
13.59
–
13.84
–
0.535
–
0.545
–
2.54
0.100
0.600
15.24
–
–
–
–
15.24
3.18
1.78
0°
17.78
3.43
2.03
10°
0.600
0.125
0.070
0°
0.700
0.135
0.080
10°
S
α
N
32
32
Figure 9. PDIP32 - 32 lead Plastic DIP, 600 mils width, Package Outline
A2
A
L
A1
e1
α
C
B1
B
eA
eB
D2
D
S
N
1
E1
E
PDIP
Drawing is not to scale.
13/17
M27C4001
Table 15. LCCC32W - 32 lead Leadless Ceramic Chip Carrier, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
2.80
0.71
11.63
14.22
–
Typ
Max
0.110
0.028
0.458
0.560
–
A
B
0.51
11.53
13.72
–
0.020
0.442
0.540
–
D
E
e
1.27
0.050
e1
e2
e3
h
0.39
–
–
0.015
–
–
7.62
10.16
1.02
–
0.300
0.400
0.040
0.020
–
–
–
–
–
–
–
–
–
j
0.51
–
–
–
–
L
1.14
1.96
10.50
8.03
32
1.40
2.36
10.80
8.23
0.045
0.077
0.413
0.316
32
0.055
0.093
0.425
0.324
L1
K
K1
N
Figure 10. LCCC32W - 32 lead Leadless Ceramic Chip Carrier, Package Outline
e2
D
j x 45o
e
N
1
L1
B
e1
K
E
e3
K1
A
h x 45o
L
LCCCW-a
Drawing is not to scale.
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M27C4001
Table 16. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data
millimeters
inches
Symbol
Typ
Min
Max
3.56
2.41
Typ
Min
Max
0.140
0.095
A
A1
A2
B
2.54
0.100
0.060
0.015
0.013
0.026
0.485
0.447
0.390
1.52
0.38
0.33
0.53
0.81
0.021
0.032
0.495
0.455
0.430
B1
D
0.66
12.32
11.35
9.91
12.57
11.56
10.92
D1
D2
e
1.27
0.89
0.050
0.035
E
14.86
13.89
12.45
0.00
15.11
14.10
13.46
0.25
0.585
0.547
0.490
0.000
0.595
0.555
0.530
0.010
E1
E2
F
R
N
32
7
32
7
Nd
Ne
CP
9
9
0.10
0.004
Figure 11. PLCC32 - 32 lead Plastic Leaded Chip Carrier, Package Outline
D
A1
D1
A2
1 N
B1
e
Ne
E1 E
D2/E2
F
B
0.51 (.020)
1.14 (.045)
Nd
A
R
CP
PLCC
Drawing is not to scale.
15/17
M27C4001
Table 17. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Mechanical Data
millimeters
Min
inches
Min
Symbol
Typ
Max
1.20
0.17
1.05
0.27
0.21
20.20
18.50
8.10
–
Typ
Max
0.047
0.006
0.041
0.011
0.008
0.795
0.728
0.319
–
A
A1
A2
B
0.05
0.95
0.15
0.10
19.80
18.30
7.90
–
0.002
0.037
0.006
0.004
0.780
0.720
0.311
–
C
D
D1
E
e
0.50
0.020
L
0.50
0°
0.70
5°
0.020
0°
0.028
5°
α
N
32
32
CP
0.10
0.004
Figure 12. TSOP32 - 32 lead Plastic Thin Small Outline, 8 x 20 mm, Package Outline
A2
1
N
e
E
B
N/2
D1
D
A
CP
DIE
C
TSOP-a
Drawing is not to scale.
A1
α
L
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M27C4001
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