LNBP12 [STMICROELECTRONICS]
LNB SUPPLY AND CONTROL VOLTAGE REGULATOR PARALLEL INTERFACE; LNB电源和控制稳压器并行接口
| 型号： | LNBP12 |
| 厂家： | 
ST |
| 描述： | LNB SUPPLY AND CONTROL VOLTAGE REGULATOR PARALLEL INTERFACE |
| 文件： | 总18页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LNBP10 SERIES
LNBP20
LNB SUPPLY AND CONTROL VOLTAGE
REGULATOR (PARALLEL INTERFACE)
■
COMPLETE INTERFACE FOR TWO LNBs
REMOTE SUPPLY AND CONTROL
LNB SELECTION AND STAND-BY FUNCTION
BUILT-INTONE OSCILLATOR FACTORY
TRIMMED AT 22KHz
■
■
■
■
■
■
■
FAST OSCILLATORSTART-UP
FACILITATESDiSEqC ENCODING
TWO SUPPLY INPUTS FOR LOWEST
DISSIPATION
BYPASSFUNCTION FOR SLAVE
OPERATION
LNB SHORT CIRCUIT PROTECTION AND
DIAGNOSTIC
AUXILIARYMODULATION INPUT EXTENDS
FLEXIBILITY
Multiwatt-15
10
■
■
CABLE LENGTH COMPENSATION
INTERNAL OVER TEMPERATURE
PROTECTION
1
PowerSo-20
PowerSO-10
■
BACKWARD CURRENT PROTECTION
DESCRIPTION
The regulator outputs can be logic controlled to
be 13 or 18 V (typ.) by mean of the VSEL pin for
remote controlling of LNBs. Additionally, it is
possible to increment by 1V (typ.) the selected
voltage value to compensate the excess voltage
drop along the coaxial cable (LLC pin HIGH).
In order to reduce the power dissipation of the
device when the lowest output voltage is
selected, the regulator has two Supply Input pins
Intended for analog and digital satellite receivers,
the LNBP is a monolithic linear voltage regulator,
assembled in Multiwatt-15, PowerSO-20 and
PowerSO-10, specifically designed to provide the
powering voltages and the interfacing signals to
the LNB downconverter situated in the antenna
via the coaxial cable. Since most satellite
receivers have two antenna ports, the output
voltage of the regulator is available at one of two
logic-selectable output pins (LNBA, LNBB). When
the IC is powered and put in Stand-by (EN pin
LOW), both regulator outputs are disabled to
allow the antenna downconverters to be
supplied/controlled by others satellite receivers
sharing the same coaxial lines. In this occurrence
the device will limit at 3 mA (max) the backward
current that could flow from LNBA and LNBB
output pins to GND.
VCC1 and VCC2
.
They must be powered
respectively at 16V (min) and 23V (min), and an
internal switch automatically will select the
suitable supply pin according to the selected
output voltage. If adequate heatsink is provided
and higher power losses are acceptable, both
supply pins can be powered by the same 23V
source without affecting any other circuit
performance.
The ENT (Tone Enable) pin activates the internal
oscillator so that the DC output is modulated by a
±0.3 V, 22KHz (typ.) square wave. This internal
oscillator is factory trimmed within a tolerance of
±2KHz, thus no further adjustments neither
external components are required.
For slave operation in single dish, dual receiver
systems, the bypass function is implemented by
an electronic switch between the Master Input pin
(MI) and the LNBA pin, thus leaving all LNB
powering and control functions to the Master
Receiver. This electronic switch is closed when
the device is powered and EN pin is LOW.
A burst coding of the 22KHz tone can be
1/18
September 1998
LNBP10 SERIES - LNBP20
accomplished thanks to the fast response of the
ENT input and the prompt oscillator start-up. This
helps designers who want to implement the
DiSEqC protocols(*).
In order to improve design flexibility and to allow
implementation of newcoming LNB remote
control standards, an analogic modulation input
pin is available (EXTM). An appropriate DC
blocking capacitor must be used to couple the
modulating signal source to the EXTM pin. When
external modulation is not used, the relevant pin
can be left open.
from HIGH IMPEDANCE state goes LOW. After
the time has elapsed, the output is resumed for a
time ton=1/15toff (typ.) and OLF goes in HIGH
IMPEDANCE. If the overload is still present, the
protection circuit will cycle again through toff and
ton until the overload is removed. Typical ton+toff
value is 1200ms when a 4.7µF external capacitor
is used.
This dynamic operation can greatly reduce the
power dissipation in short circuit condition, still
ensuring excellent power-on start up even with
highly capacitive loads on LNB outputs.
Two pins are dedicated to the overcurrent
protection/monitoring: CEXT and OLF. The
overcurrent protection circuit works dynamically:
as soon as an overload is detected in either LNB
output, the output is shut-down for a time Toff
determined by the capacitor connected between
CEXT and GND. Simultaneously the OLF pin,
that is an open collector diagnostic output flag,
The device is packaged in Multiwatt15 for
thru-holes mounting and in PowerSO-20 for
surface mounting. When a limited functionality in
a smaller package matches design needs, a
range of cost-effective PowerSO-10 solutions is
also offered. All versions have built-in thermal
protection against overheatingdamage.
(*): External components are needed to comply to level 2.x and above (bidirectional) DiSEqC bus hardware requirements. DiSEqC is
a trademark of EUTELSAT.
ORDERING NUMBERS
Type
Multiwatt-15
PowerSO-20
PowerSO-10
LNBP10SP
LNBP10
LNBP11
LNBP12
LNBP13
LNBP14
LNBP15
LNBP16
LNBP20
LNBP11SP
LNBP12SP
LNBP13SP
LNBP14SP
LNBP15SP
LNBP16SP
LNBP20CR
LNBP20PD
PIN CONFIGURATIONS
Multiwatt-15
PowerSO-20
PowerSO-10
2/18
LNBP10 SERIES - LNBP20
TABLE A: PIN CONFIGURATIONS
SYMBOL
NAME
FUNCTION
PIN NUMBER vs SALES TYPE (LNBP)
20CR 20PD 10SP 11SP 12SP 13SP 14SP 15SP 16SP
VCC1
Supply Input 1
Supply Input 2
Output Port
15V to 25V supply. It is
automatically selected
when VOUT = 13 or 14V
1
2
3
2
3
4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
VCC2
22V to 25V supply. It is
automatically selected
when VOUT = 18 or 19V
LNBA
See truth tables for voltage
and port selection. In
stand-by mode this port is
powered by the MI pin via
the internal Bypass Switch
VSEL
Output Voltage
Selection: 13 or
18V (typ)
Logic control input: See
truthtable
4
5
4
4
5
4
5
4
5
4
5
4
5
4
5
EN
Port Enable
Port Selection
Ground
Logic control input: See
truthtable
5
7
8
6
7
5
9
6
OSEL
GND
Logic control input: See
truthtable
NA NA NA NA NA NA
Circuit Ground. It is
internally connected to the
die frame
1
6
6
6
6
6
6
10
11
20
ENT
22 KHz Tone
Enable
Logic control input: See
truthtable
9
13
7
8
7
8
7
8
7
8
7
8
7
8
7
8
CEXT
External Capacitor Timing capacitor used by
the Dynamic Overload
10
14
Protection. Typical
application is 4.7 µF for a
1200 ms cycle
EXTM
External
Modulation
External Modulation Input.
Needs DC decoupling to
the AC source. If not used,
can be left open.
11
15
NA NA NA
9
NA
9
9
LLC
OLF
Line Length
Compens. (1V typ) truthtable
Logic control input: See
12
13
16
17
NA NA
9
NA
9
NA
10
10
Over Load Flag
Master Input
Output Port
Logic output (open
NA
NA
10
9
NA NA
10
NA
Collector). Normally in
HIGH IMPEDANCE, goes
LOW when current or
thermal overload occurs.
MI
In stand-by mode, the
voltage on MI is routed to
LNBA pin. Can be left
open if bypass function is
not needed
14
18
10
10
10
NA NA NA
LNBB
See truth tables for voltage 15
and port selection.
19
NA NA NA NA NA NA
NOTE: The limited pin availability of the PowerSO-10 package leads to drop some functions.
3/18
LNBP10 SERIES - LNBP20
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
28
Unit
Vi
Io
DC Input Voltage (VCC1, VCC2, MI)
V
Output Current (LNBA, LNBB)
Internally limited
-0.5 to 7
900
Vi
Logic Input Voltage (ENT, EN, OSEL, VSEL, LLC)
Bypass Switch Current
V
mA
W
oC
oC
ISW
Ptot
Tstg
Top
Power Dissipation at Tcase < 85oC
14
Storage Temperature Range
- 40 to 150
- 40 to 125
Operating Junction Temperature Range
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions
is not implied
THERMAL DATA
Symbol
Parameter
Value
Unit
Rthj-case Thermal Resistance Junction-case
2
oC/W
LOGIC CONTROLS TRUTH TABLES
Control I/O
Pin Name
L
H
OUT
IN
OLF
IOUT > IOMAX or Tj > 150OC
22KHz tone OFF
See table below
See table below
See table below
See table below
IOUT < IOMAX
ENT
22KHz tone ON
See table below
See table below
See table below
See table below
IN
EN
IN
OSEL
VSEL
LLC
IN
IN
EN
OSEL
VSEL
LLCP
VLNBA
VMI -0.4V (typ.)
13V (typ.)
18V (typ.)
14V (typ.)
19V (typ.)
Disabled
VLNBB
L
X
L
X
L
X
L
Disabled
Disabled
Disabled
Disabled
Disabled
13V (typ.)
18V (typ.)
14V (typ.)
19V (typ.)
H
H
H
H
H
H
H
H
L
H
L
L
L
H
H
L
L
H
L
H
H
H
H
H
L
L
Disabled
H
Disabled
H
H
Disabled
NOTE: All logic input pins have internal pull-down resistor (typ. = 250KΩ)
4/18
LNBP10 SERIES - LNBP20
BLOCK DIAGRAM
5/18
LNBP10 SERIES - LNBP20
ELECTRICAL CHARACTERISTICS FOR LNBP SERIES (Tj = 0 to85 oC, Ci = 0.22 µF, Co = 0.1 µF,
EN=H, ENT=L, LLC= L, VIN1 = 16V, VIN2 = 23V, IOUT = 50mA, (unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VIN1
VCC1 Supply Voltage
IO = 500mA, ENT=H, VSEL=L, LLC=L
IO = 500mA, ENT=H, VSEL=L, LLC=H
15
16
25
25
V
V
VIN2
VO1
VO2
∆VO
∆VO
VCC2 Supply Voltage
Output Voltage
Output Voltage
Line Regulation
Load Regulation
IO = 500mA, ENT=VSEL=H, LLC=L
IO = 500mA, ENT=VSEL=H, LLC=H
22
23
25
25
V
V
IO = 500 mA, VSEL=H, LLC=L
IO = 500 mA, VSEL=H, LLC=H
17.3
18
19
18.7
V
V
IO = 500 mA, VSEL=L, LLC=L
IO = 500 mA, VSEL=L, LLC=H
12.5
13
14
13.5
V
V
VIN1 = 15 to 18 V, VOUT = 13 V
VIN2 = 22 to 25 V, VOUT = 18 V
4
4
40
40
mV
mV
VIN1 = VIN2 = 22 V, VOUT = 13 or 18V,
IO = 50 to 500 mA
80
180
mV
SVR Supply Voltage Rejection
45
dB
mA
ms
VIN1 = VIN2 = 23 ± 0.5Vac, fac = 50 KHz
IMAX
tOFF
Output Current Limiting
500
650
800
Dynamic Overload Protection
OFF Time
1100
Output shorted, CEXT = 4.7µF
Output shorted, CEXT = 4.7µF
tON
Dynamic Overload Protection
ON Time
t
OFF/15
ms
FTONE Tone Frequency
ATONE Tone Amplitude
DTONE Tone Duty Cucle
ENT=H
ENT=H
ENT=H
ENT=H
20
0.4
40
5
22
0.6
50
10
5
24
0.8
60
KHz
Vpp
%
tr, tf
Tone Rise or Fall Time
15
µs
GEXTM External Modulation Gain
∆
VOUT/∆VEXTM, f = 10Hz to 40KHz
VEXTM External Modulation Input
Voltage
AC Coupling
400
mVpp
Ω
ZEXTM External Modulation
Impedance
f = 10Hz to 40KHz
EN=L, ISW= 300mA, VCC2-VMI = 4V
IOL = 8mA
400
0.35
0.28
VSW
Bypass Switch Voltage Drop
(MI to LNBA)
0.6
V
VOL
IOZ
Overload Flag Pin Logic Low
0.5
10
V
Overload Flag Pin OFF State VOH = 6V
Leakage Current
µA
VIL
VIH
IIH
Control Input Pin Logic Low
Control Input Pin Logic High
0.8
V
2.5
V
Control Pins Input Current
Supply Current
VIH = 5V
20
µA
mA
mA
mA
ICC
ICC
IOBK
Outputs Disabled (EN=L)
ENT=H, IOUT = 500 mA
0.3
3.1
0.2
1
6
3
Supply Current
Output Backward Current
EN=L, VLNBA = VLNBB = 18V
VIN1 = VIN2 = 22V or floating
TSHDN Thermal Shutdown Threshold
150
oC
6/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (unless otherwise specified Tj=25oC)
Tone Frequency vs Temperature
Output Voltage vs Output Current
Tone Duty Cycle vs Temperature
Tone Fall Time vs Temperature
Tone Rise Time vs Temperature
Tone Amplitude vs Temperature
7/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
S.V.R. vs Frequency
LNBA External Modulation Gain vs Frequency
External Modulationvs Temperature
Bypass Switch Drop vs Output Current
Bypass Switch Drop vs Output Current
OverloadFlag pin Logic Low vs Flag Current
8/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Supply Current vs Temperature
Supply Current vs Temperature
Dynamic Overload protection (ISC vs Time)
Tone Disable
Tone Enable
22 KHz Tone
9/18
LNBP10 SERIES - LNBP20
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Enable Time
Disable Time
18V to 13V Change
13V to 18V Change
10/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS
TWO ANTENNA PORTS RECEIVER
MCU+V
10uF
17V
24V
ANT CONNECTORS
JA
C2
11
1
2
AUX DATA
EXTM
OLF
VCC1
VCC2
R1
3
LNBA
LNBB
MI
47K
13
15
14
JB
TUNER
4
9
5
10
VSEL
ENT
EN
CEXT
4.7µF C1
C3
C4 C5 C6
2x 47nF
+
7
OSEL
LLC
12
8
GND
2x 0.1µF
LNBP20CR
Vcc
I/Os
I/Os
MCU
SINGLE ANTENNA RECEIVER WITH MASTER RECEIVER PORT
17V
24V
MCU+V
10uF
C2
1
2
11
13
AUX DATA
EXTM
OLF
VCC1
VCC2
R1
ANT
3
15
14
LNBA
LNBB
MI
47K
MASTER
10
4
9
5
7
12
TUNER
VSEL
ENT
EN
OSEL
LLC
CEXT
4.7µF
C1
+
C3 C4 C5
47nF
8
GND
2x 0.1µF
LNBP20CR
Vcc
I/Os
I/Os
MCU
11/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
USING SERIAL BUS TO SAVE MPU I/Os
17V
24V
MCU+V
ANT
CONNECTORS
C2
R1
11
13
1
2
AUX DATA
EXTM
VCC1
VCC2
47K
JA
JB
10uF
3
15
14
LNBA
LNBB
MI
OLF
TUNER
1
2
3
15
4
5
6
4
9
5
7
12
10
VSEL
STR
D
CLK
OE
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
CEXT
ENT
EN
OSEL
LLC
4.7µF
C1
C3 C4 C5 C6
+
7
14
13
12
11
8
GND
2x 0.1µF 2x 47nF
LNBP20CR
9
10
QS
QS
4094
SERIAL
BUS
MCU+V
I/Os
Vcc
MCU
TWO ANTENNA PORTS RECEIVER: LOW COST SOLUTION
17V
24V
ANT CONNECTORS
JA
1
2
VCC1
VCC2
3
LNBA
LNBB
10
JB
8
6
4
7
5
9
TUNER
CEXT
GND
VSEL
ENT
EN
4.7µF C1
C3
C4
C5
C6
+
OSEL
2x 0.1µF
2x 47nF
LNBP10SP
MCU+V
Vcc
I/Os
I/Os
MCU
12/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
CONNECTING TOGETHER VCC1 AND VCC2
24V
ANT CONNECTORS
JA
1
VCC1
2
VCC2
3
LNBA
LNBB
10
JB
8
6
4
7
5
9
TUNER
CEXT
GND
VSEL
ENT
EN
C1
+
C4
C5
C6
4.7µF
OSEL
0.1µF
2x 47nF
LNBP10SP
MCU+V
Vcc
I/Os
I/Os
MCU
SINGLE ANTENNA RECEIVER WITH MASTER RECEIVER PORT: LOW COST SOLUTION
17V
24V
C2
9
1
2
AUX DATA
EXTM
VCC1
VCC2
ANT
10µF
3
LNBA
10
8
MASTER
MI
TUNER
4
7
5
VSEL
ENT
EN
CEXT
C3
C4
C5
4.7µF C1
+
6
47nF
GND
2x 0.1µF
LNBP13SP
MCU+V
Vcc
I/Os
I/Os
MCU
13/18
LNBP10 SERIES - LNBP20
TYPICAL APPLICATION SCHEMATICS (continued)
SINGLE ANTENNA RECEIVER WITH OVERLOAD DIAGNOSTIC
17V
24V
MCU+V
C2
9
1
2
AUX DATA
EXTM
OLF
VCC1
VCC2
10µF
R1
3
LNBA
ANT
10
47K
8
4
7
5
TUNER
CEXT
VSEL
ENT
EN
4.7µF C1
C3
C4 C5
+
47nF
6
GND
2x 0.1µF
LNBP15SP
Vcc
I/Os
I/Os
MCU
14/18
LNBP10 SERIES - LNBP20
MULTIWATT-15 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
5
2.65
1.6
MIN.
MAX.
0.197
0.104
0.063
A
B
C
D
1
0.039
E
0.49
0.66
1.02
17.53
19.6
0.55
0.75
1.52
0.019
0.026
0.040
0.690
0.772
0.022
0.030
0.060
0.710
F
G
1.27
0.050
0.700
G1
H1
H2
L
17.78
18.03
20.2
22.5
22.5
18.1
17.75
10.9
2.9
4.85
5.53
2.6
0.795
0.886
0.886
0.713
0.699
0.429
0.114
0.191
0.218
0.102
0.102
0.152
21.9
21.7
17.65
17.25
10.3
2.65
4.25
4.63
1.9
22.2
22.1
0.862
0.854
0.695
0.679
0.406
0.104
0.167
0.182
0.075
0.075
0.144
0.874
0.870
L1
L2
L3
L4
L7
M
17.5
10.7
0.689
0.421
4.55
5.08
0.179
0.200
M1
S
S1
Dia1
1.9
2.6
3.65
3.85
0016036
15/18
LNBP10 SERIES - LNBP20
PowerSO-20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
3.60
0.30
3.30
0.10
0.53
0.32
16.00
14.50
MIN.
MAX.
0.1417
0.0118
0.1299
0.0039
0.0209
0.0126
0.6299
0.570
A
a1
a2
a3
b
0.10
0.0039
0
0
0.40
0.23
15.80
13.90
0.0157
0.009
0.6220
0.5472
c
D (1)
E
e
1.27
0.050
0.450
e3
E1 (1)
E2
G
11.43
10.90
0
11.10
2.90
0.10
1.10
1.10
0.4291
0
0.437
0.1141
0.0039
0.0433
0.0433
h
L
0.80
0.0314
N
10o (max.)
8o (max.)
S
T
10.0
0.3937
(1) ”D and E1” do not include mold flash or protusions
- Mold flash or protusions shall not exceed 0.15mm (0.006”)
R
N
N
a2
A
c
a1
b
e
DETAILB
DETAILA
E
e3
D
DETAILA
lead
20
11
slug
a3
DETAILB
0.35
E2
E1
Gage Plane
T
- C -
SEATING PLANE
S
L
G
C
(COPLANARITY)
1
10
PSO20MEC
h x 45°
0056635
16/18
LNBP10 SERIES - LNBP20
PowerSO-10 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
3.35
0.00
0.40
0.35
9.40
7.40
9.30
7.20
7.20
6.10
5.90
TYP.
MAX.
3.65
0.10
0.60
0.55
9.60
7.60
9.50
7.40
7.60
6.35
6.10
MIN.
0.132
0.000
0.016
0.013
0.370
0.291
0.366
0.283
0.283
0.240
0.232
MAX.
0.144
0.004
0.024
0.022
0.378
0.300
0.374
0.291
0.300
0.250
0.240
A
A1
B
c
D
D1
E
E1
E2
E3
E4
e
1.27
0.050
F
1.25
1.35
0.049
0.543
0.053
0.567
H
13.80
14.40
h
0.50
1.70
0.002
0.067
L
1.20
0o
1.80
8o
0.047
0.071
q
α
B
0.10
A
B
10
6
H
E
E3 E1
E2
E4
1
5
SEATING
PLANE
DETAIL”A”
e
B
A
C
M
0.25
Q
D
=
=
=
=
h
D1
SEATING
PLANE
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