LD3985M33R [STMICROELECTRONICS]
ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REGULATORS LOW ESR CAPACITORS COMPATIBLE; 超低压降低噪声BICMOS稳压器低ESR电容兼容型号: | LD3985M33R |
厂家: | ST |
描述: | ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE REGULATORS LOW ESR CAPACITORS COMPATIBLE |
文件: | 总14页 (文件大小:396K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LD3985
SERIES
ULTRA LOW DROP-LOW NOISE BICMOS VOLTAGE
REGULATORS LOW ESR CAPACITORS COMPATIBLE
■
■
INPUT VOLTAGE FROM 2.5V TO 6V
STABLE WITH LOW ESR CERAMIC
CAPACITORS
■
■
ULTRA LOW DROPOUT VOLTAGE (100mV
TYP. AT 150mA LOAD, 0.4mV TYP. AT 1mA
LOAD)
VERY LOW QUIESCENT CURRENT (85µA
TYP. AT NO LOAD, 170µA TYP. AT 150mA
LOAD; MAX 1.5µA IN OFF MODE)
GUARANTEED OUTPUT CURRENT UP TO
150mA
WIDE RANGE OF OUTPUT VOLTAGE: 1.2V;
1.22V; 1.25V; 1.35V; 1.5V; 1.8V; 2V; 2.1V;
2.2V; 2.4V; 2.5V; 2.6V; 2.7V; 2.8V; 2.85V;
2.9V; 3V; 3.1V; 3.2V; 3.3V; 4.7V; 5V
Flip-Chip
(1.57x1.22)
SOT23-5L
TSOT23-5L
■
■
The ultra low drop-voltage, low quiescent current
and low noise make it suitable for low power
applications and in battery powered systems.
Regulator ground current increases only slightly in
dropout, further prolonging the battery life. Power
supply rejection is better than 60 dB at low
frequencies and starts to roll off at 10KHz. High
power supply rejection is maintained down to low
input voltage levels common to battery operated
circuits. Shutdown Logic Control function is
available, this means that when the device is used
as local regulator, it is possible to put a part of the
board in standby, decreasing the total power
consumption. The LD3985 is designed to work
with low ESR ceramic capacitors. Typical
applications are in mobile phone and similar
battery powered wireless systems.
■
■
FAST TURN-ON TIME: TYP. 200µs [C =1µF,
O
C
= 10nF AND I =1mA]
O
BYP
LOGIC-CONTROLLED ELECTRONIC
SHUTDOWN
INTERNAL CURRENT AND THERMAL LIMIT
OUTPUT LOW NOISE VOLTAGE 30µVRMS
OVER 10Hz to 100KHz
S.V.R. OF 60dB AT 1KHz, 50dB AT 10KHz
TEMPERATURE RANGE: -40°C TO 125°C
■
■
■
■
DESCRIPTION
The LD3985 provides up to 150mA, from 2.5V to
6V input voltage.
Figure 1: Schematic Diagram
Rev. 8
1/14
October 2004
LD3985 SERIES
Table 1: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
DC Input Voltage
-0.3 to 6 (*)
V
V
V
I
V
DC Output Voltage
-0.3 to V +0.3
O
I
V
INHIBIT Input Voltage
Output Current
-0.3 to V +0.3
INH
I
I
Internally limited
Internally limited
-65 to 150
O
P
Power Dissipation
D
T
Storage Temperature Range
Operating Junction Temperature Range
°C
°C
STG
T
-40 to 125
OP
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) The input pin is able to withstand non repetitive spike of 6.5V for 200ms.
Table 2: Thermal Data
SOT23-5L/
TSOT23-5L
Symbol
Parameter
Flip-Chip
Unit
R
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
81
°C/W
°C/W
thj-case
R
255
170
thj-amb
Table 3: Order Codes
SOT23-5L
TSOT23-5L
Flip-Chip
OUTPUT VOLTAGES
LD3985M12R (*)
LD3985M122R
LD3985M125R (*)
LD3985M135R (*)
LD3985M15R
LD3985G12R (*)
LD3985G122R (*)
LD3985G125R (*)
LD3985G135R (*)
LD3985G15R (*)
LD3985G18R
LD3985J12R (*)
LD3985J122R
LD3985J125R
LD3985J135R
LD3985J15R (*)
LD3985J18R
1.20 V
1.22 V
1.25 V
1.35 V
1.5 V
1.8 V
2.0 V
2.1 V
2.2 V
2.4 V
2.5 V
2.6 V
2.7 V
2.8 V
2.85 V
2.9 V
3.0 V
3.1 V
3.2 V
3.3 V
4.4 V
4.7 V
4.8 V
4.9 V
5.0 V
LD3985M18R
LD3985M20R (*)
LD3985M21R (*)
LD3985M22R (*)
LD3985M24R (*)
LD3985M25R
LD3985G20R (*)
LD3985G21R (*)
LD3985G22R (*)
LD3985G24R (*)
LD3985G25R
LD3985J20R (*)
LD3985J21R (*)
LD3985J22R (*)
LD3985J24R
LD3985J25R
LD3985M26R (*)
LD3985M27R
LD3985G26R (*)
LD3985G27R
LD3985J26R
LD3985J27R
LD3985M28R (*)
LD3985M285R (*)
LD3985M29R
LD3985G28R (*)
LD3985G285R (*)
LD3985G29R
LD3985J28R
LD3985J285R (*)
LD3985J29R
LD3985M30R (*)
LD3985M31R (*)
LD3985M32R (*)
LD3985M33R
LD3985G30R (*)
LD3985G31R (*)
LD3985G32R (*)
LD3985G33R (*)
LD3985G44R (*)
LD3985G47R (*)
LD3985G48R (*)
LD3985G49R (*)
LD3985G50R (*)
LD3985J30R
LD3985J31R
LD3985J32R (*)
LD3985J33R
LD3985M44R (*)
LD3985M47R
LD3985J44R (*)
LD3985J47R
LD3985M48R (*)
LD3985M49R (*)
LD3985M50R (*)
LD3985J48R
LD3985J49R (*)
LD3985J50R (*)
(*) Available on request.
2/14
LD3985 SERIES
Figure 2: Connection Diagram (top view for SOT and TSOT, top through view for Flip-Chip)
TSOT23-5L/SOT23-5L
Flip-Chip
Table 4: Pin Description
Pin N°
SOT23-5L/
TSOT23-5L
Pin N°
Flip-Chip
Symbol
Name and Function
1
4
V
Input Voltage of the LDO
Common Ground
I
2
3
2
1
GND
V
Inhibit Input Voltage: ON MODE when V
≥ 1.2V, OFF MODE when V
≤
INH
INH
INH
0.4V (Do not leave floating, not internally pulled down/up)
4
5
5
3
BYPASS
Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise
voltage
V
Output Voltage of the LDO
O
Figure 3: Typical Application Circuit
3/14
LD3985 SERIES
Table 5: Electrical Characteristics For LD3985 (T = 25°C, V = V
+0.5V, C = 1µF,
I
j
I
O(NOM)
C
= 10nF, I = 1mA, V = 1.4V, unless otherwise specified)
INH
BYP
O
Symbol
Parameter
Test Conditions
Min.
2.5
-50
-75
-2
Typ.
Max.
6
Unit
V
V
Operating Input Voltage
Output Voltage < 2.5V
I
V
I
= 1 mA
O
50
75
2
mV
O
T = -40 to 125°C
J
V
Output Voltage ≥ 2.5V
I
= 1 mA
% of
O
O
V
O(NOM)
T = -40 to 125°C
-3
3
J
∆V
Line Regulation (Note 1)
V = V
+ 0.5 to 6 VT = -40 to 125°C
-0.1
-0.19
0.1
0.19
%/V
O
I
O(NOM)
J
V
= 4.7 to 5V
O
∆V
∆V
Load Regulation
Load Regulation
I
= 1 mA to 150mA
V
V
< 2.5V
0.002 0.008
0.0004 0.002
0.0025 0.005
1.5
%/mA
%/mA
O
O
O
O
O
T = -40 to 125°C
J
I
= 1 mA to 150mA
≥ 2.5V
O
T = -40 to 125°C (for Flip-Chip)
J
I
= 1 mA to 150mA, T = -40 to 125°C
J
O
(for SOT23-5L/TSOT23-5L), V ≥ 2.5V
O
∆V
Output AC Line Regulation V = V
+ 1 V, I = 150mA,
mV
PP
O
I
O(NOM)
O
t = t = 30µs
R
O
O
O
O
F
I
Quiescent Current
ON MODE: V = 1.2V
I
I
I
I
= 0
85
µA
Q
INH
= 0
T = -40 to 125°C
150
170
250
J
= 0 to 150mA
= 0 to 150mA
T = -40 to 125°C
J
OFF MODE: V
= 0.4V
0.003
1.5
INH
T = -40 to 125°C
J
V
Dropout Voltage (NOTE 1)
I
I
I
I
I
I
I
I
= 1mA
0.4
mV
DROP
O
O
O
O
O
O
O
O
= 1mA
T = -40 to 125°C
2
J
= 50mA
= 50mA
= 100mA
= 100mA
= 150mA
= 150mA
20
35
45
70
60
100
T = -40 to 125°C
J
T = -40 to 125°C
J
T = -40 to 125°C
J
I
Short Circuit Current
R = 0
600
60
mA
dB
SC
L
SVR Supply Voltage Rejection V = V
+0.25V ±
f = 1KHz
I
O(NOM)
V
= 0.1V, I = 50mA
O
f = 10KHz
50
RIPPLE
V
< 2.5V,
V = 2.55V
I
O(NOM)
I
Peak Output Current
V
≥ V - 5%
O(NOM)
300
1.2
550
0.4
mA
V
O(PK)
O
V
Inhibit Input Logic Low
Inhibit Input Logic High
Inhibit Input Current
V = 2.5V to 6V
125°C
T = -40 to
J
INH
I
I
V
B
= 0.4V
V = 6V
±1
30
nA
INH
INH
I
eN
Output Noise Voltage
Turn On Time (Note 4)
Thermal Shutdown
= 10 Hz to 100 KHz
C
= 1 µF
µV
RMS
W
O
t
C
= 10 nF
BYP
100
160
250
µs
ON
T
Note 5
°C
SHDN
4/14
LD3985 SERIES
Symbol
Parameter
Test Conditions
Capacitance (Note 6)
ESR
Min.
Typ.
Max.
Unit
C
Output Capacitor
1
5
22
µF
O
5000
mΩ
Note 1 – For V
Note 2 – For V
< 2V, V = 2.5V
I
O(NOM)
O(NOM)
= 1.25V, V = 2.5V
I
Note 3 – Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value. This speci-
fication does not apply for input voltages below 2.5V.
Note 4 – Turn-on time is time measured between the enable input just exceeding V
of its nominal value
High Value and the output voltage just reaching 95%
INH
Note 5 – Typical thermal protection hysteresis is 20°C
Note 6 - The minimum capacitor value is 1µF, anyway the LD3985 is still stable if the compensation capacitor has a 30% tolerance in all
temperature range.
TYPICAL PERFORMANCE CHARACTERISTICS (T = 25°C, V = V
+0.5V, C = C = 1µF,
I O
j
I
O(NOM)
C
= 10nF, I = 1mA, V
= 1.4V, unless otherwise specified)
BYP
O
INH
Figure 4: Output Voltage vs Temperature
Figure 6: Output Voltage vs Temperature
Figure 5: Output Voltage vs Temperature
Figure 7: Shutdown Voltage vs Temperature
5/14
LD3985 SERIES
Figure 8: Shutdown Voltage vs Temperature
Figure 11: Line Regulation vs Temperature
Figure 12: Load Regulation vs Temperature
Figure 13: Load Regulation vs Temperature
Figure 9: Line Regulation vs Temperature
Figure 10: Line Regulation vs Temperature
6/14
LD3985 SERIES
Figure 14: Load Regulation vs Temperature
Figure 15: Quiescent Current vs Temperature
Figure 16: Quiescent Current vs Temperature
Figure 17: Quiescent Current vs Temperature
Figure 18: Supply Voltage Rejection vs
Frequency
Figure 19: Load Transient Response
V = 3.2V, I = 1 to 150mA, Rise-Fall time = 1µsec
I
O
7/14
LD3985 SERIES
Figure 20: Line Transient Response
Figure 22: TURN-OFF
V = 3.8V to 4.4V, T = 25°C, I = 150mA, C = C = 1µF (X7R),
V = 3.3V, I = 1mA, C = C = 1µF (cer), C
= 10nF, T = 20ns,
I
J
O
I
O
I
O
I
O
BYP f
C
= 10nF, Rise-Fall time = 1µsec, V = 2.7V
V
= 2.8V
BYP
O
O
Figure 21: START-UP
V = 3.3V, I = 1mA, C = C = 1µF (cer), C
= 10nF, T = 20ns,
r
I
O
I
O
BYP
V
= 2.8V
O
8/14
LD3985 SERIES
SOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
0.90
0.00
0.90
0.35
0.09
2.80
1.50
TYP
MAX.
1.45
0.10
1.30
0.50
0.20
3.00
1.75
MIN.
35.4
0.0
TYP.
MAX.
57.1
3.9
A
A1
A2
b
35.4
13.7
3.5
51.2
19.7
7.8
C
D
E
110.2
59.0
118.1
68.8
e
0.95
37.4
H
L
2.60
0.10
3.00
0.60
102.3
3.9
118.1
23.6
.
7049676C
9/14
LD3985 SERIES
TSOT23-5L MECHANICAL DATA
mm.
mils
DIM.
MIN.
TYP
MAX.
1.1
MIN.
TYP.
MAX.
43.3
3.9
A
A1
A2
b
0
0.1
0.7
0.3
0.08
1.0
27.6
11.8
3.1
39.4
19.7
7.9
0.5
C
0.2
D
2.9
2.8
114.2
110.2
63.0
E
E1
e
1.6
0.95
1.9
37.4
e1
L
74.8
0.3
0.6
11.8
23.6
7282780B
10/14
LD3985 SERIES
Flip-Chip5 MECHANICAL DATA
mm.
mils
TYP.
DIM.
MIN.
0.835
0.21
TYP
0.9
MAX.
0.965
0.29
MIN.
MAX.
37.992
11.417
26.575
14.370
61.811
48.031
21.654
36.063
A
A1
A2
b
32.874
8.268
35.433
0.25
0.65
0.315
1.540
1.19
0.5
9.843
25.591
12.402
60.630
46.850
19.685
34.094
13.583
13.268
0.625
0.265
1.510
1.16
0.675
0.365
1.570
1.22
24.606
10.433
59.449
45.669
17.717
32.126
D
E
e
0.45
0.55
e1
f
0.816
0.866
0.345
0.337
0.916
f1
11/14
LD3985 SERIES
Tape & Reel SOT23-xL MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
180
MIN.
MAX.
7.086
0.519
A
C
12.8
20.2
60
13.0
13.2
0.504
0.795
2.362
0.512
D
N
T
14.4
3.33
3.27
1.47
4.1
0.567
0.131
0.128
0.0.58
0.161
0.161
Ao
Bo
Ko
Po
P
3.13
3.07
1.27
3.9
3.23
3.17
1.37
4.0
0.123
0.120
0.050
0.153
0.153
0.127
0.124
0.054
0.157
0.157
3.9
4.0
4.1
12/14
LD3985 SERIES
Table 6: Revision History
Date
Revision
Description of Changes
Part Number Status Changed on Table 3.
values are Changed on Table 5.
07-May-2004
05-Oct-2004
27-Oct-2004
6
7
8
t
ON
Order Codes changed - Table 3.
13/14
LD3985 SERIES
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
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14/14
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