ESDA18-1K [STMICROELECTRONICS]
EOS and ESD Transil protection for charger and battery port; 充电器和电池端口EOS和ESD保护的Transil
| 型号： | ESDA18-1K |
| 厂家： | 
ST |
| 描述： | EOS and ESD Transil protection for charger and battery port |
| 文件： | 总10页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ESDA-1K
EOS and ESD Transil™ protection for charger and battery port
Features
■ Breakdown voltage: 12 V, 18 V
■ Unidirectional device
■ High peak power dissipation: 450 W (8/20 µs
waveform)
SOD-523
■ ESD protection level better than
IEC 61000-4-2 level 4: 30 kV contact
discharge.
Figure 1.
Functional diagram
Pin 1
■ Low leakage current < 0.5 µA at 5 V
2
■ PCB area: 1.3 mm
Benefits
■ High EOS and ESD protection level
■ High integration
■ Suitable for high density board
■ Small package
Complies with the following standards
Pin 2
■ IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
Description
The ESDA-1K is a single line Transil diode
designed specifically for the protection of
integrated circuits in portable equipment and
miniaturized electronics devices subject to ESD
and EOS transient overvoltages.
■ MIL STD 883G - Method 3015-7 Class 3B
– HBM (Human Body Model): ≥ 8 kV
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
■ Computers
■ Printers
■ Communication systems
■ Cellular phone handsets and accessories
■ Video equipment
TM: Transil is a trademark of STMicroelectronics.
September 2010
Doc ID 17883 Rev 1
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www.st.com
10
Characteristics
ESDA-1K
1
Characteristics
Table 1.
Symbol
Absolute maximum ratings (T
= 25 °C)
amb
Parameter
Value
Unit
IEC 61000-4-2 air discharge
30
30
VPP
Peak pulse voltage
kV
IEC 61000-4-2 contact discharge
Tj
Tstg
TL
Operating Junction temperature rage
Storage temperature range
-40 to +150
-65 to +150
260
°C
°C
°C
Maximum lead temperature for soldering during 10 s
0
Table 2.
Absolute maximum ratings (t
= 25 °C) - product specific parameters
amb
Order code
IPP (A) peak pulse current (8/20 µs) PPP (W) peak pulse power (8/20 µs)
ESDA12-1K
ESDA18-1K
16
12
450
400
Figure 2.
Electrical characteristics (definitions)
Symbol
Parameter
Table 3.
Electrical characteristics (values, T
= 25 °C)
amb
(1)
VBR @ IR
Typ.
IRM @ VRM
VCL@ IPP (8/20 µs)
Cline
Order code
Min.
V
Max.
µA
Max.
Max.
V
Max.
pF
V
mA
V
V
A
A
ESDA12-1K
12
18
13
19
1
1
0.5
0.5
10
15
16.5
24
1
1
28
34
16
12
150
105
ESDA18-1K
1. VR = 0 V, Fosc = 1 MHz, Vosc = 30 mV
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Figure 3.
Characteristics
Peak pulse power dissipation
versus exponential pulse duration
(typical values)
Figure 4.
Peak pulse power dissipation
versus initial junction temperature
(typical values)
PPP(W)
PPP(W)
1000
1000
900
800
700
600
500
400
300
200
100
0
8/20 µs
Tj=25 °C
ESDA12-1K
ESDA18-1K
100
10
ESDA12-1K
ESDA18-1K
tP(µs)
Tj (°C)
150 175
1
10
100
1000
25
50
75
100
125
Figure 5.
Clamping voltage versus peak
pulse current (typical values)
Figure 6.
Leakage current versus junction
temperature (typical values)
IR (nA)
100.00
IPP (A)
100.0
8/20 µs
Tjinitial = 25 °C
VR = VRM = 10 V for ESDA12-1K
VR = VRM =1 5V for ESDA18-1K
10.0
1.0
ESDA12-1K
ESDA12-1K
1.00
ESDA18-1K
ESDA18-1K
Tj (°C)
75 85
VCL (V)
0.01
25
0.1
35
45
55
65
0
10
20
30
Figure 7.
5 V / div
ESD response to IEC 61000-4-2
(+15 kV air discharge) ESDA12-1K
Figure 8.
ESD response to IEC 61000-4-2
(-15 kV air discharge) ESDA12-1K
5 V / div
C2
C2
100 ns / div
100 ns / div
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Ordering information scheme
ESDA-1K
2
Ordering information scheme
Figure 9.
Ordering information scheme
ESDA
XX
-
1K
ESD array
Breakdown voltage
XX = 12: 12 V min.
XX = 18: 18 V min.
Package
1 = 1 line
K = SOD-523
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Package information
3
Package information
●
●
Epoxy meets UL94,V0
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
Table 4.
SOD-523 dimensions
Dimensions
Millimeters
Ref.
Inches
0.15
E1
M
C A B
E
B
Min. Typ. Max. Min. Typ. Max.
2xb
D
A
E
0.50 0.60 0.70 0.020 0.024 0.028
1.50 1.60 1.70 0.059 0.063 0.067
0.20
M
C A B
A
8°
R0.1
E1 1.10 1.20 1.30 0.043 0.047 0.051
A
D
b
c
0.70 0.80 0.90 0.028 0.031 0.035
c
SEATING PLANE
7°
L
C
0.25
0.07
0.35 0.010
0.20 0.003
0.014
0.008
L
0.15 0.20 0.25 0.006 0.008 0.010
0.20 0.002 0.008
L1
L1 0.05
Figure 10. Footprint (dimensions in mm)
0.7
Figure 11. Marking
0.3
1X
Pin 2
Pin 1
2
Note:
Product marking may be rotated by multiples of 90° for assembly plant differentiation. In no
case should this product marking be used to orient the component for its placement on a
PCB. Only pin 1 mark is to be used for this purpose.
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Package information
ESDA-1K
Figure 12. Tape and reel specification
Ø 1.50
2.0
4.10
0.22
4.0
0.50
0.90
0.73
All dimensions are typical values in mm
User direction of unreeling
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Recommendation on PCB assembly
4
Recommendation on PCB assembly
4.1
4.2
Solder paste
1. Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste recommended.
3. Offers a high tack force to resist component displacement during PCB movement.
4. Use solder paste with fine particles: powder particle size 20-45 µm.
Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3. Standard tolerance of 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
4.3
PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
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Recommendation on PCB assembly
ESDA-1K
4.4
Reflow profile
Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Temperature (°C)
260°C max
255°C
220°C
180°C
2°C/s recommended
125 °C
6°C/s max
3°C/s max
0
0
1
2
3
4
5
6
7
Time (min)
10-30 sec
90 to 150 sec
90 sec max
Note:
Minimize air convection currents in the reflow oven to avoid component movement.
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Ordering information
5
Ordering information
Table 5.
Order code
ESDA12-1K
ESDA18-1K
Ordering information
Marking
Package
Weight
Base qty
3000
Delivery mode
12
18
SOD-523
1.46
Tape and reel
Note:
The marking can be rotated by multiples of 90° to differentiate assembly location.
6
Revision history
Table 6.
Date
02-Sep-2010
Document revision history
Revision
Changes
1
First issue.
Doc ID 17883 Rev 1
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ESDA-1K
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