AN1013_技术文档

AN1013

APPLICATION NOTE

MONO CLASS_D AMPLIFIERS

by M. Masini, L. Pagotto

INTRODUCTION

The TDA7480/81/82 are single ended , split supply, class_D amplifiers. The output of the amplifier is a

high frequency square wave (around 100Khz), rail to rail, with variable duty cycle.

The audio information is the average value of the output square wave.

To obtain the audio signal, the output must be low pass filtered.

The main issue of this amplifier is the very low dissipated power (the very high efficiency) compared to a

normal class AB amplifier.

The preamplifier provides the voltage gain of the overall amplifier. The second stage is the power stage,

with a gain 1.5, that is the high efficiency class_D amplifier.

The class_D amplifier stage is done with a multivibrator : with no signal it generates a 50% duty cycle

square wave, with signal applied, it changes the duty cycle.

The switching frequency is set by the voltage on pin 9 (DIP20) or pin 6 (MW15).

The output power stage is done with N-ch DMOS power with the upper one supplied by a bootstrap ca-

pacitor (C11 in the application circuit).

1. CRITICAL COMPONENTS IN THE APPLICATION

A: Bypass high frequency filtering capacitor on supply

The most important filter capacitor is C5 (see application circuit) between pin 13/14 for MW15 package

or pin 16/17 for DIP20 package.

The value of the parasitic inductance between this capacitance and the IC pins is related to the ampli-

tude of the spikes on the power supply pins at every commutations of the output.

In fact, for any commutation, there is an abrupt variation of the current in the parasitic inductances Lpar

in series to the supply. This abrupt variation increases as the output current increases and can be typi-

cally of some amperes on 10ns. With this slew rate of the current, also an inductance of about some the

of nH (i.e. the lead inductance of the pin) generatesvoltage spikes of some volts.

Figure 1. Block Diagram

February 1998

1/13

AN1013 APPLICATION NOTE

Figure 2

- The effects of these spikes are:

Distortion / offset increase due to non linear coupling on internal elementary devices in signal circuit

- Overvoltage on the IC

- Strongnoise on logic signal inside the chip, with the possibility of incertainlogic levels dangerousfor theIC.

To avoid this spikes generation it is mandatory to put the bypass capacitor at a distance much lower

than 0.5cm from the IC pins. It is important, of course, the quality of the capacitor itself too.

- Other high frequency bypass capacitors that are important for the correct behaviour of the IC are

the following:

C8 (MW15: pin6/8; DIP20: pin 9/1..3,18..20):

Again it is important the low inductance and the nearness to the IC pins.

The voltage on this pin sets the switching frequencyof the IC.

The purpose of this capacitor is to filter the high frequency noise that can enter in the IC by pin 6 in

MW15 or pin9 in DIP20. This high frequencynoise can generate distortion/offset.

The maximum value of the capacitancethat can be used, without switching frequency falls down for high

frequencyinput signal (max 20Khz), can be calculated with this relation:

1

40KHz

[1]

=

2 π R4 C8

This means that C8 can be calculated as:

1

C8 =

[2]

2 π R4 40KHz

For example if R4=12K [ switching frequency~ 120Khz]--> C8(max) = 330pF

Ω

We suggest C8=280pF.

C4 (MW15:pin5; DIP20 pin 8):

This capacitor sets the bandwidth of the class-D amplifier [see section no.6 ].

It is important that the reference ground of this capacitor is as near as possible to the IC signal ground.

C3 (MW15 pin 9; DIP20 pin 11):

This capacitor filters the high frequency noise that can enter in the input and that can cause intermodula-

tion aliasing noise at the output.

In fact no signal at frequency greater than half of the switching frequency can enter in the IC without

generate aliasing noise

2/13

AN1013 APPLICATION NOTE

B: Electrolyticcapacitors

The electrolytic capacitor (C7,C10 in application circuit) parameters to be considered are the following:

a. Value of the capacitance

b. Maximum operating voltage

c. Series inductance/resistanceat the switching frequency

c. The electrolytic capacitors supply the ripple current on the output inductance.Thisripple is at switching

frequency (around 100Khz). If the inductance/resistance, at the switching frequency, of the capacitor is

high ,there is a strong modulation of the supply lines that can disturb every devices connected to the

same supply lines.

a; b. The application of a Class_D amplifier single eneded ,split supply has the problem of modulation of

the supply in low frequency operationor dc short circuit condition.

Normal power supply are able to deliver current but not to sink it.

We can figure it with an ideal supply with a diode in series (fig. 3).

Figure 3

The diode highlights the fact that the power supply cannot sink current.

The schematicof the IC in split supply is the following (fig. 4).

Figure 4

Let us suppose that the IC is sinking an average current Io from the load , as shown in the previous pic-

ture. The output duty cycle is shown in figure 5.

During the time T1 the current Io is freewheeling throught the capacitor Cup and this leads the +Vcc(IC)

to increase. The freewheling current in Cup continues during all the negative sine cycle of the output.

(the same problem is present in Cdown in positive sine cycle). If the signal frequency is high, the time

duration of the freewheel current is small and so no deep modulation of the +Vcc(IC) is present, but in

low frequency the effect occurs.

It is important to highlight that the total supply on the IC is increased by this freewheel effect. It is impor-

tant, of course, to ensure that the total supply remains under the breakdownlimit of the IC (60V).

The maximum supply voltage increase by freewheel is obtained when the output sine wave is around

the half of the possible swing (peak to peak value =Vcc on the avaiable one of 2Vcc). In this condition a

good approximation of the voltage increase can be calculated as

V_cc

R1 16

T_sinewave

2

1

C

DV

[3]

≈

3/13

AN1013 APPLICATION NOTE

Figure 5.

Figure 6.

For example: if signal frequency is 20hz, C = 2200µF, Rl = 8Ohm , Vcc = 20V (+-20V) from [3] the peak

modulation of any supply is DV ~ 1.8V. (measured ~2V)

NOTE1 : From this formula it is clear that the IC is not able to deliver dc current without generating uncontrolled increase of the supply voltage

(Tsinewave=infinite-->Dv=infinite).

This condition happensif the dc current on the load is bigger than the current sinked by the IC. For ex-

ample a short circuit to gnd with the IC not supplied by any signal. In this case the offset of the IC on the

short cicuit generates a dc current and so a supply voltage increase.

To avoid the sure breakdown of the IC there is an internal comparator that senses the total supply and

put the IC in st-by if the total supply is over 55V (TYP)

This means that the electrolityc capacitor to be used must have the maximum operating voltage over the

maximum of [ 55V - (Vcc) ] and Vcc

To summarize the parameter of the electrolitic capacitors:

- Good ESR,ESL at switching frequency (around 100Khz)

- Value consistent with the formula [3]

- Maximum operating voltage of max[(55v-(Vcc); (Vcc)].

NOTE2 : Applicationin dummy split supply (fig. 7)

The circuit must be supplied with +Vcc, GND, -Vcc. The GND is half of the overall supply.

Using a single supply it is possible to obtain, by the use of a resistive/capacitive devider, the half Vcc to

be used as GND. The schematic can be the following:

Figure 7

4/13

AN1013 APPLICATION NOTE

The advantage of this schematic is that it is no longer possible an increase of the overall supply (i.e. in

low frequency operation or in short circuit condition) but only an unbalance between positive and nega-

tive supply (the middle of the devider is no more the half Vcc(tot))

Also in normal operation there can be an unbalancebetween supply.

DC operation

Due to output offset, there is a dc current that flows in the middle point of the divider GND

Iground = Output offset voltage/loadresistance

R_divider

So the offset of the GND respect to the half Vcc(tot) is:

DV =

I_ground

2

For example, with a 50mV offset, Rl = 8Ohm, Rdivider = 1KOhm the offset of GND respect to half Vcc is:

500 50E − 3

D =

= 3.1V

8

It important to note that this GND offset increases as the load decreases (i.e. 4 Ohm)

Low Frequency operation

The impedance of GND is the following:

R_divider

f R_dividerC_divider

1

2

| Z |

=

2

√

1 + (2

π

)

For example, with Rdevider = 1KOhm and Cdevider = 2200uF, the GND impedenceat 20 hz is around

1.8Ohm. Because the GND sinks all the current load, this means that ,with 8 Ohm load, on the GND at

20hz there is a modulation of about 1/4 of the output signal.

2. OUTPUT FILTER

To demodulate the pwm signal and obtain the audio signal, it is enought apply a low pass filter at the

output of the amplifier. Of course this filter must not dissipate power. Typical solution is one or more LC

cells in series.

For example, we can consider the case of one only cell at the output (fig 7)

The design of the LC filter must take into account the following parameters:

- Voltage ripple on the load

- Q factor of the LCR filter

- Inductancecore : linearity and saturation

- Current ripple in the inductance

Voltage ripple and Q factor

The cut off frequncy of the LC filter is:

1

F_t

[4]

=

2

π

L C

√

For example, with the value suggested in the application circuit, L = 60uH, C = 470nF, the cut-off fre-

quency is Ft = 30Khz.

After this frequency the slope of the Bode diagram is -40 dB/decade.

It is better to fix the cut-off frequency outside the audio bandwidth to avoid the peaking or overdamping

of the LCR filter (the speakers impedance is not purely resistive) inside the audible frequency.

The maximum flat filter is load dependant.

1

To obtain it , it is important fill the following relation:

= √ 2

[5]

2

π F_tR1 C

From [5] it is clear that, fixing the cut-off frequency Ft, for a given load, there is just one value of capaci-

tance C to be used to obtain the maximum flat filter. Then from the [4] we find L.

So, for any load impedance Rl, there is just one maximum flat filter for any cut-off frequency chosen.

From [4] and [5] we can obtain the value of L and C as :

5/13

AN1013 APPLICATION NOTE

Figure 8

Figure 9

1

C

[6]

L

[7]

=

4 π²F_t²

C

2

F

t

R1

2

√

π

For example, for Rl=8Ohm and Ft=30Khz, we can obtain,using the [6] [7] , the following values of L and C:

[6] --> C = 469nF; [7] --> L = 60µH

If the switching frequency is set at 120Khz the voltage ripple at the switching frequency on the 8 Ohm

load, at ±20V, with L=60µH, C=470nF, is Vripple ~ 2V (the amplitude of the ripple is proportional to the

Vcc). The ripple is not audible (~100Khz) and usually is not a problem. If it is, the solution is to add one

or moreLC filter cells at the output of the IC.

Inductance core

The core permeability has: hysteresis, not linearity, saturation. The hysteresis produces losses in the

core. These losses affect the overall system efficiency but not, at first order, the dissipated power of the

IC. A high losses core generally produces an increase of the bias current. The non linearity of the per-

meability with the increase of the magnetic field deteriorates the THD, usually the 3^ order harmonic, but

not the sound quality because it is a low order harmonic.

Saturation of core can be dangerous because, for high current, it can transform the inductance in a

short-circuit with all the risks related to this situation.

Current ripple

As first approssimation the peak value of the current in the inductance is (in no signal condition):

V_CC

L

T

2

1

2

I_ripple

=

[8]

The decrease of the inductance value generates an increase of the ripple current in the inductance. For

examplewith a switching frequencyof 100Khzand +/-20V supply, the peakcurrent ripple are the following:

= 60µH; Iripple = 0.83A

= 30µH; Iripple = 1.66A

(i.e. L=60µH is the inductance of the maximum flat filter for 8Ω load with a cut off frequency of 30Khz

(C=470nF); L=30 H is the inductance of max flat filter for 4 load with cut off frequency of 30Khz

µ

Ω

(C=940nF). It is important to note that the ripple current must stay under the threshold of the short circuit

protection (see data-sheet). The increase of the inductanceover the maximum flat filter value, generates

an overdumpedfilter frequency responce (see fig. 8) and an anticipated dead zone step (see section 5)

.

3. SNUBBER

The snubber must be chosen to dump the overshoots produced at each commutation. To reach this

goal, it is important that the snubber impedence seen by the circuit at frequency of the overshoot is re-

sistive. The smaller is the resistance, the higher is the dumping produced by the snubber and so the

smaller are the overshoots(but the losses on the snubber increases).

6/13

AN1013 APPLICATION NOTE

Figure 10

If Tosc is the period of the overshoot, the snubber must fit this relation (impedance at overshoot fre-

quency: resistive):

1

R₁₁

1

T_osc

[9]

<

2

π

C₁₂

The power dissipated by the resistance of the snubber, on average, can be approximated as:

2

V_CC

R

DT

T

P_snub

=

[10]

where DT is the commutation time of the output.

For example, let us assume Vcc = 20V (+-20V),Tosc =300ns, R = 150 , Dt=50ns, T = 8.3 s (Freq.

Ω

µ

switching = 120Khz). In this case the capacitance to be used is (from [9] ) C >318pF (i.e. in the applica-

tion circuit: C = 560pF).

The power dissipated by the resistance of the snubber is (from [10]) Psnub ~ 16mW.

This is a very ’soft’ snubber.

The strongest snubber that can be used to cut overshoot at frequency higher than about 2Mhz with

1/4W resistance , switching frequency 120 Khz and Vcc = 20V (+-20V), is:

R = 10Ω (1/4 W), C > 8nF (i.e. 12nF)

5. THD: SWITCHING FREQUENCY CHOICE

The THD of a class_D amplifier is due mainly to :

- Dead zone to avoid cross-conduction in the power stage

- Parasitic coupling of spikes in the signal circuit

- Non linearity of the modulationprocess

- Aliasing of the PWM spectrum inside the audio bandwidth

- The aliasing of the pwm spectrum inside the audio bandwidth is present for high frequency signal ap-

plied to the IC. For a switching frequency of 120 Khz no sensible aliasing was measured for input sig-

nal up to 20 Khz.

It seems enough to ensure good performance for audio signal. The eventual increase of the switching

frequencyimprove this figure but worsens the efficiency and the dead zone distortion and makes the op-

eration of the power stage more difficult.

We suggest a switching frequency between 110 -150 Khz.

The resistance R4 (pin 9 DIP20, pin 6MW15) set the switching frequency of the internal multivibrator.

The relation is :

Bf

R4

F_sw

=

(Bf =1.4E9 Hz Ohm)

[11]

7/13

AN1013 APPLICATION NOTE

(i.e. : for R4 =12KΩ ---> Fswitching ~ 120Khz

- The non linearity of the modulation process is not a big problem . This generateslow order harmonics

easily lowered by the feedback.

- The parasitic coupling of the spikes is the most difficult problem to be solved.

At every commutation of the power stage it is produced high frequency noise on substrate and supply

lines. This high frequency noise is almost made of a train of very sharp (nanosecons) spikes of some

volts repeated at the switching frequency.

The spikes are coupled to the signal circuits via substrate and supply. Typically this coupling is not linear

and the average result is an increase of offset and THD.

- The power stage must not cross-conduct. To avoid this there must be a dead time between the turn off

and turn on of the power mosfet. This dead time generates a distortion with a harmonics distribution

similar to the cross-over of a normal class AB amplifier.

The overall energy of this distortion can be roughly calculated , in open loop, as:

THD (dead zone, open loop) = Dead time*Fsw

[12]

For example, with a dead zone of 60ns (the typical ICdead zone) and Fsw=120Khz, the dead zone THD,

in open loop, is about 0.7%. This value is lowered by the loop.

Note that this THD increases as the switching frequency increases.

The harmonic distribution of this distortion is extended also to high order harmonics.

The typical shape of the THD vs Pout of a class-D amplifier is the following:

The Dead zone step of the THD vs Pout plot happenswhen the average output current Io is greater than

the ripple current Iripple. From this point of wiew the ripple current has a role similar to the bias current in

a class-AB amplifier: the higher is the ripple current (the bias current in AB stage) the lower is the dead

zone distortion(the lower is the cross-over distortion).

6. FEEDBACK LOOP

A simple 1^ order loop is used to reduce the THD. To calculate the loop gain of the amplifier ,we can as-

sume the Class_D amplifier like a normal operational amplifier if we consider the average of the pwm

output instead of the instantaneusvalue.

The feedbacknetwork to be considered is the following (fig. 12)

Figure 11

Figure 12

8/13

AN1013 APPLICATION NOTE

Figure 13

The loop gain of this configuration is the following (fig. 13)

The feedbackworks properly only if fo (unity-gain frequncy) is lower than the switching frequency fsw.

The optimum behaviour is obtained with fo ~ 0.7fsw. For example, with fsw =120Khz, the capacitance

C4 (pin 8 DIP20, pin 5 MW15) is about 4.7nF.

If the switching frequency is changed, the C4 capacitance can be changed too to fit the following for-

mula:

1

R1

R1 + R2

A_V

2

π

= 0.7 fsw

[12]

R_pC4

From [12] it is possible to calculate the value of C4 vs switching frequency fsw:

R1

R1 R2

1

A_v

2

π

+

C4 =

[13]

R_p0.75 F_sw

where:

R1 = 30KΩ; R2 = 45KΩ;

R1 R2

R =

p

= 18KΩ

R1 R2

+

Av = 100;

fsw : switching frequency

With these values in [13], it is possible to obtain the final formula of C4 vs fsw to be used:

F 141.414hz

C4 = 5.05E −4

[14]

fsw

For example, with fsw =120Khz, with [14] C4 = 4.2nF.

A.1) Output LC filter dimensioning

The low pass filter placed after the switching stage is dimensioned to eliminate the high frequency PWM

waves and to feed the Audio signal to the loudspeaker.

The TDA7480/81 operate at a switching frequency of 120Khz, the LC low pass filter suggested in the ap-

plication circuit is a typical 2 pole Butterworth designed to have a cutoff frequency outside the Audio

band (fc = 30KHz).

This filter topology was chosen because it offers the feature to be maximally flat in the passband.

The filter frequencyresponse will be flat only if it is properly loaded on the specified

loudspeaker impedance for example 8 ohm (fig.14),

9/13

AN1013 APPLICATION NOTE

Figure 14

Figure 15

Attenuation (dB)

10

0

10

0

-10

-20

-30

-40

-50

-60

-10

-20

Rl=8ohm

Rl=4ohm

-30

-40

-50

-60

10

1000 10000 100000

100000

1000 10000

10

100

Frequency (Hz)

Frequency(Hz)

if a 4Ω loudspeaker was used without changing the filter components values, a high frequency loss

would be caused (fig.15), otherwise if a 16Ω loudspeaker was used, an high frequency peaking would

be caused (fig.16).

Figure 16

Figure 17

Attenuation (dB)

10

L1

0

-10

-20

-30

-40

-50

-60

Rl=16ohm

RL

C1

10

100

1000 10000 100000

Frequency (Hz)

Class-D Amplifier TDA7480/81/82

Appendix to the Application Note

As explained, it is quite important to correctly dimension the filter components value to obtain the best

performances from the application.

In the following section suggestions will be given for the right dimensioning. information

2 Pole Butterworth filter: (fig.17)

To avoid Underdamped or overdamped behaviour of the filter (fig.18) the amount of the ratio of induc-

tance to capacitance Q (quality factor) Q= Rload √C/L should be chosen between 0.6 ≤ Q ≤ 0.8, in our

application we used Q = 0.707 as god compromise that takes in account the impedance variation in

real loudspeakers.

The equationsto be used to calculate the filter components values are the following:

1.414 Rload

0.707

2π F Rload

c

L =

[1]

C =

[2]

2π F_c

where:Fc=Cutofffrequency(30KHz;Rload=Loudspeakerimpedance)

Example: Fc = 30KHz,Rload =8ohm

1.414 8

30 10³

0.707

30 10³

8

L

60 H

C

0.47 F

µ

=

µ

=

2

π

2π

10/13

AN1013 APPLICATION NOTE

Figure 18. Effect of inductance and Capacitance on Damping

Output

Underdamped

Overdamped

Frequency

Fig.4

Effect of Inductance and Capacitance on Damping

If a sharper cutoff is preferred, to attenuate better the carrier frequency Butterworth filters of the 3rd or

of the 4rth order could be used.

For example with a 3rd order filter (fig.19) the obtained frequency response is shown in fig.20.

The equations used to domensionthe passive componentsare the following:

0.5 Rload

1.5 Rload

1.33

Rload F_c

L1 =

L2 =

C1 =

2

π

F_c

2π

F_c

2

π

For Rload = 8ohm, Fc = 30Khz resulted L1 = 20µH, L2 = 63µH, C = 0.88µF

3rd order Butterworth filter

Figure 19

Figure 20.

L2

L1

RL

C1

Components choice:

Not only the right choice of the LC network values is important, but it is also the type of the passive com-

ponents in the Class-D amplifier performances evenmore in terms of Losses and Harmonic distortion.

CAPACITOR: The losses in the filter capacitor due essentially to the ESR will be neglegible if Multilayer

film capacitors are used. Multilayer Mylar, Polypropilen or Policarbonate film capacitors are the re-

comended choice, we advise to avoid using ceramic capacitors for such kind of application.

INDUCTOR: The losses in the inductor at low frequencies are mainly due to the coil winding series re-

sistance. At higher frequencies, where the Skin Effect becomes of importance, a multiwire winding could

be effective to obtain the maximum in terms of efficiency. However for most of the applications the use

of a single wire winding with adequatecross section is enough.

The inductor used for the filter must sustain a DC current greater than the specified current limitation

value (see the datasheet of the device of interest for the value to consider) without saturation and the

coil material must show very low hysteresislosses.

11/13

AN1013 APPLICATION NOTE

To verify the linearity of the inductor, it’s suggestedto verify that the inductancechange versus load cur-

rent be less or equal than 10%.

Also the harmonic distortion is affected by the coil material.

The suggestedcoil materials are:

a) Ferrites: Gapped ferrites are suitable for this kind of application because they allow to counter fre-

quency heating and distortion problems.

The shapes of the coil we suggest are E cores, RM and PM. The Ferrite material to use could be one of

the following or otherswith similar characteristics ( see the producers technical sheets for the details):

THOMSON - LCC : B50, B51

SIEMENS

PHILIPS

TDK

: T26, N27

: 3C8

: H7C1, H5B2, H7A

A cheap Ferrite solution consists of Radial Lead Inductors that are easy to find already wound (i.e

TDK, Ferroxcube...). These inductors offer a good compromise in terms of features and cost but its im-

portant to verify the max. rated DC current they can sustain .

b) Molypermalloy (Magnetics): This is the coil we mount in our application board, due to the Toroidal

shape that improves the RFI characteristics of the application.

This material, however, shows a little worse (though neglegible for this application) behaviour in terms of

losses due to hysteresis, has the advantage of the distributed gaps that significantly lower the effective

permeability and increases the energy storage capability reducing also the radiated magnetic field as a

result of the elimination of the discontinuity associated with discrete air gap.

Ferrite powder cores: although also these material could be used for this kind of application it shows

c)

the worse behaviourin terms of heating and losses.

A.2) Selectingsupply filter capacitors:

Referring to the application note section B results that the factors to take in account for the electrolytic fil-

ter capacitors selections concern:

- RMS ripple current rating

- Ripple voltage

- Voltage rating

- ESR

Considering these factors the electrolytic filter capacitors would show electrical characteristics as follows

(for Vcc = +/-20V, Pout >20W):

- Rated voltage 50V

- Rated current > 1A

- Impedance at 20C/f = 100KHz < 100mΩ

12/13

AN1013 APPLICATION NOTE

A list of possible choices drawn from some of the major capacitors producers catalogs is the following:

ROEDERSTEIN:

Impedance (Ω)

20C/100KHz

Type

Capacitance (50V)( F)

Rated Current (mA)

µ

EKC

EKE

1000

0.039

2150

1000

2200

0.060

0.037

1570

2270

SANYO:

CG

1000

2200

0.072

0.045

1200

1400

MV-GX

1000

2200

0.046

0.029

1100

1900

NIPPON CHEMI-CON:

SXE

1000

2200

0.049

0.034

1830

2460

LXF

1000

1500

0.030

0.024

1720

2070

Clearly this list must be taken only as example of the capacitors suitable for this kind of application,

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the

consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No

license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification men-

tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.

SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex-

press written approval of SGS-THOMSON Microelectronics.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

13/13


型号：	AN1013
厂家：	ST
描述：	MONO CLASS_D AMPLIFIERS MONO CLASS_D放大器放大器
文件：	总13页 (文件大小：103K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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