ALTAIR05T-800 [STMICROELECTRONICS]
Off-line all-primary-sensing switching regulator; 离线所有初级感应开关稳压器
| 型号： | ALTAIR05T-800 |
| 厂家： | 
ST |
| 描述： | Off-line all-primary-sensing switching regulator |
| 文件： | 总28页 (文件大小：478K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ALTAIR05T-800
Off-line all-primary-sensing switching regulator
Features
■ Constant voltage and constant current output
regulation (CV/CC) with no optocoupler
■ Tight regulation also in presence of heavy load
transients
■ 800 V avalanche rugged internal power section
■ Quasi-resonant (QR) operation
■ Low standby power consumption
■ Automatic self-supply
SO16N
Applications
■ AC-DC chargers for mobile phones and other
■ Input voltage feedforward for mains-
hand-held equipments
independent cc regulation
■ Compact SMPS that requires a precise current
■ Output cable drop compensation
■ SO16 package
and/or voltage regulation
Description
ALTAIR05T-800 is a high-voltage all-primary
sensing switcher intended for operating directly
from the rectified mains with minimum external
parts. It combines a high-performance low-
voltage PWM controller chip and an 800 V
avalanche-rugged power section in the same
package.
Figure 1.
Block diagram
+Vout
+Vin
Is tart -up
Vcc
Internal supply bus
DRAIN
SUPPLY
& UV LO
PROTECTION &
FEEDFO RWARD
Vref
LOGIC
UVLO
Prot
IFF
BLANKING
TIME
CDC
STARTER
S
Int ern.
supply
bus
Iout
ESTIMATE
Vc
3.3 V
Rcdc
ZCD/F B
TURN-O N
LOGIC
Rzcd
Vc
DEMAG
LOGIC
Q
-
R
LEB
1 V
R
+
S
R
S
R
UVLO
Rfb
Q
Q
Iref
+
-
IFF
S/H
-
+
-
Prot
+
2.5V
RFF
COMP
IREF
GND
SOURCE
Rcomp
Ccomp
Cref
Rsense
October 2010
Doc ID 17957 Rev 1
1/28
www.st.com
28
Contents
ALTAIR05T-800
Contents
1
2
3
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
3.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
Power section and gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
High-voltage start-up generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Zero current detection and triggering block . . . . . . . . . . . . . . . . . . . . . . . 13
Constant voltage operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Constant current operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Voltage feedforward block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Cable drop compensation (CDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Burst-mode operation at no load or very light load . . . . . . . . . . . . . . . . . . 20
Soft-start and starter block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.10 Hiccup mode OCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.11 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6
7
8
9
Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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Doc ID 17957 Rev 1
ALTAIR05T-800
Device description
1
Device description
The device combines two silicon in the same package: a low voltage PWM controller and
an 800 V avalanche rugged power section.
The controller chip is a current-mode specifically designed for offline quasi-resonant flyback
converters.
The device features a unique characteristic: it is capable of providing constant output
voltage (CV) and constant output current (CC) regulation using primary-sensing feedback.
This eliminates the need for the optocoupler, the secondary voltage reference, as well as the
current sensor, still maintaining quite accurate regulation also in presence of heavy load
transients. Additionally, it is possible to compensate the voltage drop on the output cable, so
as to improve CV regulation on the external accessible terminals.
Quasi-resonant operation is guaranted by means of a transformer demagnetization sensing
input that turns on the power section. The same input serves also the output voltage
monitor, to perform CV regulation, and the input voltage monitor, to achieve mains-
independent CC regulation (line voltage feedforward).
The maximum switching frequency is top-limited below 166 kHz, so that at medium-light
load a special function automatically lowers the operating frequency still maintaining the
valley switching operation. At very light load, the device enters a controlled burst-mode
operation that, along with the built-in high-voltage start-up circuit and the low operating
current, helps minimize the standby power.
Although an auxiliary winding is required in the transformer to correctly perform CV/CC
regulation, the chip is able to power itself directly from the rectified mains. This is useful
especially during CC regulation, where the flyback voltage generated by the winding drops
below UVLO threshold. However, if ultra-low no-load input consumption is required to
comply with the most stringent energy-saving recommendations, then the device needs to
be powered via the auxiliary winding.
In addition to these functions that optimize power handling under different operating
conditions, the device offers protection features that considerably increase end-product’s
safety and reliability: auxiliary winding disconnection - or brownout – detection and shorted
secondary rectifier - or transformer’s saturation – detection. All of them are auto restart
mode.
Doc ID 17957 Rev 1
3/28
Pin connection
ALTAIR05T-800
2
Pin connection
Figure 2.
Pin connection (top view)
SOURCE
SOURCE
Vcc
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DRAIN
DRAIN
DRAIN
DRAIN
N.C.
GND
IREF
ZCD/FB
COMP
CDC
N.A.
N.A.
N.A.
Note:
The copper area for heat dissipation has to be designed under the drain pins
Table 1.
N.
Pin functions
Name
Function
Power section source and input to the PWM comparator. The current flowing in the MOSFET
is sensed through a resistor connected between the pin and GND. The resulting voltage is
compared with an internal reference (0.75V max.) to determine MOSFET’s turn-off. The pin
is equipped with 250 ns blanking time after the gate-drive output goes high for improved
noise immunity. If a second comparison level located at 1V is exceeded the IC is stopped and
restarted after Vcc has dropped below 5V.
1, 2
SOURCE
Supply Voltage of the device. An electrolytic capacitor, connected between this pin and
ground, is initially charged by the internal high-voltage start-up generator; when the device is
running the same generator keeps it charged in case the voltage supplied by the auxiliary
winding is not sufficient. This feature is disabled in case a protection is tripped. Sometimes a
small bypass capacitor (0.1 µF typ.) to GND might be useful to get a clean bias voltage for
the signal part of the IC.
3
Vcc
Ground. Current return for both the signal part of the IC and the gate drive. All of the ground
connections of the bias components should be tied to a trace going to this pin and kept
separate from any pulsed current return.
4
5
GND
IREF
CC regulation loop reference voltage. An external capacitor has to be connected between
this pin and GND. An internal circuit develops a voltage on this capacitor that is used as the
reference for the MOSFET’s peak drain current during CC regulation. The voltage is
automatically adjusted to keep the average output current constant.
4/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Pin connection
Table 1.
N.
Pin functions (continued)
Name
Function
Transformer’s demagnetization sensing for quasi-resonant operation. Input/output voltage
monitor. A negative-going edge triggers MOSFET’s turn-on. The current sourced by the pin
during ON-time is monitored to get an image of the input voltage to the converter, in order to
compensate the internal delay of the current sensing circuit and achieve a CC regulation
independent of the mains voltage. If this current does not exceed 50µA, either a floating pin
or an abnormally low input voltage is assumed, the device is stopped and restarted after Vcc
has dropped below 5V. Still, the pin voltage is sampled-and-held right at the end of
transformer’s demagnetization to get an accurate image of the output voltage to be fed to the
inverting input of the internal, transconductance-type, error amplifier, whose non-inverting
input is referenced to 2.5V. Please note that the maximum IZCD/FB sunk/sourced current has
to not exceed 2 mA (AMR) in all the Vin range conditions (85-265 Vac). No capacitor is
allowed between the pin and the auxiliary transformer.
6
ZCD/FB
Output of the internal transconductance error amplifier. The compensation network is placed
7
8
COMP between this pin and GND to achieve stability and good dynamic performance of the voltage
control loop.
Cable drop compensation input. During CV regulation this pin, capable of sinking current,
provides a voltage lower than the internal reference voltage (2.5V) by an amount proportional
to the dc load current. By connecting a resistor between this pin and ZCD/FB, the CV
regulation setpoint is increased proportionally. This allows that the voltage drop across the
CDC
output cable be compensated and, ideally, that zero load regulation at the externally available
terminals be achieved. Leave the pin open if the function is not used.
9-11
12
N.A
N.C
Not available. These pins must be left not connected
Not internally connected. Provision for clearance on the PCB to meet safety requirements.
Drain connection of the internal power section. The internal high-voltage start-up generator
13 to 16 DRAIN sinks current from this pin as well. Pins connected to the internal metal frame to facilitate
heat dissipation.
Doc ID 17957 Rev 1
5/28
Maximum ratings
ALTAIR05T-800
3
Maximum ratings
3.1
Absolute maximum ratings
Table 2.
Symbol
Absolute maximum ratings
Pin
Parameter
Value
Unit
VDS
ID
1,2, 13-16 Drain-to-source (ground) voltage
1,2, 13-16 Drain current
-1 to 800
1
V
A
Eav
Vcc
IZCD/FB
---
1,2, 13-16 Single pulse avalanche energy (Tj = 25°C, ID = 1A)
50
mJ
V
3
6
Supply voltage (Icc < 25mA)
Zero current detector current
Analog inputs and outputs
Maximum sunk current
Self limiting
2
mA
V
7, 8
8
-0.3 to 3.6
200
ICDC
Ptot
Tj
µA
W
°C
°C
Power dissipation @TA = 50°C
Junction temperature range
Storage temperature
0.9
-25 to 150
-55 to 150
Tstg
3.2
Thermal data
Table 3.
Symbol
Thermal data
Parameter
Max. value Unit
Rth j-pin Thermal resistance, junction-to-pin
10
°C/W
110
Rth j-amb Thermal resistance, junction-to-ambient
6/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Electrical characteristics
4
Electrical characteristics
(T = -25 to 125 °C, Vcc = 14 V; unless otherwise specified)
J
Table 4.
Symbol
Electrical characteristics
Parameter
Test condition
Min. Typ. Max. Unit
Power section
V(BR)DSS Drain-source breakdown
IDSS Off state drain current
ID< 100 µA; Tj = 25 °C
800
V
VDS = 750 V; Tj = 125 °C
80
µA
(See Figure 4 and note)
Id=100 mA; Tj = 25 °C
Id=100 mA; Tj = 125 °C
11
22
14
28
RDS(on) Drain-source ON-state resistance
Ω
Coss
High-voltage start-up generator
VStart Min. Drain start voltage
Effective (energy-related) output capacitance (See Figure 3)
Icharge < 100 µA
40
4
50
60
7
V
VDRAIN> VStart; VCC<VCCOn
Icharge Vcc startup charge current
5.5
mA
Tj = 25 °C
(1)
9.5 10.5 11.5
5
VCCrestart Vcc restart voltage (Vcc falling)
V
After protection tripping
Supply voltage
Vcc
Operating range
After turn-on
11.5
12
9
23
14
11
27
V
V
V
V
(1)
VccOn Turn-on threshold
VccOff Turn-off threshold
13
10
25
(1)
VZ
Zener voltage
Icc = 20 mA
23
Supply current
Iccstart-up Start-up current
(See Figure 5)
(See Figure 6)
(See Figure 7)
200 300 µA
Iq
Quiescent current
1
1.4
1.7
mA
mA
Icc
Operating supply current @ 50 kHz
1.4
During hiccup and brownout
(See Figure 8)
Iq(fault) Fault quiescent current
250 350 µA
Start-up timer
TSTART Start timer period
100 125 175
400 500 700
µs
µs
TRESTART Restart timer period during burst mode
Zero current detector
IZCDb
Input bias current
VZCD = 0.1 to 3 V
IZCD = 1 mA
0.1
3.3
1
µA
V
VZCDH Upper clamp voltage
3.0
3.6
Doc ID 17957 Rev 1
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Electrical characteristics
ALTAIR05T-800
Table 4.
Symbol
Electrical characteristics (continued)
Parameter
Test condition
IZCD = - 1 mA
Min. Typ. Max. Unit
VZCDL Lower clamp voltage
-90 -60 -30 mV
100 110 120 mV
VZCDA Arming voltage
positive-going edge
negative-going edge
VZCDT Triggering voltage
50
60
70
mV
µA
IZCDON Min. source current during MOSFET ON-time
-25 -50 -75
VCOMP ≥ 1.3V
6
TBLANK Trigger blanking time after MOSFET’s turn-off
µs
VCOMP = 0.9V
30
Line feedforward
RFF
Equivalent feedforward resistor
IZCD = 1mA
45
Ω
Transconductance error amplifier
(1)
Tj = 25°C
2.46 2.5 2.54
VREF
Voltage reference
Transconductance
V
Tj = -25 to 125°C and
Vcc=12V to 23V (1)
2.42
1.3
2.58
3.2
∆ICOMP = 10 µA
VCOMP = 1.65 V
gm
2.2
mS
Gv
Voltage gain
Open loop
73
dB
KHz
µA
µA
V
GB
Gain-bandwidth product
Source current
Sink current
500
100
VZCD = 2.3V, VCOMP = 1.65V
VZCD = 2.7V, VCOMP = 1.65V
VZCD = 2.3 V
70
ICOMP
400 750
VCOMPH Upper COMP voltage
VCOMPL Lower COMP voltage
VCOMPBM Burst-mode threshold
2.7
0.7
1
VZCD = 2.7 V
V
V
Hys
Burst-mode hysteresis
65
mV
CDC function
VCDC
CDC voltage reference
VCOMP = 1.1V, ICDC = 1µA (1)
2.4
1.5
2.5
1.6
2.6
1.7
V
Current reference
(1)
VIREFx Maximum value
VCOMP = VCOMPL
V
V
VCREF Current reference voltage
0.192 0.2 0.208
Current sense
tLEB
td(H-L)
VCSx
Leading-edge blanking
Delay-to-output
200 250 300
300
ns
ns
V
Max. clamp value
dVcs/dt = 200 mV/µs (1)
0.7 0.75 0.8
(1)
VCSdis Hiccup-mode OCP level
1. Parameters tracking each other
0.92
1
1.08
V
8/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Figure 3.
Electrical characteristics
C
output capacitance variation
OSS
C
(pF)
OSS
500
400
300
200
100
0
0
25
50
75
100
125
150
V
(V)
DS
Figure 4.
Off state drain and source current test circuit
14 V
Ids s
A
VDD
DRAIN
CDC
2. 5V
+
-
CURRENT
CONTROL
Vin
75 0V
FB /ZCD
COMP
IRE F
GND SOURCE
Note:
The measured I
is the sum between the current across the start-up resistor and the
DSS
effective MOSFET’s off state drain current.
Figure 5. Start-up current test circuit
Ic cstart-up
1 1.8 V
A
V DD
D RAIN
CDC
2. 5V
+
-
CURRENT
CONTROL
FB/ ZCD
COMP
IREF
GND SOURCE
Doc ID 17957 Rev 1
9/28
Electrical characteristics
Figure 6.
ALTAIR05T-800
Quiescent current test circuit
Iq_ m eas
A
1 4V
VDD
DRAI N
CDC
+
-
2.5 V
CURRENT
CONTROL
FB/ZCD
3 3k
COMP
IREF
GND SOURCE
0 .8 V
3V
10 k
0.2 V
Figure 7.
Operating supply current test circuit
1. 5k
2W
15V
Ic c
A
27 k
22 0k
1 0k
VDD
DRAIN
CDC
2. 5V
+
-
CURRENT
CONTROL
FB /ZCD
150V
10 k
COMP
IREF
GND SOURCE
10
50 kHz
5. 6
2. 8V
-5V
Note:
The circuit across the ZCD pin is used for switch-on synchronization
Figure 8. Quiescent current during fault test circuit
Iq(f au lt)
14V
A
V DD
D RAIN
CDC
2. 5V
+
-
CURRENT
CONTROL
FB/ ZCD
COMP
IREF
GND SOURCE
10/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Application information
5
Application information
The device is an off-line all-primary sensing switching regulator, based on quasi-resonant
flyback topology.
Depending on converter’s load condition, the device is able to work in different modes (see
Figure 9):
1. QR mode at heavy load. Quasi-resonant operation lies in synchronizing MOSFET's
turn-on to the transformer’s demagnetization by detecting the resulting negative-going
edge of the voltage across any winding of the transformer. Then the system works
close to the boundary between discontinuous (DCM) and continuous conduction
(CCM) of the transformer. As a result, the switching frequency is different for different
line/load conditions (see the hyperbolic-like portion of the curves in Figure 9). Minimum
turn-on losses, low EMI emission and safe behavior in short circuit are the main
benefits of this kind of operation.
2. Valley-skipping mode at medium/ light load. Depending on voltage on COMP pin, the
device defines the maximum operating frequency of the converter. As the load is
reduced MOSFET’s turn-on does not occur any more on the first valley but on the
second one, the third one and so on. In this way the switching frequency is no longer
increased (piecewise linear portion in Figure 9).
3. Burst-mode with no or very light load. When the load is extremely light or disconnected,
the converter enters a controlled on/off operation with constant peak current.
Decreasing the load result in frequency reduction, which can go down even to few
hundred hertz, thus minimizing all frequency-related losses and making it easier to
comply with energy saving regulations or recommendations. Being the peak current
very low, no issue of audible noise arises.
Figure 9.
Multi-mode operation of ALTAIR05T-800
fosc
Input voltage
f
sw
Valley-skipping
mode
Burst-mode
Quasi-resonant mode
0
Pinmax
P
in
Doc ID 17957 Rev 1
11/28
Application information
ALTAIR05T-800
5.1
Power section and gate driver
The power section guarantees safe avalanche operation within the specified energy rating
as well as high dv/dt capability. The Power MOSFET has a V(BR)DSS of 800 V min. and a
typical R
of 11 Ω.
DS(on)
The gate driver is designed to supply a controlled gate current during both turn-on and turn-
off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down
circuit holds the gate low in order to ensure that the power MOSFET cannot be turned on
accidentally.
5.2
High-voltage start-up generator
The HV current generator is supplied through the DRAIN pin and it is enabled only if the
input bulk capacitor voltage is higher than V
threshold, 50 V typically. When the HV
start
DC
current generator is ON, the Icharge current (5.5 mA typical value) is delivered to the
capacitor on the V pin.
CC
With reference to the timing diagram of Figure 10, when power is applied to the circuit and
the voltage on the input bulk capacitor is high enough, the HV generator is sufficiently
biased to start operating, thus it draws about 5.5 mA (typical) from the bulk capacitor. Most
of this current charges the bypass capacitor connected between the Vcc pin and ground and
make its voltage rise linearly.
As the Vcc voltage reaches the start-up threshold (13 V typ.) the chip starts operating, the
internal power MOSFET is enabled to switch and the HV generator is cut off. The IC is
powered by the energy stored in the Vcc capacitor.
The chip is able to power itself directly from the rectified mains: when the voltage on the V
CC
pin falls below Vcc
(10.5V typ.), during each MOSFET’s off-time the HV current
restart
generator is turned on and charges the supply capacitor until it reaches the V
threshold.
CCOn
In this way, the self-supply circuit develops a voltage high enough to sustain the operation of
the device. This feature is useful especially during CC regulation, when the flyback voltage
generated by the auxiliary winding alone may not be able to keep Vcc above V
.
CCrestart
At converter power-down the system loses regulation as soon as the input voltage falls
below V . This prevents converter’s restart attempts and ensures monotonic output
Start
voltage decay at system power-down.
12/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Application information
Figure 10. Timing diagram: normal power-up and power-down sequences
Vin
Start
V
Vcc
t
t
VccON
Vccrestart
DRAIN
Icharge
t
t
5.5 mA
Normal operation
CV mode
Normal operation
CC mode
Power-off
Power-on
5.3
Zero current detection and triggering block
The zero current detection (ZCD) and triggering blocks switch on the power MOSFET if a
negative-going edge falling below 50 mV is applied to the ZCD/FB pin. To do so, the
triggering block must be previously armed by a positive-going edge exceeding 100 mV.
This feature is used to detect transformer demagnetization for QR operation, where the
signal for the ZCD input is obtained from the transformer’s auxiliary winding used also to
supply the IC.
Figure 11. ZCD block, triggering block
ZCD/FB
R zcd
ZCD
CLAMP
BLANKIN G
TIME
STARTER
R f b
Aux
TU R N - O N
LO GIC
-
S
R
+
To Dr iv er
110mV
60mV
Q
From CC/ CV Block
LEB
From OC P
The triggering block is blanked after MOSFET’s turn-off to prevent any negative-going edge
that follows leakage inductance demagnetization from triggering the ZCD circuit
erroneously.
This blanking time is dependent on the voltage on COMP pin: it is T
= 30 µs for V
= 1.3 V
BLANK
COMP
= 0.9 V, and decreases almost linearly down to T
= 6 µs for V
BLANK
COMP
Doc ID 17957 Rev 1
13/28
Application information
ALTAIR05T-800
The voltage on the pin is both top and bottom limited by a double clamp, as illustrated in the
internal diagram of the ZCD block of Figure 11. The upper clamp is typically at 3.3 V, while
the lower clamp is at -60 mV. The interface between the pin and the auxiliary winding is a
resistor divider. Its resistance ratio as well as the individual resistance values has to be
properly chosen (see “Section 5.4: Constant voltage operation” and “Section 5.6: Voltage
feedforward block”).
Please note that the maximum I
sunk/sourced current has to not exceed 2 mA
ZCD/FB
(AMR) in all the Vin range conditions (85-265 Vac). No capacitor is allowed between ZCD
pin and the auxiliary transformer.
The switching frequency is top-limited below 166 kHz, as the converter’s operating
frequency tends to increase excessively at light load and high input voltage.
A Starter block is also used to start-up the system, that is, to turn on the MOSFET during
converter power-up, when no or a too small signal is available on the ZCD pin.
The starter frequency is 2 kHz if COMP pin is below burst mode threshold, i.e. 1 V, while it
becomes 8 kHz if this voltage exceed this value.
After the first few cycles initiated by the starter, as the voltage developed across the auxiliary
winding becomes large enough to arm the ZCD circuit, MOSFET’s turn-on starts to be
locked to transformer demagnetization, hence setting up QR operation.
The starter is activated also when the IC is in CC regulation and the output voltage is not
high enough to allow the ZCD triggering.
If the demagnetization completes – hence a negative-going edge appears on the ZCD pin –
after a time exceeding time T
from the previous turn-on, the MOSFET is turned on
BLANK
again, with some delay to ensure minimum voltage at turn-on. If, instead, the negative-going
edge appears before T has elapsed, it is ignored and only the first negative-going
BLANK
edge after T
turns-on the MOSFET. In this way one or more drain ringing cycles is
BLANK
skipped (“valley-skipping mode”, Figure 12) and the switching frequency is prevented from
exceeding 1/T
.
BLANK
Figure 12. Drain ringing cycle skipping as the load is progressively reduced
VDS
VDS
VDS
t
t
TON
TFW
Tosc
TV
Tosc
Tosc
Pin = Pin'
(limit condition)
Pin = Pin'' < Pin'
Pin = Pin''' < Pin''
Note that when the system operates in valley skipping-mode, uneven switching cycles may
be observed under some line/load conditions, due to the fact that the OFF-time of the
MOSFET is allowed to change with discrete steps of one ringing cycle, while the OFF-time
needed for cycle-by-cycle energy balance may fall in between. Thus one or more longer
switching cycles is compensated by one or more shorter cycles and vice versa. However,
this mechanism is absolutely normal and there is no appreciable effect on the performance
of the converter or on its output voltage.
14/28
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ALTAIR05T-800
Application information
5.4
Constant voltage operation
The IC is specifically designed to work in primary regulation and the output voltage is
sensed through a voltage partition of the auxiliary winding, just before the auxiliary rectifier
diode.
Figure 13 shows the internal schematic of the constant voltage mode and the external
connections.
Figure 13. Voltage control principle: internal schematic
Rzcd
-
S/ H
-
To PWM Logic
EA
+
CV
+
2. 5V
Rf b
Aux
DEMAG
LOGI C
From Rsense
COMP
R
C
Due to the parasitic wires resistance, the auxiliary voltage is representative of the output just
when the secondary current becomes zero. For this purpose, the signal on ZCD/FB pin is
sampled-and-held at the end of transformer’s demagnetization to get an accurate image of
the output voltage and it is compared with the error amplifier internal reference.
The COMP pin is used for the frequency compensation: usually, an RC network, which
stabilizes the overall voltage control loop, is connected between this pin and ground.
The output voltage can be defined according the formula:
VREF
--------------------------------------------------------
⋅ RZCD
RFB
=
(1)
NAUX
--------------
⋅ VOUT – VREF
NSEC
Where N
and N
are the secondary and auxiliary turn’s number respectively.
AUX
SEC
The R
value can be defined depending on the application parameters (see “Section 5.6:
ZCD
Voltage feedforward block”).
5.5
Constant current operation
Figure 14 presents the principle used for controlling the average output current of the
flyback converter.
Doc ID 17957 Rev 1
15/28
Application information
ALTAIR05T-800
The output voltage of the auxiliary winding is used by the demagnetization block to generate
the control signal for the mosfet switch Q1. A resistor R in series with it absorbs a current
V /R, where V is the voltage developed across the capacitor C .
C
C
REF
The flip-flop’s output is high as long as the transformer delivers current on secondary side.
This is shown in Figure 15.
The capacitor C
has to be chosen so that its voltage V can be considered as a
C
REF
constant. Since it is charged and discharge by currents in the range of some ten µA (I
CREF
is typically 20 µA) at the switching frequency rate, a capacitance value in the range 4.7-10
nF is suited for switching frequencies in the ten kHz.
The average output current can be expressed as:
NPRI
VCREF
NSEC (2 ⋅ RSENSE
-------------- ------------------------------------
IOUT
=
⋅
(2)
)
Where N
is the primary's turns number.
PRI
This formula shows that the average output current does not depend anymore on the input
or the output voltage, neither on transformer inductance values. The external parameters
defining the output current are the transformer ratio n and the sense resistor R
.
SENSE
Figure 14. Current control principle
.
Iref
-
To PWM Logic
CC
+
R
From Rsense
Q1
S
R
Q
ZCD/FB
Rzcd
DEMAG
LOGIC
Rfb
Aux
IREF
Cref
16/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Application information
Figure 15. Constant current operation: Switching cycle waveforms
T
IP
t
t
t
t
I
s
Q
ICREF
I
C
VC
R
ICREF =−
5.6
Voltage feedforward block
The current control structure uses the voltage V to define the output current, according to
C
(2). Actually, the CC comparator is affected by an internal propagation delay Td, which
switches off the MOSFET with a peak current than higher the foreseen value.
This current overshoot is equal to:
V ⋅Td
LP
IN
(3)
∆IP =
Where L is the primary inductance.
P
It introduces an error on the calculated CC setpoint, depending on the input voltage.
The device implements a Line Feedforward function, which solves the issue by introducing
an input voltage dependent offset on the current sense signal, in order to adjust the cycle-
by-cycle current limitation.
The internal schematic is shown in Figure 16.
Doc ID 17957 Rev 1
17/28
Application information
Figure 16. Feedforward compensation: internal schematic
ALTAIR05T-800
DRAIN
Rzcd
ZCD/FB
Feedforward
Logic
.
Rfb
-
CC
Aux
PWM
LOGIC
I FF
Block
CC
+
Rff
SOURCE
Rsense
The R
resistor can be calculated as follows:
ZCD
NAUX LP⋅RFF
(4)
RZCD
=
⋅
N
T ⋅RSENSE
d
PRI
In this case the peak drain current does not depend on input voltage anymore.
One more consideration concerns the R value: during MOSFET’s ON-time, the current
ZCD
sourced by the ZCD/FB pin, I
µA typical).
, is compared with an internal reference current I
(-50
ZCD
ZCDON
If I
< I
, the brownout function is activated and the IC is shut-down.
ZCD
ZCDON
This feature is especially important when the auxiliary winding is accidentally disconnected
and considerably increases the end-product’s safety and reliability.
5.7
Cable drop compensation (CDC)
The voltage control loop regulates the output voltage as seen across the output capacitor.
If an output cable is used to supply the load, the voltage at the externally available terminals
is dependent on the output current value. The CDC function compensates the voltage drop
across the cable, so ideally zero load regulation can be achieved also at the end of the
cable.
18/28
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ALTAIR05T-800
Figure 17 presents the internal schematic.
Application information
Figure 17. CDC block: internal schematic
Dsec
Vout
Vout_reg
Rcable/2
Cout
Rcable/ 2
Npri
Nsec
Rzcd
GND
Naux
Viref
To CV Comparator
CDC
Rcdc
CDC
LOGIC
Vr ef
ZCD/FB
FB Block
Rf b
COMP
During CV regulation, as the CDC block is capable of sinking current, a resistor connect
between its output and ZCD/FB pin allows to increase the CV setpoint, by providing a
voltage lower than the internal reference voltage by an amount proportional to the average
load current.
If R
is the total cable resistance, the resistor value can be calculated by using the
CABLE
following equation:
2 ⋅ NSEC NSEC RSENSE ⋅ RZCD
------------------------ -------------- -------------------------------------------
RCDC
=
⋅
⋅
(5)
NPRI
NAUX
RCABLE
In this equation R
is the total resistance of the output cable.
CABLE
The CDC block acts as an outer control loop with a positive feedback that changes the CV
setpoint. As such, it can impact on the overall system’s stability. In order to avoid any issue
that could make unstable the loop, the CV setpoint response time must be much slower than
that of the inner voltage loop.
For this purpose the CDC block is designed with a time response of a few ten ms. For the
same reason, the minimum voltage on CDC pin is bottom limited at to 2.25 V.
If the function is not required, the pin can be connected to ground or left open.
Doc ID 17957 Rev 1
19/28
Application information
ALTAIR05T-800
5.8
Burst-mode operation at no load or very light load
When the voltage at the COMP pin falls 65 mV below a threshold fixed internally at a value,
V
, the IC is disabled with the MOSFET kept in OFF state and its consumption
COMPBM
reduced at a lower value to minimize Vcc capacitor discharge.
In this condition the converter operates in burst-mode (one pulse train every T
µs), with minimum energy transfer.
=500
START
As a result of the energy delivery stop, the output voltage decreases: after 500 µs the
controller switches-on the MOSFET again and the sampled voltage on the ZCD pin is
compared with the internal reference. If the voltage on the EA output, as a result of the
comparison, exceeds the V
threshold, the device restarts switching, otherwise it stays
COMPL
OFF for another 500 µs period.
In this way the converter works in burst-mode with a nearly constant peak current defined by
the internal disable level. Then a load decrease causes a frequency reduction, which can go
down even to few hundred hertz, thus minimizing all frequency-related losses and making it
easier to comply with energy saving regulations. This kind of operation, shown in the timing
diagrams of Figure 18 along with the others previously described, is noise-free since the
peak current is low
Figure 18. Load-dependent operating modes: timing diagrams
COMP
65 mV
hyster.
VCOMPL
I
DS
TSTART
TSTART
TSTART
TSTART
Normal-mode
Burst-mode
Normal-mode
5.9
Soft-start and starter block
The soft start feature is automatically implemented by the constant current block, as the
primary peak current is limited from the voltage on the C capacitor.
REF
During start-up, as the output voltage is zero, the IC starts in CC mode with no high peak
current operations. In this way the voltage on the output capacitor increases slowly and the
soft-start feature is ensured.
Actually the C
value is not important to define the soft-start time, as its duration depends
REF
on others circuit parameters, like transformer ratio, sense resistor, output capacitors and
load. The user can define the best appropriate value by experiments.
20/28
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ALTAIR05T-800
Application information
5.10
Hiccup mode OCP
The device is also protected against short circuit of the secondary rectifier, short circuit on
the secondary winding or a hard-saturated flyback transformer. A comparator monitors
continuously the voltage on the R
exceeds 1 V.
and activates a protection circuitry if this voltage
SENSE
To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
subsequent switching cycle the comparator is not tripped, a temporary disturbance is
assumed and the protection logic is reset in its idle state; if the comparator is tripped again a
real malfunction is assumed and the device is stopped.
This condition is latched as long as the device is supplied. While it is disabled, however, no
energy is coming from the self-supply circuit; hence the voltage on the V capacitor decays
CC
and cross the UVLO threshold after some time, which clears the latch. The internal start-up
generator is still off, then the V voltage still needs to go below its restart voltage before the
CC
V
capacitor is charged again and the device restarted. Ultimately, this results in a low-
CC
frequency intermittent operation (Hiccup-mode operation), with very low stress on the power
circuit. This special condition is illustrated in the timing diagram of Figure 19.
Figure 19. Hiccup-mode OCP: timing diagram
Secondary diode is shorted here
VCC
VccON
VccOFF
Vccrest
VSOURCE
t
1 V
Vcsdis
t
Two switching cycles
VDS
t
5.11
Layout recommendations
A proper printed circuit board layout is essential for correct operation of any switch-mode
converter and this is true for the ALTAIR05T-800 as well. Careful component placing, correct
traces routing, appropriate traces widths and compliance with isolation distances are the
major issues. In particular:
●
The compensation network should be connected as close as possible to the COMP
pin, maintaining the trace for the GND as short as possible
●
Signal Ground should be routed separately from power ground, as well from the sense
resistor trace.
Doc ID 17957 Rev 1
21/28
Application information
Figure 20. Suggested routing for converter
ALTAIR05T-800
OUT
AC IN
AC IN
GND
DRAIN
CDC
VDD
FB/ZCD
ALTAIR05T-800
COMP
GND
IREF
SOURCE
22/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Typical application
6
Typical application
Figure 21. Test board schematic: 5 W wide range mains CC/CV battery charger
D7
5V - 1A
L1
T1
470uH
BR
STPS3L40UF
MB6S-RC
R1
AC IN
AC IN
C3
R2
C1
C2
1nF
120K
C9
22
1W
4.7uF
4. 7uF
R9
680uF
400V
400V
2. 2k
Low ESR
D7
STTH1L06
R3
GN D
4 7K
D2
R4
10
BAT46
C4
10uF
R5
U1
ALTAIR 05
C10
TBD
VDD
DRAI N
CDC
2. 5V
2 .2nF - Y Cap
+
-
CURRENT
CONTROL
FB/ZCD
T1 SPECIFICATION
Supplier: MAGNETICA
COMP
IREF
GN D SOURCE
Core E16/8/5, ferrite N67
Gap: 0.18mm for 2.2mHprimary inductance
Lleakage max= 88uH
Primary:125T, AWG34
Auxiliary: 25T, AWG34
Secondary: 9T, 0.50 Tex-E
R6
10 K
C5
470nF
C7
4. 7nF
C6
1nF
R8
1.2
R7
10k
Table 5.
Efficiency at 115 V
IOUT[A]
AC
Load [%]
VOUT[V]
POUT[W]
PIN[W]
Efficiency [%]
25
50
0.25
0.5
0.75
1
4.97
4.97
4.97
4.98
1.243
2.485
3.728
4.980
1.643
3.156
4.72
6.4
75.62
78.64
78.97
77.81
77.79
75
100
Average efficiency
Table 6.
Efficiency at 230 V
AC
Load [%]
IOUT[A]
VOUT[V]
POUT[W]
PIN[W]
Efficiency [%]
25
50
0.25
0.5
0.75
1
4.98
4.97
1.245
2.485
3.735
4.990
1.88
3.349
4.838
6.326
66.22
74.18
77.22
78.88
74.12
75
4.98
100
4.99
Average efficiency
Doc ID 17957 Rev 1
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Package mechanical data
ALTAIR05T-800
7
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
Table 7.
Dim.
SO16N mechanical data
Mm
inch
Typ
Min
Typ
Max
Min
Max
A
1.75
0.25
0.069
0.009
a1
0.1
0.004
a2
b
1.6
0.063
0.018
0.010
0.35
0.19
0.46
0.25
0.014
0.007
b1
C
0.5
0.020
c1
D (1)
E
45°
10
(typ.)
0.386
0.228
9.8
5.8
0.394
0.244
6.2
e
1.27
8.89
0.050
0.350
e3
F(1)
G
3.8
4.60
0.4
4.0
0.150
0.181
0.150
0.157
0.208
0.050
5.30
1.27
L
M
S
0.62
0.024
8 °(max.)
24/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Figure 22. Package dimensions
Package mechanical data
Doc ID 17957 Rev 1
25/28
Order codes
ALTAIR05T-800
8
Order codes
Table 8.
Ordering information
Order code
Package
Packaging
ALTAIR05T-800
Tube
SO16N
ALTAIR05T-800TR
Tape and reel
26/28
Doc ID 17957 Rev 1
ALTAIR05T-800
Revision history
9
Revision history
Table 9.
Date
25-Oct-2010
Document revision history
Revision
Changes
1
Initial release.
Doc ID 17957 Rev 1
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ALTAIR05T-800
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