ACST2 [STMICROELECTRONICS]

AC Switch family Alternating current switch; AC交换机系列交流电开关
ACST2
型号: ACST2
厂家: ST    ST
描述:

AC Switch family Alternating current switch
AC交换机系列交流电开关

开关
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ACST2 Series  
AC Switch family  
Alternating current switch  
Main features  
OUT  
G
Symbol  
Value  
Unit  
COM  
IT(RMS)  
VDRM/VRRM  
IGT  
2
A
V
G
OUT  
COM  
800  
10  
mA  
DPAK  
ACST2-8SB  
TO-220FPAB  
ACST2-8SFP  
Overvoltage crowbar technology  
High noise immunity: static dV/dt > 500 V/µs  
Benefits  
The ACST2-8SFP in the TO-220FPAB package  
provides insulation voltage rated at 1500V  
RMS  
Enables equipment to meet IEC 61000-4-5  
High off-state reliability with planar technology  
Needs no external overvoltage protection  
Reduces component count  
Main application  
AC ON/OFF static switching in appliances &  
industrial control systems  
Interfaces directly with the micro-controller  
Drive of low power highly resistive or inductive  
High immunity against fast transients  
loads like:  
described in IEC 61000-4-4 standards  
– solenoid,  
– pump, fan, micro-motor  
Order code  
Part number  
Marking  
Description  
ACST2-8SFP  
ACST2-8SB  
ACST28S  
ACST28S  
The ACST2 series belongs to the AC power  
switch family built around the ASD technology.  
This high performance device is adapted to home  
appliances or industrial systems and drives loads  
up to 2 A.  
Functional diagram  
This ACST2 switch embeds a Triac structure with  
a high voltage clamping device to absorb the  
inductive turn-off energy and withstand line  
transients such as those described in the  
OUT  
IEC 61000-4-5 standards. The component needs  
a low gate current to be activated (I < 10 mA)  
GT  
G
and in the mean time provides a high electrical  
noise immunity such as those described in the  
IEC 61000-4-4 standards.  
COM  
March 2007  
Rev 1  
1/11  
www.st.com  
11  
Characteristics  
ACST2 Series  
1
Characteristics  
Table 1.  
Symbol  
Absolute maximum ratings (limiting values)  
Parameter  
Value  
Unit  
TO-220FPAB Tc = 105° C  
A
IT(RMS) RMS on-state current (full sine wave)  
2
DPAK  
Tc = 110 °C  
t = 16.7 ms  
t = 20 ms  
F = 60 Hz  
F = 50 Hz  
tp = 10 ms  
8.4  
8.0  
0.5  
A
Non repetitive surge peak on-state current  
ITSM  
(full cycle sine wave, TJ initial = 25° C)  
²
²
²
I t  
I t Value for fusing  
A s  
Critical rate of rise of on-state current  
IG = 2 x IGT, tr = 100 ns  
dI/dt  
F = 120 Hz  
Tj = 125° C  
50  
A/µs  
(1)  
VPP  
Non repetitive line peak mains voltage (1)  
Tj = 25° C  
Tj = 125° C  
Tj = 125° C  
Tj = 125° C  
2
kV  
W
W
A
PG(AV) Average gate power dissipation  
0.1  
10  
1.6  
PGM  
IGM  
Peak gate power dissipation (tp = 20 µs)  
Peak gate current (tp = 20 µs)  
Tstg  
Tj  
Storage junction temperature range  
Operating junction temperature range  
-40 to +150  
-40 to +125  
° C  
° C  
Tl  
Maximum lead soldering temperature during 10 s (at 3 mm from plastic case)  
260  
1. according to test described by IEC 61000-4-5 standard and Figure 16  
Table 2.  
Symbol  
Electrical characteristics (T = 25° C, unless otherwise specified)  
j
Test conditions  
VOUT = 12 V RL = 33 Ω  
Quadrant  
Value  
Unit  
(1)  
IGT  
I - II - III  
I - II - III  
I - II - III  
MAX  
MAX  
MIN  
10  
1.1  
0.2  
10  
mA  
V
VGT  
VOUT = 12 V RL = 33 Ω  
VOUT = VDRM RL = 3.3 kΩ Tj = 125° C  
IOUT = 100 mA  
VGD  
V
(2)  
IH  
MAX  
MAX  
MAX  
MIN  
mA  
I - III  
II  
25  
IL  
IG = 1.2 x IGT  
mA  
35  
dV/dt (2)  
VOUT = 67% VDRM gate open Tj = 125° C  
500  
0.5  
850  
V/µs  
A/ms  
V
(dI/dt)c (2) (dV/dt)c = 15 V/µs Tj = 125° C  
MIN  
VCL ICL = 0.1 mA tp = 1 ms Tj = 25° C  
MIN  
1. minimum IGT is guaranteed at 5% of IGT max  
2. for both polarity of OUT pin referenced to COM pin  
2/11  
ACST2 Series  
Characteristics  
Unit  
Table 3.  
Symbol  
Static electrical characteristics  
Test conditions  
Value  
(1)  
VTM  
ITM = 2.8 A tp = 500 µs  
Threshold voltage  
Tj = 25° C  
Tj = 125° C  
Tj = 125° C  
Tj = 25° C  
Tj = 125° C  
MAX  
MAX  
MAX  
2
V
V
(1)  
VTO  
0.9  
250  
10  
(1)  
RD  
Dynamic resistance  
mΩ  
µA  
mA  
IDRM  
IRRM  
VOUT = VDRM / VRRM  
MAX  
0.5  
1. for both polarity of OUT pin referenced to COM pin  
Table 4.  
Symbol  
Thermal resistances  
Parameter  
Value  
4.5  
Unit  
DPAK  
Rth(j-c)  
Junction to case (AC)  
Junction to ambient  
TO-220FPAB  
TO-220FPAB  
DPAK  
7
° C/W  
60  
70  
Rth(j-a)  
SCU (1)= 0.5 cm  
²
1. SCU = copper surface under tab  
Figure 1.  
Maximum power dissipation versus Figure 2.  
RMS on-state current (full cycle)  
RMS on-state current versus case  
temperature  
P(W)  
2.8  
I
T(RMS)(A)  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
α=180 °  
DPAK  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
0.0  
TO-220FPAB  
180°  
α=180 °  
TC(°C)  
IT(RMS)(A)  
1.0  
0
25  
50  
75  
100  
125  
0.0  
0.2  
0.4  
0.6  
0.8  
1.2  
1.4  
1.6  
1.8  
2.0  
3/11  
Characteristics  
ACST2 Series  
Figure 3.  
RMS on-state current versus  
ambient temperature  
Figure 4.  
Relative variation of thermal  
impedance versus pulse duration -  
TO-220FPAB  
K=[Zth/Rth  
]
IT(RMS)(A)  
1.00  
0.10  
0.01  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
α=180 °  
Printed circuit board FR4  
Natural convection  
SCU=0.5 cm²  
Zth(j-c)  
Zth(j-a)  
Tamb(°C)  
TO-220FPAB  
tP(s)  
0
25  
50  
75  
100  
125  
1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03  
Figure 5.  
Relative variation of thermal  
impedance versus pulse duration -  
DPAK  
Figure 6.  
Relative variation of gate trigger  
current I , holding current I and  
GT  
H
latching current I versus junction  
L
temperature (typical values)  
K=[Zth/Rth  
]
IGT, IH, IL [TJ] / IGT, IH, IL [Tj=25 °C]  
1.0E+00  
2.8  
2.6  
2.4  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
IGT  
Zth(j-c)  
IL & IH  
Zth(j-a)  
1.0E-01  
1.0E-02  
DPAK  
Tj(°C)  
tP(s)  
-40 -30 -20 -10  
0
10 20 30 40 50 60 70 80 90 100 110 120 130  
1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03  
Figure 7.  
Relative variation of static dV/dt  
versus junction temperature  
Figure 8.  
Relative variation of critical rate of  
decrease of main current versus  
reapplied dV/dt (typical values)  
dV/dt [Tj] / dV/dt [Tj=125 °C]  
(dI/dt)c [ (dV/dt)c ] / Specified (dI/dt)c  
100  
10  
1
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0.0  
VOUT=540 V  
VOUT=300 V  
Tj(°C)  
75  
(dV/dt)c(V/µs)  
0.1  
1.0  
10.0  
100.0  
25  
50  
100  
125  
4/11  
ACST2 Series  
Characteristics  
Figure 9.  
Relative variation of critical rate of Figure 10. Surge peak on-state current versus  
decrease of main current versus  
junction temperature  
number of cycles  
(dI/dt)c [Tj] / (dI/dt)c [Tj=125 °C]  
ITSM(A)  
9
8
7
6
5
4
3
2
1
0
20  
18  
16  
14  
12  
10  
8
VOUT=300 V  
t=20ms  
One cycle  
Non repetitive  
Tj initial=25 °C  
Repetitive  
T
C=110 °C  
6
4
2
Tj(°C)  
Number of cycles  
0
1
10  
100  
1000  
25  
50  
75  
100  
125  
Figure 11. Non repetitive surge peak on-state Figure 12. On-state characteristics (maximum  
current for a sinusoidal pulse with values)  
width t < 10 ms, and  
P
²
corresponding value of I t  
ITSM(A), I²t (A²s)  
ITM(A)  
1.E+01  
1.E+00  
1.E-01  
1.E-02  
100.0  
10.0  
1.0  
Tj initial=25 °C  
ITSM  
Tj=125 °C  
Tj=25 °C  
I²t  
TJ max. :  
TO= 0.90 V  
D= 250 mW  
V
R
VTM(V)  
2.5  
tP(ms)  
0.1  
0.01  
0.10  
1.00  
10.00  
0.0  
0.5  
1.0  
1.5  
2.0  
3.0  
3.5  
4.0  
4.5  
5.0  
Figure 13. Thermal resistance junction to  
Figure 14. Relative variation of clamping  
ambient versus copper surface  
under tab (printed circuit board  
voltage V versus junction  
temperature  
CL  
FR4, e = 35 µm) (DPAK)  
CU  
Rth(j-a)(°C/W)  
VCL [Tj] / VCL [Tj=25 °C]  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
1.20  
1.15  
1.10  
1.05  
1.00  
0.95  
0.90  
0.85  
DPAK  
Tj(°C)  
60  
SCU(cm²)  
0
5
10  
15  
20  
25  
30  
35  
40  
-40  
-20  
0
20  
40  
80  
100  
120  
140  
5/11  
AC line switch basic application  
ACST2 Series  
2
AC line switch basic application  
The ACST2 device has been designed to switch on and off highly inductive or resistive loads  
such as pump, valve, fan, or bulb lamp. Thanks to its high sensitivity (I max = 10 mA), the  
GT  
ACST2 can be driven directly by logic level circuits through a resistor as shown on the  
typical application diagram. Thanks to its thermal and turn-off commutation performances,  
the ACST2 switch can drive, without any additional snubber, an inductive load up to 2 A.  
Figure 15. Typical application diagram  
Line  
L
AC LOAD  
R
AC Mains  
ACST2  
Rg  
MCU  
Power supply  
2.1  
Protection against overvoltage: the best choice is ACST  
In comparison with standard triacs, which are not robust against surge voltages, the ACST2  
is over-voltage self-protected, specified by the new parameter V . In addition, ACST2 is a  
CL  
sensitive device (I = 10mA), but provides a high noise immunity level against fast  
GT  
transients.  
The ACST2 switch is able to sustain safely the AC line transient voltages either by clamping  
the low energy spikes or by breaking over under high energy shocks, even with fast turn-on  
current rises.  
The test circuit of the Figure 16 is representative of the final ACST2 application, and is also  
used to stress the ACST switch according to the IEC 61000-4-5 standard conditions. Thanks  
to the load limiting the current, the ACST switch sustains the voltage spikes up to 2 kV  
above the peak line voltage. The protection is based on an overvoltage crowbar technology.  
Actually, the ACST2 will break over safely as shown on Figure 17. The ACST is recovering  
its blocking voltage capability at the next zero current crossing point. Such non repetitive test  
can be done 10 times on each AC line voltage polarity.  
6/11  
ACST2 Series  
Ordering information scheme  
Figure 16. Overvoltage ruggedness test circuit Figure 17. Typical current and voltage  
for resistive and inductive loads  
according to IEC 61000-4-5  
standards:  
waveforms across the ACST2  
during IEC 61000-4-5 standard test  
R = 200 Ω, L = 10 µH, V = 2 kV  
pp  
Surge generator  
2kV surge  
V
(200 V/div)  
OUT  
Rgene  
Model of the load  
Filtering unit  
L
R
I
(500 mA/div)  
OUT  
AC Mains  
ACST2-8x  
Rg  
2.2  
Electrical noise immunity  
Even if the ACST2 is a sensitive device (I = 10 mA) and can be controlled directly though  
GT  
a simple resistor by a logic level circuit, it provides a high electrical noise immunity. The  
intrinsic immunity of the ACST2 is shown by the specified dV/dt equal to 500 V/µs @ 125° C.  
This immunity level is 5 to 10 times higher than the immunity provided by an equivalent  
standard technology triac with the same sensitivity. In other word, ACST2 is sensitive, but  
has an immunity reaching the one provided by non-sensitive device (I higher than 35 mA).  
GT  
3
Ordering information scheme  
ACST 2 - 8  
S
FP -TR  
AC Switch series  
Current  
2 = 2 ARMS  
Voltage  
8 = 800 V  
Sensitivity  
S = 10 mA  
Package  
FP = TO-220FPAB  
B = DPAK  
Packing  
TR = Tape and reel (DPAK)  
Blank = Tube (TO-220FPAB, DPAK)  
7/11  
Package information  
ACST2 Series  
4
Package information  
Epoxy meets UL94, V0  
Table 5.  
TO-220FPAB dimensions  
Dimensions  
Millimeters  
Ref.  
Inches  
Min.  
Max.  
Min.  
Max.  
A
B
4.4  
2.5  
4.6  
2.7  
0.173  
0.098  
0.098  
0.018  
0.030  
0.045  
0.045  
0.195  
0.094  
0.393  
0.181  
0.106  
0.108  
0.027  
0.039  
0.067  
0.067  
0.205  
0.106  
0.409  
A
B
D
2.5  
2.75  
0.70  
1
H
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
Dia  
F
F1  
F2  
G
1.70  
1.70  
5.20  
2.7  
L6  
L2  
L3  
L7  
L5  
G1  
H
D
F1  
10  
10.4  
L4  
F2  
L2  
L3  
L4  
L5  
L6  
L7  
Dia.  
16 Typ.  
0.63 Typ.  
28.6  
9.8  
30.6  
10.6  
3.6  
1.126  
0.386  
0.114  
0.626  
0.354  
0.118  
1.205  
0.417  
0.142  
0.646  
0.366  
0.126  
F
E
G1  
G
2.9  
15.9  
9.00  
3.00  
16.4  
9.30  
3.20  
8/11  
ACST2 Series  
Package information  
Dimensions  
Table 6.  
DPAK dimensions  
Ref.  
Millimeters  
Inches  
Min.  
Max.  
Min.  
Max.  
A
A1  
A2  
B
2.20  
0.90  
0.03  
0.64  
5.20  
0.45  
0.48  
6.00  
6.40  
4.40  
9.35  
2.40  
1.10  
0.23  
0.90  
5.40  
0.60  
0.60  
6.20  
6.60  
4.60  
10.10  
0.086  
0.035  
0.001  
0.025  
0.204  
0.017  
0.018  
0.236  
0.251  
0.173  
0.368  
0.094  
0.043  
0.009  
0.035  
0.212  
0.023  
0.023  
0.244  
0.259  
0.181  
0.397  
E
A
B2  
C2  
L2  
B2  
C
D
R
H
L4  
C2  
D
A1  
R
B
G
C
E
A2  
G
0.60 MIN.  
H
V2  
L2  
L4  
V2  
0.80 typ.  
0.031 typ.  
0.60  
0°  
1.00  
8°  
0.023  
0°  
0.039  
8°  
Figure 18. Footprint (dimensions in mm)  
1.6  
6.7  
3
3
2.3  
6.7  
2.3  
1.6  
In order to meet environmental requirements, ST offers these devices in ECOPACK®  
packages. These packages have a lead-free second level interconnect. The category of  
second level interconnect is marked on the package and on the inner box label, in  
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  
conditions are also marked on the inner box label. ECOPACK is an ST trademark.  
ECOPACK specifications are available at: www.st.com.  
9/11  
Ordering information  
ACST2 Series  
5
Ordering information  
Part number  
Marking  
Package  
Weight  
Base Qty Packing mode  
ACST2-8SFP  
ACST2-8SB  
ACST28S  
ACST28S  
ACST28S  
TO-220FPAB  
DPAK  
2.4g  
0.3g  
0.3g  
50  
50  
Tube  
Tube  
ACST2-8SB-TR  
DPAK  
2500  
Tape and Reel  
6
Revision history  
Date  
Revision  
Changes  
01-Mar-2007  
1
Initial release.  
10/11  
ACST2 Series  
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11/11  

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