74VHCT541AMTR [STMICROELECTRONICS]
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED); 具有三态输出八路总线缓冲器(非反相)型号: | 74VHCT541AMTR |
厂家: | ST |
描述: | OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NON INVERTED) |
文件: | 总12页 (文件大小:277K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74VHCT541A
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
■
■
HIGH SPEED: t = 4.1 ns (TYP.) at V = 5V
PD CC
LOW POWER DISSIPATION:
I
= 4 µA (MAX.) at T =25°C
CC
A
■
■
■
■
■
■
COMPATIBLE WITH TTL OUTPUTS:
= 2V (MIN.), V = 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
V
IH
IL
SOP
TSSOP
T & R
SYMMETRICAL OUTPUT IMPEDANCE:
|I | = I = 8 mA (MIN)
Table 1: Order Codes
PACKAGE
OH
OL
BALANCED PROPAGATION DELAYS:
t
t
PLH
PHL
OPERATING VOLTAGE RANGE:
(OPR) = 4.5V to 5.5V
SOP
74VHCT541AMTR
74VHCT541ATTR
V
CC
TSSOP
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
In order to enhance PC board layout, the
74VHCT541 offers a pinout having inputs and
outputs on opposite sides of the package.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
■
■
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
= 0.9V (MAX.)
OLP
DESCRIPTION
The 74VHCT541A is an advanced high-speed
CMOS OCTAL BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
2
double-layer metal wiring C MOS technology.
The 3 STATE control gate operates as two input
AND such that if either G1 and G2 are high, all
eight outputs are in the high impedance state.
Figure 1: Pin Connection And IEC Logic Symbols
Rev. 4
1/12
December 2004
74VHCT541A
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
1, 19
G1, G2
Output Enable Inputs
Data Inputs
2, 3, 4, 5, 6,
7, 8, 9
A1 to A8
18, 17, 16,
15, 14, 13,
12, 11
Y1 to Y8
Data Outputs
10
20
GND
Ground (0V)
V
Positive Supply Voltage
CC
Table 3: Truth Table
G1
INPUT
G2
OUTPUT
Yn
An
H
X
L
X
H
L
X
X
H
L
Z
Z
H
L
L
L
X : Don’t Care
Z : High impedance
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
V
V
CC
V
DC Input Voltage
I
V
DC Output Voltage (see note 1)
DC Output Voltage (see note 2)
DC Input Diode Current
DC Output Diode Current
DC Output Current
V
O
V
-0.5 to V + 0.5
V
O
CC
I
- 20
± 20
mA
mA
mA
mA
°C
°C
IK
I
OK
I
± 25
O
I
or I
DC V or Ground Current
± 50
CC
GND
CC
T
Storage Temperature
-65 to +150
300
stg
T
Lead Temperature (10 sec)
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) Output in OFF State
2) High or Low State
2/12
74VHCT541A
Table 5: Recommended Operating Conditions
Symbol
Parameter
Value
Unit
V
Supply Voltage
4.5 to 5.5
0 to 5.5
0 to 5.5
V
V
CC
V
Input Voltage
I
V
Output Voltage (see note 1)
Output Voltage (see note 2)
Operating Temperature
V
O
V
0 to V
V
O
CC
T
-55 to 125
0 to 20
°C
ns/V
op
Input Rise and Fall Time (see note 3) (V = 5.0 ± 0.5V)
dt/dv
CC
1) Output in OFF State
2) High or Low State
3) VIN from 0.8V to 2V
Table 6: DC Specifications
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
V
CC
(V)
V
High Level Input
Voltage
4.5 to
5.5
IH
2
2
2
V
V
V
Low Level Input
Voltage
4.5 to
5.5
IL
0.8
0.8
0.8
V
High Level Output
Voltage
I =-50 µA
4.5
4.5
4.5
4.5
4.4
4.5
0.0
4.4
3.8
4.4
3.7
OH
O
V
V
I =-8 mA
3.94
O
V
Low Level Output
Voltage
I =50 µA
0.1
0.1
0.1
OL
OZ
O
I =8 mA
0.36
0.44
0.55
O
I
High Impedance
Output Leakage
Current
V = V or V
4.5 to
5.5
I
IH
IL
±0.25
± 2.5
± 2.5
µA
V
= 0V to 5.5V
O
I
Input Leakage
Current
0 to
5.5
I
V = 5.5V or GND
± 0.1
± 1.0
± 1.0
µA
µA
I
I
Quiescent Supply
Current
CC
V = V or GND
5.5
5.5
0
4
40
40
I
CC
+I
Additional Worst
Case Supply
Current
One Input at 3.4V,
CC
other input at V
1.35
0.5
1.5
5.0
1.5
5.0
mA
CC
or GND
I
Output Leakage
Current
OPD
V
= 5.5V
µA
OUT
Table 7: AC Electrical Characteristics (Input t = t = 3ns)
r
f
Test Condition
(*)
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
A
V
C
L
CC
(V)
(pF)
t
t
Propagation Delay
Time
5.0
5.0
5.0
5.0
15
50
15
50
4.1
6.2
5.0
7.5
6.0
8.5
1.0
1.0
1.0
1.0
6.5
9.5
1.0
1.0
1.0
1.0
6.5
9.5
PLH
PHL
ns
ns
ns
t
t
7.0
8.0
8.0
Output Disable
Time
PZL
RL = 1KΩ
RL = 1KΩ
10.0
12.0
12.0
PZH
t
t
Output Enable
Time
PLZ
PHZ
5.0
50
7.0
10.0
1.0
12.0
1.0
12.0
(*) Voltage range is 5.0V ± 0.5V
3/12
74VHCT541A
Table 8: Capacitive Characteristics
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
Min. Typ. Max. Min. Max. Min. Max.
C
Input Capacitance
6
8
10
10
10
pF
pF
IN
Output
Capacitance
C
OUT
C
Power Dissipation
Capacitance
(note 1)
PD
16
pF
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I /8 (per circuit)
CC(opr)
PD CC IN CC
Table 9: Dynamic Switching Characteristics
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
A
V
(V)
CC
V
Dynamic Low
Voltage Quiet
Output (note 1, 2)
0.9
1.1
OLP
5.0
V
-1.1
2.0
-0.9
OLV
Dynamic High
Voltage Input
(note 1, 3)
V
C = 50 pF
L
5.0
5.0
V
IHD
Dynamic Low
Voltage Input
(note 1, 3)
V
0.8
ILD
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V ), 0V to threshold
ILD
(V ), f=1MHz.
IHD
4/12
74VHCT541A
Figure 3: Test Circuit
TEST
SWITCH
Open
t
t
t
, t
PLH PHL
, t
V
CC
PZL PLZ
, t
GND
PZH PHZ
C
R
R
=15/50pF or equivalent (includes jig and probe capacitance)
L
L
T
= R1 = 1KΩ or equivalent
= Z
of pulse generator (typically 50Ω)
OUT
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
5/12
74VHCT541A
Figure 5: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
6/12
74VHCT541A
SO-20 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A1
B
2.35
2.65
0.093
0.104
0.1
0.33
0.23
12.60
7.4
0.30
0.51
0.32
13.00
7.6
0.004
0.013
0.009
0.496
0.291
0.012
0.020
0.013
0.512
0.299
C
D
E
e
1.27
0.050
H
10.00
0.25
0.4
10.65
0.75
1.27
8°
0.394
0.010
0.016
0°
0.419
0.030
0.050
8°
h
L
k
0°
ddd
0.100
0.004
0016022D
7/12
74VHCT541A
TSSOP20 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
0.041
0.012
0.0079
0.260
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
6.6
0.002
0.031
0.007
0.004
0.252
0.244
0.169
0.004
0.039
1
0.19
0.09
6.4
c
D
6.5
6.4
0.256
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0˚
8˚
0˚
8˚
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
8/12
74VHCT541A
Tape & Reel SO-20 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
11
1.197
0.433
0.528
0.130
0.161
0.476
Ao
Bo
Ko
Po
P
10.8
13.2
3.1
0.425
0.520
0.122
0.153
0.468
13.4
3.3
3.9
4.1
11.9
12.1
9/12
74VHCT541A
Tape & Reel TSSOP20 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
7
0.882
0.276
0.280
0.075
0.161
0.476
Ao
Bo
Ko
Po
P
6.8
6.9
0.268
0.272
0.067
0.153
0.468
7.1
1.9
4.1
12.1
1.7
3.9
11.9
10/12
74VHCT541A
Table 10: Revision History
Date
Revision
Description of Changes
Order Codes Revision - pag. 1.
16-Dec-2004
4
11/12
74VHCT541A
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
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