74VHCT273ATTR [STMICROELECTRONICS]
OCTAL D-TYPE FLIP FLOP WITH CLEAR; 八路D型触发器与Clear FLOP
| 型号： | 74VHCT273ATTR |
| 厂家： | 
ST |
| 描述： | OCTAL D-TYPE FLIP FLOP WITH CLEAR |
| 文件： | 总13页 (文件大小：306K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74VHCT273A
OCTAL D-TYPE FLIP FLOP WITH CLEAR
■
■
■
■
■
■
■
■
HIGH SPEED:
= 170 MHz (TYP.) at V = 5V
f
MAX
CC
LOW POWER DISSIPATION:
= 4 µA (MAX.) at T =25°C
I
CC
A
COMPATIBLE WITH TTL OUTPUTS:
= 2V (MIN.), V = 0.8V (MAX)
V
IH
IL
SOP
TSSOP
T & R
POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
Table 1: Order Codes
PACKAGE
|I | = I = 8 mA (MIN)
OH
OL
BALANCED PROPAGATION DELAYS:
t
t
PLH
PHL
SOP
74VHCT273AMTR
74VHCT273ATTR
OPERATING VOLTAGE RANGE:
(OPR) = 4.5V to 5.5V
TSSOP
V
CC
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 273
edge of the clock pulse.
When the CLEAR input is held low, the Q outputs
are held low independently of the other inputs.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
■
■
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: V
= 0.9V (MAX.)
OLP
DESCRIPTION
The 74VHCT273A is an advanced high-speed
CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR
fabricated with sub-micron silicon gate and
double-layer metal wiring C MOS technology.
Information signals applied to D inputs are
transferred to the Q outputs on the positive going
2
Figure 1: Pin Connection And IEC Logic Symbols
Rev. 3
1/13
December 2004
74VHCT273A
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
1
CLEAR
Asynchronous Master
Reset (Active LOW)
2, 5, 6, 9, 12,
15, 16,19
Q0 to Q7 Flip-Flop Outputs
3, 4, 7, 8, 13,
14, 17, 18
D0 to D7 Data Inputs
11
CLOCK
GND
Clock Input (LOW-to-HIGH
Edge Triggered)
10
20
Ground (0V)
V
Positive Supply Voltage
CC
Table 3: Truth Table
INPUTS
OUTPUT
FUNCTION
CLEAR
D
X
L
CLOCK
Q
L
L
X
CLEAR
H
L
H
H
H
X
H
Q
NO CHANGE
n
X: Don’t care
Table 4: Logic Diagram
This logic diagram has not be used to estimate propagation delays
2/13
74VHCT273A
Table 5: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
V
V
V
CC
V
DC Input Voltage
I
V
DC Output Voltage (see note 1)
DC Output Voltage (see note 2)
DC Input Diode Current
DC Output Diode Current
DC Output Current
O
V
-0.5 to V + 0.5
V
O
CC
I
- 20
± 20
mA
mA
mA
mA
°C
IK
I
OK
I
± 25
O
I
or I
DC V or Ground Current
± 50
CC
GND
CC
T
Storage Temperature
-65 to +150
300
stg
T
Lead Temperature (10 sec)
°C
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) V = 0V
CC
2) High or Low State
Table 6: Recommended Operating Conditions
Symbol
Parameter
Value
Unit
V
Supply Voltage
4.5 to 5.5
0 to 5.5
0 to 5.5
V
V
CC
V
Input Voltage
I
V
Output Voltage (see note 1)
Output Voltage (see note 2)
Operating Temperature
V
O
V
0 to V
V
O
CC
T
-55 to 125
0 to 20
°C
ns/V
op
Input Rise and Fall Time (see note 3) (V = 5.0 ± 0.5V)
dt/dv
CC
1) V = 0V
CC
2) High or Low State
3) V from 0.8V to 2V
IN
3/13
74VHCT273A
Table 7: DC Specifications
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
High Level Input
Voltage
4.5 to
5.5
IH
2
2
2
V
V
V
Low Level Input
Voltage
4.5 to
5.5
IL
0.8
0.8
0.8
V
High Level Output
Voltage
I =-50 µA
4.5
4.5
4.5
4.5
4.4
4.5
0.0
4.4
3.8
4.4
3.7
OH
O
V
V
I =-8 mA
3.94
O
V
Low Level Output
Voltage
I =50 µA
0.1
0.1
0.1
OL
O
I =8 mA
0.36
0.44
0.55
O
I
Input Leakage
Current
0 to
5.5
I
V = 5.5V or GND
± 0.1
± 1.0
± 1.0
µA
µA
I
I
Quiescent Supply
Current
CC
V = V or GND
5.5
5.5
0
4
40
40
I
CC
+I
Additional Worst
Case Supply
Current
One Input at 3.4V,
CC
other input at V
1.35
0.5
1.5
5.0
1.5
5.0
mA
CC
or GND
I
Output Leakage
Current
OPD
V
= 5.5V
µA
OUT
Table 8: AC Electrical Characteristics (Input t = t = 3ns)
r
f
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
C
L
CC
(V) (pF)
Min. Typ. Max. Min. Max. Min. Max.
(**)
t
Propagation Delay
Time CLOCK to Q
15
50
15
50
5.8
6.8
7.5
8.5
8.2
9.2
1.0
1.0
1.0
1.0
10.0
11.0
11.6
12.6
1.0
1.0
1.0
1.0
10.0
11.0
11.6
12.6
PLH
5.0
5.0
5.0
5.0
ns
ns
t
(**)
(**)
(**)
PHL
t
Propagation Delay
Time CLEAR to Q
10.0
11.0
PHL
t
t
CLR Pulse Width
LOW
W
(**)
(**)
5.0
5.0
5.0
5.0
5.0
5.0
ns
ns
5.0
5.0
CK Pulse Width
HIGH or LOW
W
t
Setup Time D to
CLOCK, HIGH or
LOW
s
(**)
2.0
2.0
2.0
ns
5.0
t
Hold Time D to CK,
HIGH or LOW
h
(**)
(**)
2.0
1.0
2.0
1.0
2.0
1.0
ns
ns
5.0
5.0
t
Removal Time CLR
to CLOCK
REM
(**)
(**)
f
Maximum Clock
Frequency
15
50
75
50
170
160
65
45
65
45
MAX
5.0
5.0
MHz
ns
t
Output to Output
Skew time (note 1)
OSLH
OSHL
(**)
50
1.0
1.0
1.0
5.0
t
(*) Voltage range is 5.0V ± 0.5V
Note 1: Parameter guaranteed by design. t
= |t
- t
|, t
= |t
- t
|
soLH
pLHm pLHn soHL
pHLm pHLn
4/13
74VHCT273A
Table 9: Capacitive Characteristics
Test Condition
Value
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
T = 25°C
Symbol
Parameter
A
C
Input Capacitance
6
10
10
10
pF
IN
C
Power Dissipation
Capacitance
(note 1)
PD
16
pF
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
Flip-Flop)
= C x V x f + I /8 (per
CC(opr)
PD CC IN CC
Table 10: Dynamic Switching Characteristics
Test Condition
Value
T = 25°C
Symbol
Parameter
-40 to 85°C -55 to 125°C Unit
A
V
CC
(V)
Min. Typ. Max. Min. Max. Min. Max.
V
Dynamic Low
Voltage Quiet
Output (note 1, 2)
0.6
0.9
0.8
OLP
5.0
V
-0.9
2.0
-0.6
OLV
Dynamic High
Voltage Input
(note 1, 3)
V
C = 50 pF
5.0
5.0
V
IHD
L
Dynamic Low
Voltage Input
(note 1, 3)
V
ILD
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V ), 0V to threshold
ILD
(V ), f=1MHz.
IHD
Figure 3: Test Circuit
C
R
=15/50pF or equivalent (includes jig and probe capacitance)
L
T
= Z
of pulse generator (typically 50Ω)
OUT
5/13
74VHCT273A
Figure 4: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle)
Figure 5: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
6/13
74VHCT273A
Figure 6: Waveform - Recovery Time (f=1MHz; 50% duty cycle)
7/13
74VHCT273A
SO-20 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A1
B
2.35
2.65
0.093
0.104
0.1
0.33
0.23
12.60
7.4
0.30
0.51
0.32
13.00
7.6
0.004
0.013
0.009
0.496
0.291
0.012
0.020
0.013
0.512
0.299
C
D
E
e
1.27
0.050
H
10.00
0.25
0.4
10.65
0.75
1.27
8°
0.394
0.010
0.016
0°
0.419
0.030
0.050
8°
h
L
k
0°
ddd
0.100
0.004
0016022D
8/13
74VHCT273A
TSSOP20 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
0.041
0.012
0.0079
0.260
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
6.6
0.002
0.031
0.007
0.004
0.252
0.244
0.169
0.004
0.039
1
0.19
0.09
6.4
c
D
6.5
6.4
0.256
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0˚
8˚
0˚
8˚
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
0087225C
9/13
74VHCT273A
Tape & Reel SO-20 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
11
1.197
0.433
0.528
0.130
0.161
0.476
Ao
Bo
Ko
Po
P
10.8
13.2
3.1
0.425
0.520
0.122
0.153
0.468
13.4
3.3
3.9
4.1
11.9
12.1
10/13
74VHCT273A
Tape & Reel TSSOP20 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
7
0.882
0.276
0.280
0.075
0.161
0.476
Ao
Bo
Ko
Po
P
6.8
6.9
0.268
0.272
0.067
0.153
0.468
7.1
1.9
4.1
12.1
1.7
3.9
11.9
11/13
74VHCT273A
Table 11: Revision History
Date
Revision
Description of Changes
Order Codes Revision - pag. 1.
16-Dec-2004
3
12/13
74VHCT273A
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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13/13
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