74LVX86TTR [STMICROELECTRONICS]

LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE WITH 5V TOLERANT INPUTS; 低压CMOS四路异或门与5V容限输入
74LVX86TTR
型号: 74LVX86TTR
厂家: ST    ST
描述:

LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE WITH 5V TOLERANT INPUTS
低压CMOS四路异或门与5V容限输入

输入元件
文件: 总11页 (文件大小:235K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74LVX86  
LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE  
WITH 5V TOLERANT INPUTS  
HIGH SPEED:  
= 5.8 ns (TYP.) at V = 3.3V  
t
PD  
CC  
5V TOLERANT INPUTS  
INPUT VOLTAGE LEVEL:  
V =0.8V, V =2V at V =3V  
IL  
IH  
CC  
LOW POWER DISSIPATION:  
= 2 µA (MAX.) at T =25°C  
SOP  
TSSOP  
I
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V = 3.3V  
V
Table 1: Order Codes  
PACKAGE  
OLP  
CC  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4mA (MIN)  
T & R  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
SOP  
74LVX86MTR  
74LVX86TTR  
t
t
PLH  
PHL  
TSSOP  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
V
CC  
power, battery operated and low noise 3.3V  
applications.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage.  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 86  
IMPROVED LATCH-UP IMMUNITY  
POWER DOWN PROTECTION ON INPUTS  
This device can be used to interface 5V to 3V  
system. It combines high speed performance with  
the true CMOS low power consumption. All inputs  
and outputs are equipped with protection circuits  
against static discharge, giving them 2KV ESD  
immunity and transient excess voltage.  
DESCRIPTION  
The 74LVX86 is a low voltage CMOS QUAD  
EXCLUSIVE  
OR  
GATE  
fabricated  
with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology. It is ideal for low  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/11  
August 2004  
74LVX86  
Figure 2: Input Equivalent Circuit  
Table 2: Pin Description  
PIN No  
SYMBOL  
NAME AND FUNCTION  
1, 4, 9, 12  
2, 5, 10, 13  
3, 6, 8, 11  
7
1A to 4A  
1B to 4B  
1Y to 4Y  
GND  
Data Inputs  
Data Inputs  
Data Outputs  
Ground (0V)  
V
14  
Positive Supply Voltage  
CC  
Table 3: Truth Table  
A
B
Y
L
L
L
H
L
L
H
H
L
H
H
H
Table 4: Absolute Maximum Ratings  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage  
-0.5 to +7.0  
-0.5 to +7.0  
V
V
CC  
V
DC Input Voltage  
I
V
DC Output Voltage  
DC Input Diode Current  
DC Output Diode Current  
DC Output Current  
-0.5 to V + 0.5  
V
O
CC  
I
- 20  
± 20  
mA  
mA  
mA  
mA  
°C  
°C  
IK  
I
OK  
I
± 25  
O
I
or I  
DC V or Ground Current  
± 50  
CC  
GND  
CC  
T
Storage Temperature  
-65 to +150  
300  
stg  
T
Lead Temperature (10 sec)  
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is  
not implied.  
Table 5: Recommended Operating Conditions  
Symbol  
Parameter  
Value  
Unit  
V
Supply Voltage (note 1)  
Input Voltage  
2 to 3.6  
0 to 5.5  
V
V
CC  
V
I
V
Output Voltage  
0 to V  
V
O
CC  
T
Operating Temperature  
-55 to 125  
0 to 100  
°C  
ns/V  
op  
Input Rise and Fall Time (note 2) (V = 3.3V)  
dt/dv  
CC  
1) Truth Table guaranteed: 1.2V to 3.6V  
2) V from 0.8V to 2.0V  
IN  
2/11  
74LVX86  
Table 6: DC Specifications  
Test Condition  
Value  
-40 to 85°C -55 to 125°C Unit  
Min. Typ. Max. Min. Max. Min. Max.  
T = 25°C  
Symbol  
Parameter  
A
V
CC  
(V)  
V
High Level Input  
Voltage  
2.0  
3.0  
3.6  
2.0  
3.0  
3.6  
2.0  
1.5  
2.0  
2.4  
1.5  
2.0  
2.4  
1.5  
2.0  
2.4  
IH  
V
V
V
Low Level Input  
Voltage  
0.5  
0.8  
0.8  
0.5  
0.8  
0.8  
0.5  
0.8  
0.8  
IL  
V
High Level Output  
Voltage  
I =-50 µA  
1.9  
2.9  
2.0  
3.0  
1.9  
2.9  
1.9  
2.9  
2.4  
OH  
O
I =-50 µA  
3.0  
3.0  
2.0  
3.0  
3.0  
V
V
O
I =-4 mA  
2.58  
2.48  
O
V
Low Level Output  
Voltage  
I =50 µA  
0.0  
0.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
OL  
O
I =50 µA  
O
I =4 mA  
0.36  
0.44  
0.55  
O
I
Input Leakage  
Current  
I
V = 5V or GND  
3.6  
3.6  
± 0.1  
± 1  
± 1  
µA  
µA  
I
I
Quiescent Supply  
Current  
CC  
V = V or GND  
2
20  
20  
I
CC  
Table 7: Dynamic Switching Characteristics  
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
CC  
(V)  
Min. Typ. Max. Min. Max. Min. Max.  
V
Dynamic Low  
Voltage Quiet  
Output (note 1, 2)  
0.3  
0.5  
OLP  
3.3  
3.3  
V
-0.5  
2
-0.3  
OLV  
V
Dynamic High  
Voltage Input (note  
1, 3)  
IHD  
C = 50 pF  
V
L
V
Dynamic Low  
Voltage Input (note  
1, 3)  
3.3  
0.8  
ILD  
1) Worst case package.  
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.  
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V ), 0V to threshold  
ILD  
(V ), f=1MHz.  
IHD  
3/11  
74LVX86  
Table 8: AC Electrical Characteristics (Input t = t = 3ns)  
r
f
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
C
L
CC  
(V) (pF)  
Min. Typ. Max. Min. Max. Min. Max.  
t
t
Propagation Delay  
Time  
2.7  
2.7  
15  
50  
15  
7.5  
14.5  
1.0  
1.0  
1.0  
17.5  
21.0  
11.0  
1.0  
1.0  
1.0  
17.5  
21.0  
11.0  
PLH PHL  
10.0 18.0  
ns  
ns  
(*)  
5.8  
9.3  
3.3  
3.3  
(*)  
50  
50  
8.3  
0.5  
0.5  
12.8  
1.0  
1.0  
14.5  
1.5  
1.0  
14.5  
1.5  
t
t
Output To Output  
Skew Time (note1,  
2)  
2.7  
OSLH  
(*)  
1.0  
1.5  
1.5  
OSHL  
3.3  
50  
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-  
ing in the same direction, either HIGH or LOW  
2) Parameter guaranteed by design  
(*) Voltage range is 3.3V ± 0.3V  
Table 9: Capacitive Characteristics  
Test Condition  
Value  
T = 25°C  
Symbol  
Parameter  
-40 to 85°C -55 to 125°C Unit  
A
V
CC  
(V)  
Min. Typ. Max. Min. Max. Min. Max.  
C
Input Capacitance  
3.3  
4
10  
10  
10  
pF  
pF  
IN  
C
Power Dissipation  
Capacitance  
(note 1)  
PD  
3.3  
18  
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without  
PD  
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I  
= C x V x f + I /4 (per gate)  
CC(opr)  
PD CC IN CC  
Figure 3: Test Circuit  
C
R
=15/50pF or equivalent (includes jig and probe capacitance)  
L
T
= Z  
of pulse generator (typically 50)  
OUT  
4/11  
74LVX86  
Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)  
5/11  
74LVX86  
SO-14 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
MIN.  
MAX.  
A
A1  
A2  
B
1.35  
1.75  
0.053  
0.069  
0.1  
1.10  
0.33  
0.19  
8.55  
3.8  
0.25  
1.65  
0.51  
0.25  
8.75  
4.0  
0.004  
0.043  
0.013  
0.007  
0.337  
0.150  
0.010  
0.065  
0.020  
0.010  
0.344  
0.157  
C
D
E
e
1.27  
0.050  
H
5.8  
0.25  
0.4  
0°  
6.2  
0.50  
1.27  
8°  
0.228  
0.010  
0.016  
0°  
0.244  
0.020  
0.050  
8°  
h
L
k
ddd  
0.100  
0.004  
0016019D  
6/11  
74LVX86  
TSSOP14 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
1.2  
MIN.  
MAX.  
0.047  
0.006  
0.041  
0.012  
0.0089  
0.201  
0.260  
0.176  
A
A1  
A2  
b
0.05  
0.8  
0.15  
1.05  
0.30  
0.20  
5.1  
0.002  
0.031  
0.007  
0.004  
0.193  
0.244  
0.169  
0.004  
0.039  
1
0.19  
0.09  
4.9  
c
D
5
6.4  
0.197  
0.252  
E
6.2  
6.6  
E1  
e
4.3  
4.4  
4.48  
0.173  
0.65 BSC  
0.0256 BSC  
K
0˚  
8˚  
0˚  
8˚  
L
0.45  
0.60  
0.75  
0.018  
0.024  
0.030  
A2  
A
K
L
b
e
A1  
c
E
D
E1  
PIN 1 IDENTIFICATION  
1
0080337D  
7/11  
74LVX86  
Tape & Reel SO-14 MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
MAX.  
330  
MIN.  
MAX.  
12.992  
0.519  
A
C
12.8  
20.2  
60  
13.2  
0.504  
0.795  
2.362  
D
N
T
22.4  
6.6  
9.2  
2.3  
4.1  
8.1  
0.882  
0.260  
0.362  
0.090  
0.161  
0.319  
Ao  
Bo  
Ko  
Po  
P
6.4  
9
0.252  
0.354  
0.082  
0.153  
0.311  
2.1  
3.9  
7.9  
8/11  
74LVX86  
Tape & Reel TSSOP14 MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
MAX.  
330  
MIN.  
MAX.  
12.992  
0.519  
A
C
12.8  
20.2  
60  
13.2  
0.504  
0.795  
2.362  
D
N
T
22.4  
6.9  
5.5  
1.8  
4.1  
8.1  
0.882  
0.272  
0.217  
0.071  
0.161  
0.319  
Ao  
Bo  
Ko  
Po  
P
6.7  
5.3  
1.6  
3.9  
7.9  
0.264  
0.209  
0.063  
0.153  
0.311  
9/11  
74LVX86  
Table 10: Revision History  
Date  
Revision  
Description of Changes  
Ordering Codes Revision - pag. 1.  
27-Aug-2004  
4
10/11  
74LVX86  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
All other names are the property of their respective owners  
© 2004 STMicroelectronics - All Rights Reserved  
STMicroelectronics group of companies  
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Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
www.st.com  
11/11  

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