74LCX374T [STMICROELECTRONICS]
OCTAL D-TYPE FLIP FLOP NON INVERTING 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS; 八路D型触发器同相三态，容许5V输入和输出
| 型号： | 74LCX374T |
| 厂家： | 
ST |
| 描述： | OCTAL D-TYPE FLIP FLOP NON INVERTING 3-STATE WITH 5V TOLERANT INPUTS AND OUTPUTS |
| 文件： | 总10页 (文件大小：77K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LCX374
OCTAL D-TYPE FLIP FLOP NON INVERTING (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
■
■
5V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED:
fMAX =150MHz(MIN.) atVCC = 3V
■
■
POWER-DOWN PROTECTIONON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
PCI BUSLEVELSGUARANTEED AT 24mA
BALANCEDPROPAGATIONDELAYS:
tPLH tPHL
OPERATING VOLTAGERANGE:
VCC (OPR)= 2.0Vto 3.6V (1.5VDataRetention)
PIN AND FUNCTION COMPATIBLEWITH
74 SERIES374
M
T
(Micro Package)
(TSSOPPackage)
ORDER CODES :
■
■
74LCX374M
74LCX374T
outputs will be set to the logic state that were
setup at the D inputs.
While the (OE) input is low, the 8 outputs will be
in a normal state (high or low logic level) and
while high level the outputs will be in a high
impedance state.
■
■
■
■
LATCH-UPPERFORMANCE EXCEEDS500mA
ESDPERFORMANCE:
HBM >2000V; MM > 200V
The output control does not affect the internal
operation of flip flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
It has same speed performance at 3.3V than 5V,
AC/ACT family, combined with a lower power
consumption. It has better speed performance at
3.3V than 5V LSTTL family combined with the
true CMOS low power consumption.
DESCRIPTION
The LCX374 is a low voltage CMOS OCTAL
D-TYPE FLIP FLOP with 3 STATE OUTPUT
NON INVERTING fabricated with sub-micron
silicon gate and double-layermetal wiring C2MOS
technology. It is ideal for low power and high
speed applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
These 8 bit D-Type flip-flops are controlled by a
clock input (CK)and an output enable input (OE).
On the positive transition of the clock, the Q
PIN CONNECTION AND IEC LOGIC SYMBOLS
1/10
February 1999
74LCX374
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
PIN No
SYMBOL NAME AND FUNCTION
INPUTS
OUTPUTS
1
OE
3 State Output Enable
Input (Active LOW)
OE
H
CK
D
X
X
L
Q
X
Z
2, 5, 6, 9,
12, 15, 16,
19
Q0 to Q7 3 State Outputs
L
NO CHANGE
L
L
L
H
H
3, 4, 7, 8,
13, 14, 17,
18
D0 to D7 Data Inputs
X:”H” or”L”
Z: High Impedance
11
CLOCK
Clock Input (LOW to
HIGH, edge triggered)
10
20
GND
VCC
Ground (0V)
Positive Supply Voltage
LOGIC DIAGRAM
2/10
74LCX374
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
VI
Parameter
Value
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to + 7.0
-0.5 to VCC + 0.5
- 50
Unit
V
Supply Voltage
DC Input Voltage
V
VO
DC Output Voltage (OFF state)
DC Output Voltage (High or Low State) (note1)
DC Input Diode Current
V
VO
V
IIK
mA
mA
mA
mA
mA
oC
oC
IOK
DC Output Diode Current (note2)
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
50
50
±
±
IO
ICC
± 100
± 100
IGND
Tstg
TL
-65 to +150
300
Lead Temperature (10 sec)
AbsoluteMaximum Ratingsarethose values beyond whichdamage tothe device may occur. Functional operation under these condition isnot implied.
1)IO absolute maximum ratingmustbeobserved
2)VO < GND, VO >VCC
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Value
2.0 to 3.6
0 to 5.5
0 to 5.5
0 to VCC
± 24
Unit
V
Supply Voltage (note 1)
Input Voltage
VI
V
VO
Output Voltage (OFF state)
V
VO
Output Voltage (High or Low State)
V
IOH, IOL
IOH, IOL
Top
High or Low Level Output Current (VCC = 3.0 to 3.6V)
High or Low Level Output Current (VCC = 2.7 to 3.0V)
Operating Temperature:
mA
mA
oC
ns/V
± 12
-40 to +85
0 to 10
dt/dv
Input Transition Rise or Fall Rate (VCC = 3.0V) (note 2)
1)TruthTable guaranteed: 1.5V to3.6V
2)VIN from0.8Vto2.0V
3/10
74LCX374
DC SPECIFICATIONS
Symbol
Parameter
Test Conditions
Value
-40 to 85 oC
Unit
VCC
(V)
Min.
Max.
VIH
VIL
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
2.0
V
V
2.7 to 3.6
0.8
VOH
2.7 to 3.6
2.7
IO=-100 µA VCC-0.2
VI =
VIH or
VIL
IO=-12 mA
IO=-18 mA
IO=-24 mA
IO=100 µA
IO=12 mA
IO=16 mA
IO=24 mA
2.2
2.4
2.2
V
3.0
VOL
Low Level Output Voltage
2.7 to 3.6
2.7
0.2
0.4
0.4
0.55
±5
VI =
VIH or
VIL
V
3.0
3.0
II
Input Leakage Current
VI = 0 to 5.5 V
µA
µA
2.7 to 3.6
2.7 to 3.6
IOZ
3 State Output Leakage Current
VI = VIH or VIL
VO = 0 to 5.5V
±5
Ioff
Power Off Leakage Current
Quiescent Supply Current
0
VI or VO = 5.5V
VI = VCC or GND
100
10
µA
µA
ICC
2.7 to 3.6
VI or VO
=
10
±
3.6 to 5.5V
∆ICC
ICC incr. per input
2.7 to 3.6
VIH = VCC -0.6V
500
µA
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
(V)
Min. Typ. Max.
VOLP Dynamic Low Voltage Quiet Output
3.3
CL = 50 pF
VIL = 0 V
VIH = 3.3V
0.8
V
(note 1)
VOLV
-0.8
1)Number ofoutputs defined as”n”. Measured with”n-1”outputs switchingfrom HIGHtoLOWor LOW toHIGH. The remaining output ismeasured in
theLOW state.
4/10
74LCX374
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, RL = 500 Ω, Input tr = t = 2.5 ns)
f
Symbol
Parameter
Test Condition
Value
-40 to 85 oC
Unit
VCC
Waveform
(V)
Min. Max.
tPLH
tPHL
Propagation Delay Time
2.7
3.0 to 3.6
2.7
1.5
1.5
1.5
1.5
1.5
1.5
2.5
2.5
1.5
1.5
3.3
3.3
150
9.5
8.5
9.5
8.5
8.5
7.5
1
2
2
1
1
ns
ns
ns
ns
ns
ns
tPZL
tPZH
Output Enable Time to HIGH and LOW
level
3.0 to 3.6
2.7
tPLZ
tPHZ
Output Disable Time from HIGh and
LOW level
3.0 to 3.6
2.7
ts
Setup Time, HIGh or LOW level Dn to
CK
3.0 to 3.6
2.7
th
Hold Time, HIGh or LOW level Dn to CK
CK Pulse Width, HIGH or LOW
Clock Pulse Frequency
3.0 to 3.6
2.7
tw
3
1
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
fMAX
MHz
ns
tOSLH Output to Output Skew Time (note 1, 2)
tOSHL
1.0
1) Skewis defined astheabsolute value ofthe difference between theactual propagation delay for any twooutputs of thesame device switching inthe
same direction, either HIGHor LOW (tOSLH = |tPLHm -tPLHn|,tOSHL =|tPHLm -tpHLn|)
2) Parameter guaranteed bydesign
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
TA = 25 oC
Unit
VCC
(V)
Min. Typ. Max.
CIN
Input Capacitance
VIN = 0 to VCC
VIN = 0 to VCC
6
3.3
3.3
3.3
pF
pF
pF
COUT Output Capacitance
CPD Power Dissipation Capacitance (note 1)
12
32
fIN = 10MHz
VIN = 0 or VCC
1)CPD isdefined as thevalue ofthe IC’sinternal equivalent capacitance whichiscalculated fromthe operating current consumption without load. Average
operting current canbe obtained bythe followingequation. ICC(opr)= CPD • VCC • fIN +ICC/8(per Flip-Flop)
5/10
74LCX374
TEST CIRCUIT
TEST
SWITCH
Open
6V
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
GND
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL =R1 =500Ω orequivalent
RT = ZOUT ofpulse generator (typically50Ω)
WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cicle)
6/10
74LCX374
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES
(f=1MHz; 50% duty cicle)
WAVEFORM 3: PULSE WIDTH
7/10
74LCX374
SO-20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
2.65
0.20
2.45
0.49
0.32
MIN.
MAX.
0.104
0.007
0.096
0.019
0.012
A
a1
a2
b
0.10
0.004
0.35
0.23
0.013
0.009
b1
C
0.50
0.020
c1
D
45 (typ.)
12.60
10.00
13.00
10.65
0.496
0.393
0.512
0.419
E
e
1.27
0.050
0.450
e3
F
11.43
7.40
0.50
7.60
1.27
0.75
0.291
0.19
0.299
0.050
0.029
L
M
S
8 (max.)
P013L
8/10
74LCX374
TSSOP20 MECHANICAL DATA
mm
inch
TYP.
DIM.
MIN.
TYP.
MAX.
1.1
MIN.
MAX.
0.433
0.006
0.374
0.0118
0.0079
0.260
0.256
0.176
A
A1
A2
b
0.05
0.85
0.19
0.09
6.4
0.10
0.9
0.15
0.95
0.30
0.2
0.002
0.335
0.0075
0.0035
0.252
0.246
0.169
0.004
0.354
c
D
6.5
6.4
6.6
0.256
0.252
E
6.25
4.3
6.5
E1
e
4.4
4.48
0.173
0.65 BSC
4o
0.0256 BSC
4o
K
0o
8o
0o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
9/10
74LCX374
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China -France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
http://www.st.com
.
10/10
相关型号：
74LCX374_08
74LCX374 Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
FAIRCHILD
©2020 ICPDF网 联系我们和版权申明