74LCX138 [STMICROELECTRONICS]
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV) WITH 5V TOLERANT INPUTS; 低电压CMOS 3-8线译码器（ INV ）具有5V容限输入
| 型号： | 74LCX138 |
| 厂家： | 
ST |
| 描述： | LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV) WITH 5V TOLERANT INPUTS |
| 文件： | 总12页 (文件大小：303K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LCX138
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)
WITH 5V TOLERANT INPUTS
■
■
5V TOLERANT INPUTS
HIGH SPEED:
= 6.7ns (MAX.) at V = 3V
t
PD
CC
■
■
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
SOP
TSSOP
|I | = I = 24mA (MIN) at V = 3V
OH
OL
CC
■
■
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
Table 1: Order Codes
PACKAGE
t
t
PLH
PHL
■
OPERATING VOLTAGE RANGE:
(OPR) = 2.0V to 3.6V (1.5V Data
T & R
V
CC
SOP
74LCX138MTR
74LCX138TTR
Retention)
TSSOP
■
■
■
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
inhibited and all the 8 outputs go to high.
Three enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74LCX138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
2
wiring C MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for inputs.
If the device is enabled, 3 binary select inputs (A,
B and C) determine which one of the outputs will
Figure 1: Pin Connection And IEC Logic Symbols
Rev. 4
1/12
September 2004
74LCX138
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
NAME AND FUNCTION
Address Inputs
1, 2, 3
A, B, C
G2A, G2B
G1
4, 5
Enable Inputs
Enable Input
6
15, 14, 13, 12, 11, 10, 9, 7
Y0 to Y7
GND
Outputs
8
Ground (0V)
16
V
Positive Supply Voltage
CC
Table 3: Truth Table
INPUTS
OUTPUTS
ENABLE
G2A
SELECT
B
G2B
G1
C
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
L
L
L
L
L
L
L
L
X
H
X
L
L
L
L
L
L
L
L
L
X
X
X
L
X
X
X
L
X
X
X
L
H
H
H
L
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
L
X
X
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
H
H
H
H
X : Don’t Care
2/12
74LCX138
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
Table 4: Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
V
V
CC
V
DC Input Voltage
I
V
DC Output Voltage (V = 0V)
V
O
CC
V
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
-0.5 to V + 0.5
V
O
CC
I
- 50
- 50
mA
mA
mA
mA
mA
°C
°C
IK
I
DC Output Diode Current (note 2)
DC Output Current
OK
I
± 50
O
I
DC Supply Current per Supply Pin
DC Ground Current per Supply Pin
Storage Temperature
± 100
± 100
-65 to +150
300
CC
I
GND
T
stg
T
Lead Temperature (10 sec)
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I absolute maximum rating must be observed
O
2) V < GND
O
3/12
74LCX138
Table 5: Recommended Operating Conditions
Symbol
Parameter
Value
Unit
V
Supply Voltage (note 1)
Input Voltage
2.0 to 3.6
0 to 5.5
0 to 5.5
V
V
CC
V
I
V
Output Voltage (V = 0V)
V
O
CC
V
Output Voltage (High or Low State)
0 to V
V
O
CC
I
I
, I
High or Low Level Output Current (V = 3.0 to 3.6V)
± 24
± 12
mA
mA
°C
ns/V
OH OL
CC
, I
High or Low Level Output Current (V = 2.7V)
OH OL
CC
T
Operating Temperature
-55 to 125
0 to 10
op
dt/dv
Input Rise and Fall Time (note 2)
1) Truth Table guaranteed: 1.5V to 3.6V
2) V from 0.8V to 2V at V = 3.0V
IN
CC
Table 6: DC Specifications
Test Condition
Value
Symbol
Parameter
-40 to 85 °C
Min. Max.
-55 to 125 °C
Unit
V
(V)
CC
Min.
Max.
V
High Level Input
Voltage
IH
2.0
2.0
V
V
2.7 to 3.6
V
Low Level Input
Voltage
IL
0.8
0.8
V
High Level Output
Voltage
I =-100 µA
V
-0.2
V
-0.2
2.7 to 3.6
2.7
OH
O
CC
CC
I =-12 mA
2.2
2.4
2.2
2.2
O
V
V
I =-18 mA
2.4
2.2
O
3.0
I =-24 mA
O
V
Low Level Output
Voltage
I =100 µA
2.7 to 3.6
2.7
0.2
0.4
0.2
0.4
OL
O
I =12 mA
O
I =16 mA
0.4
0.4
O
3.0
I =24 mA
0.55
0.55
O
I
Input Leakage
Current
I
V = 0 to 5.5V
2.7 to 3.6
0
± 5
± 5
µA
µA
I
I
Power Off Leakage
Current
off
V or V = 5.5V
10
10
I
O
I
Quiescent Supply
Current
V = V or GND
I CC
10
10
CC
2.7 to 3.6
2.7 to 3.6
µA
µA
V or V = 3.6 to 5.5V
± 10
500
± 10
500
I
O
∆I
I
incr. per Input
V
= V - 0.6V
CC
CC
IH
CC
Table 7: Dynamic Switching Characteristics
Test Condition
Value
T = 25 °C
Symbol
Parameter
Unit
A
V
CC
(V)
Min.
Typ.
Max.
V
Dynamic Low Level Quiet
Output (note 1)
0.8
C = 50pF
OLP
L
3.3
V
V
= 0V, V = 3.3V
V
IL
IH
-0.8
OLV
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
4/12
74LCX138
Table 8: AC Electrical Characteristics
Test Condition
Value
-55 to 125 °C
Symbol
Parameter
-40 to 85 °C
Unit
V
C
R
t = t
CC
L
L
s
r
(V)
(pF)
(Ω)
500
500
(ns)
Min.
Max.
Min.
Max.
t
t
t
t
Propagation Delay
Time A, B, C to Y
2.7
7.9
6.7
6.4
5.8
7.4
6.5
1.0
7.9
6.7
6.4
5.8
7.4
6.5
1.0
PLH PHL
50
2.5
ns
ns
3.0 to 3.6
2.7
1.5
1.5
1.5
1.5
1.5
1.5
t
Propagation Delay
Time G1 to Y
PLH PHL
50
2.5
3.0 to 3.6
2.7
t
Propagation Delay
Time G2 to Y
PLH PHL
50
50
500
500
2.5
2.5
ns
ns
3.0 to 3.6
3.0 to 3.6
t
t
Output To Output
Skew Time (note1,
2)
OSLH
OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
2) Parameter guaranteed by design
= | t
- t
|, t
= | t
- t
|)
OSLH
PLHm PLHn OSHL
PHLm PHLn
Table 9: Capacitive Characteristics
Test Condition
Value
T = 25 °C
Symbol
Parameter
Unit
A
V
CC
(V)
Min.
Typ.
Max.
C
Input Capacitance
V
= 0 to V
IN CC
3.3
3.3
6
pF
pF
IN
C
Power Dissipation Capacitance
(note 1)
f
= 10MHz
42
PD
IN
IN
V
= 0 or V
CC
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
= C x V x f + I
CC(opr)
PD CC IN CC
Figure 4: Test Circuit
C
R
R
= 50pF or equivalent (includes jig and probe capacitance)
= 500Ω or equivalent
L
L
T
= Z
of pulse generator (typically 50Ω)
OUT
5/12
74LCX138
Figure 5: Waveform - Propagation Delays For Inverting Outputs (f=1MHz; 50% duty cycle)
Figure 6: Waveform - Propagation Delays For Non-inverting Outputs (f=1MHz; 50% duty cycle)
6/12
74LCX138
SO-16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.75
0.25
1.64
0.46
0.25
MIN.
MAX.
0.068
0.010
0.063
0.018
0.010
A
a1
a2
b
0.1
0.004
0.35
0.19
0.013
0.007
b1
C
0.5
0.019
c1
D
45° (typ.)
9.8
5.8
10
0.385
0.228
0.393
0.244
E
6.2
e
1.27
8.89
0.050
0.350
e3
F
3.8
4.6
0.5
4.0
5.3
0.149
0.181
0.019
0.157
0.208
0.050
0.024
G
L
1.27
0.62
M
S
8° (max.)
0016020D
7/12
74LCX138
TSSOP16 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
0.041
0.012
0.0079
0.201
0.260
0.176
A
A1
A2
b
0.05
0.8
0.15
1.05
0.30
0.20
5.1
0.002
0.031
0.007
0.004
0.193
0.244
0.169
0.004
0.039
1
0.19
0.09
4.9
c
D
5
6.4
0.197
0.252
E
6.2
6.6
E1
e
4.3
4.4
4.48
0.173
0.65 BSC
0.0256 BSC
K
0˚
8˚
0˚
8˚
L
0.45
0.60
0.75
0.018
0.024
0.030
A2
A
K
L
b
e
A1
c
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
8/12
74LCX138
Tape & Reel SO-16 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
6.65
10.5
2.3
0.882
0.262
0.414
0.090
0.161
0.319
Ao
Bo
Ko
Po
P
6.45
10.3
2.1
0.254
0.406
0.082
0.153
0.311
3.9
4.1
7.9
8.1
9/12
74LCX138
Tape & Reel TSSOP16 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
22.4
6.9
5.5
1.8
4.1
8.1
0.882
0.272
0.217
0.071
0.161
0.319
Ao
Bo
Ko
Po
P
6.7
5.3
1.6
3.9
7.9
0.264
0.209
0.063
0.153
0.311
10/12
74LCX138
Table 10: Revision History
Date
Revision
Description of Changes
Ordering Codes Revision - pag. 1.
15-Sep-2004
4
11/12
74LCX138
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
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12/12
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