SS6526-0CNTR [SSC]
Dual USB High-Side Power Switch; 双USB高侧电源开关
| 型号： | SS6526-0CNTR |
| 厂家： | 
SILICON STANDARD CORP. |
| 描述： | Dual USB High-Side Power Switch |
| 文件： | 总12页 (文件大小：480K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SS6526
Dual USB High-Side Power Switch
ꢀFEATURES
DESCRIPTION
ꢀ
• 110mΩ (5V Input) High-Side MOSFET Switch.
ꢁ 500mA Continuous Load Current per Channel.
ꢁ 110µA Typical On-State Supply Current.
ꢁ 1µA Typical Off-State Supply Current.
ꢁ Current-Limit / Short Circuit Protection.
ꢁ Thermal Shutdown Protection under Overcurrent
Condition.
The SS6526 is a dual high-side power switch
for self-powered and bus-powered Universal
Serial Bus (USB) applications. Both high-side
switches are MOSFET with 110m Ω RDS(ON)
,
which meets USB voltage drop requirements for
maximum transmission wire length.
Multi-purpose open-drain fault flag output
indicates
over-current
limiting,
thermal
ꢁ Undervoltage Lockout Ensures that Switch is off
at Start Up.
shutdown, or undervoltage lockout for each
channel. Output current is typically limited to 1A,
and the thermal shutdown functions of the
power switches independently control their
channel under overcurrent condition.
ꢁ Output can be Forced Higher than Input
(Off-State).
ꢁ Open-Drain Fault Flag.
ꢁ Slow Turn ON and Fast Turn OFF.
ꢁ Enable Active-High or Active-Low.
Guaranteed minimum output rise time limits
inrush current during hot plug-in as well as
minimizing EMI and prevents the voltage at
upstream port from dropping excessively.
ꢀAPPLICATIONS
ꢁ USB Power Management.
ꢁ Hot Plug-In Power Supplies.
ꢁ Battery-Charger Circuit.
Pb-free; RoHS-compliant
10/23/2007 Rev.1.00
www.SiliconStandard.com
1
SS6526
ꢀTYPICAL APPLICATION CIRCUIT
VCC
5.0V
+
10K
10K
33µF
4.50V to 5.25V
Upstream VBUS
100mA max
Ferrite
Bead
SS6722
IN OUT
USB Controller
AIC1526
VBUS
D+
ON/OFF
VIN
VBUS
D+
CTLA
FLGA
FLGB
OUTA
+
+
OVERCURRENT
OVERCURRENT
IN
33µF
*
+
1µF
CIN
0.1µF
0.01µF
10µF
COUT
D-
D-
GND
GND
GND
GND
ON
/
CTLB
OUTB
GND
DATA
DATA
VBUS
D+
*
33µF, 16V Tantalum, or
100µF, 10V Electrolytic
Bold line indicate high- current traces
+
33µF
*
0.01µF
D-
GND
DATA
Two-Port Self-Powered Hub
ORDERING INFORMATION
ꢀ
SS6526 - XXXXX
PIN CONFIGURATION
DIP-8
SOP-8
TOP VIEW
PACKING TYPE
TR: TAPE & REEL
TB: TUBE
1
OUTA
IN
CTLA
8
7
6
PACKAGING TYPE
N: DIP-8
S: SOP-8
2
3
FLGA
FLGB
CTLB
GND
OUTB
5
4
O: MSOP-8
MSOP-8
TOP VIEW
C: Commercial
G: Lead Free Commercial
1
OUTA
IN
CTLA
8
7
6
CONTROL POLARITY
0: Active Low
1: Active High
2
3
FLGA
FLGB
CTLB
OUTB
GND
5
4
Example: SS6526-0CSTR
ꢁ Active Low Version, in SOP-8 Package & Taping
& Reel Packing Type
(CN is not available in TR packing)
SS6526-1PSTR
ꢁ Active High Version, in Lead Free SOP-8 Package
& Taping & Reel Packing Type
10/23/2007 Rev.1.00
www.SiliconStandard.com
2
SS6526
ꢀABSOLUTE MAXIMUM RATINGS
Supply Voltage (VIN)
7.0V
7.0V
Fault Flag Voltage (VFLG
Fault Flag Current (IFLG
Control Input (VCTL
)
)
50mA
)
-0.3V ~7V
-40°C~85°C
125°C
Operating Temperature Range
Junction Temperature
Storage Temperature Range
-65°C ~ 150°C
260°C
Lead Temperature (Soldering, 10sec)
Thermal Resistance, θJA (Junction to Ambient) DIP-8
100°C/W
160°C/W
180°C/W
(Assume no Ambient Airflow, no Heatsink)
SOP-8
MSOP-8
Thermal Resistance, θJC (Junction to Case)
DIP-8……………………………………..60°C /W
SOP-8……………………………………40°C /W
MSOP-8………………………………….75°C /W
Absolute Maximum Ratings are those values beyond which the life of a device may be
impaired.
ꢀTEST CIRCUIT
VCC
+5V
10K R1
10K R2
ON
10Ω
CTLA
FLGA
OUTA
IN
R4
OFF
0.1µF
C1
FLGB
CTLB
GND
10Ω
ON
OUTB
R4
OFF
SS6526
10/23/2007 Rev.1.00
www.SiliconStandard.com
3
SS6526
ꢀELECTRICAL CHARACTERISTICS
(VIN= 5V, TA=25°C, unless otherwise specified.) (Note 1)
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VCTL =Logic “0”, OUT=Open
VCTL =Logic “1”, OUT=Open
VCTL =Logic “0”
0.75
110
5
Supply Current
µA
160
0.8
Control Input Voltage
Control Input Current
V
VCTL =Logic “1”
2.4
VCTL =Logic “0”
0.01
0.01
1
1
1
µA
VCTL =Logic “1”
Control Input Capacitance
Output MOSFET Resistance
Output Turn-On Rise Delay
Output Turn-On Rise Time
Output Turn-Off Delay
Output Turn-Off Fall Time
Output Leakage Current
Current Limit Threshold
Over Temperature Shutdown
Threshold
pF
mΩ
µS
µS
µS
µS
µA
A
110
100
1000
0.8
150
RL = 10Ω each Output
RL = 10Ω each Output
RL = 10Ω each Output
RL = 10Ω each Output
2500
20
0.7
20
10
0.6
1.0
135
125
10
1.25
TJ Increasing
°C
TJ Decreasing
VIN = 5V, IL =10 mA
VIN = 3.3V, IL =10mA
VFLG = 5V
25
40
1
Error Flag Output Resistance
Error Flag Off Current
UVLO Threshold
Ω
µA
V
15
0.01
VIN Increasing
VIN Decreasing
2.6
2.4
Note 1: Specifications are production tested at TA=25°C. Specifications over the -40°C to 85°C operating
temperature range are assured by design, characterization and correlation with Statistical Quality
Controls (SQC).
10/23/2007 Rev.1.00
www.SiliconStandard.com
4
SS6526
ꢀTYPICAL PERFORMANCE CHARACTERISTICS
118
150
140
130
120
110
100
90
116
114
112
110
108
106
104
RL=47Ω
TA=25°C
RL=47Ω
TA=25°C
80
5.5
3.0
3.5
4.0
4.5
5.0
100
-40
-20
0
20
40
60
80
Supply Voltage (V)
Temperature (°C)
Fig. 2 Output On Resistance vs. Temperature
Fig. 1 ON Resistance vs. Supply Voltage
3.0
2.8
2.6
2.4
2.2
2.0
160
140
120
100
80
Rising
Falling
Both Switches ON
60
-40
-20
0
20
40
60
80
100
3
4
5
6
7
8
Temperature (°C)
Fig. 3 UVLO Threshold Voltage vs. Temperature
Supply Voltage (V)
Fig. 4 ON-State Supply Current vs. Supply Voltage
0.10
130
0.08
0.06
0.04
0.02
0
120
110
100
90
Both Switches OFF
Both Switches ON
80
-40
-20
0
20
40
60
80
-40
-20
0
20
40
60
80
100
100
°
Temperature ( C)
Fig. 6 OFF-State Current vs. Temperature
Temperature (°C)
Fig. 5 ON State Current vs. Temperature
10/23/2007 Rev.1.00
www.SiliconStandard.com
5
SS6526
ꢀTYPICAL PERFORMANCE CHARACTERISTICS (Continued)
0.10
0.08
0.06
0.04
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
VEN Rising
Both Switches OFF
VEN Falling
0.02
0
3.0
3.5
4.0
4.5
5.0
5.5
3
4
5
6
7
8
Supply Voltage (V)
Supply Voltage (V)
Fig. 8 Control Threshold vs. Supply Voltage
Fig. 7 OFF-State Current vs. Supply Voltage
6
4
FLG
2
0
V
OUT
5
3
1A
RL=47Ω
1
I
OUT
-1
0.0
0.5
1.0
1.5
2.0
2.5
Time (mS)
Fig. 9 Turn-On, Turn-Off Characteristics
Fig. 10 Current Limit Response
10/23/2007 Rev.1.00
www.SiliconStandard.com
6
SS6526
BLOCK DIAGRAM
ꢀ
OUTA
FLGA
CTLA
Driver
Current
Limit
Charge
Pump
CS
CS
Thermal
Shutdown
UVLO
IN
Current
Limit
Charge
Pump
CTLB
FLGB
Driver
OUTB
ꢀPIN DESCRIPTIONS
PIN 1: CTLA - Controls the turn-on/turn-off of
channel A MOSFET with TTL as
a control input. Active high for
SS6526-1 and active low for
SS6526-0.
PIN 4: CTLB - Controls the turn-on/turn-off of
channel B MOSFET with TTL
as a control input. Active High
for SS6526-1 and active low
for SS6526-0.
PIN 2: FLGA - An active-low and open-drained
fault flag output for channel A.
FLGA is an indicator for current
limit when CTLA is active. In
normal mode operation (CTLA
or/and CLTB is active), it also
can indicate thermal shutdown
or undervoltage.
PIN 5: OUTB - Channel B MOSFET switch
output.
PIN 6: GND - Chip power ground.
PIN 7: IN
- Power supply input.
PIN 8: OUTA - Channel A MOSFET switch
output.
PIN 3: FLGB - An active-low and open-drained
fault flag output for channel B.
FLGB is an indicator for current
limit when CTLB is active. In
normal mode operation (CTLB
or/and CLTA is active), it also
can indicate thermal shutdown
or undervoltage.
10/23/2007 Rev.1.00
www.SiliconStandard.com
7
SS6526
ꢀAPPLICATION INFORMATION
ꢁ Error Flag
ꢁ Supply Filtering
A 0.1µF to 1µF bypass capacitor from IN to GND,
located near the device, is strongly
An error Flag is an open-drained output of an
N-channel MOSFET. FLG output is pulled low to
signal the following fault conditions: input
undervoltage, output current limit, and thermal
shutdown.
recommended to control supply transients.
Without a bypass capacitor, an output short may
cause sufficient ringing on the input (from supply
lead inductance) to damage internal control
circuitry.
ꢁ Current Limit
The current limit threshold is preset internally. It
protects the output MOSFET switches from
damage resulting from undesirable short circuit
conditions or excess inrush current, which is
often encountered during hot plug-in. The low
limit of the current limit threshold of the SS6526
allows a minimum current of 0.6A through the
MOSFET switches. The error flag signals when
any current limit conditions occur.
ꢁ Transient Requirements
USB supports dynamic attachment (hot plug-in)
of peripherals. A current surge is caused by the
input capacitance of downstream device. Ferrite
beads are recommended in series with all power
and ground connector pins. Ferrite beads
reduce EMI and limit the inrush current during
hot-attachment by filtering high-frequency
signals.
ꢁ Thermal Shutdown
ꢁ Short Circuit Transient
When temperature of SS6526 exceeds 135°C
for any reasons, the thermal shutdown function
turns both MOSFET switches off and signals the
error flag. A hysteresis of 10°C prevents the
MOSFETs from turning back on until the chip
temperature drops below 125°C. However, if
thermal shutdown is triggered by chip
temperature rise resulting from overcurrent fault
condition of either one of the MOSFET switches,
the thermal shutdown function will only turn off
the switch that is in overcurrent condition and
the other switch can still remain its normal
operation. In other words, the thermal shutdown
function of the two switches is independent of
each other in the case of overcurrent fault.
Bulk capacitance provides the short-term
transient
current
needed
during
a
hot-attachment event. A 33µF/16V tantalum or a
100µF/10V electrolytic capacitor mounted close
to downstream connector each port should
provide transient drop protection.
ꢁ Printed Circuit Layout
The power circuitry of USB printed circuit boards
requires a customized layout to maximize
thermal dissipation and to minimize voltage drop
and EMI.
10/23/2007 Rev.1.00
www.SiliconStandard.com
8
SS6526
ꢀAPPLICATION CIRCUIT
USB
Controller
AIC1526
CTLA
1
8
7
6
5
Vbus
OUTA
IN
Vbus
2
3
FLGA
FLGB
CTLB
0.1uF
33uF
Downstream
USB Device
USB Host
GND
OUTB
4.7uF
4
GND
GND
Bus Powered Hub
Cable
Cable
Fig. 11 Soft Start (Single Channel)
USB
Controller
SS6526
1
2
3
4
8
7
6
5
USB
Vbus
CTLA
FLGA
FLGB
CTLB
OUTA
IN
Device
USB Host
GND
GND
OUTB
4.7uF
0.1uF 33uF
USB
Device
33uF
USBPeripheral
Cable
Fig. 12 Inrush Current-Limit Application
10/23/2007 Rev.1.00
www.SiliconStandard.com
9
SS6526
ꢀPHYSICAL DIMENSIONS (unit: mm)
ꢁ
SOP-8
D
S
Y
M
B
O
L
SOP-8
MILLIMETERS
MIN.
1.35
MAX.
1.75
A
A1
B
0.10
0.33
0.19
4.80
0.25
0.51
0.25
5.00
C
D
A
A
SEE VIEW B
e
E
e
3.80
4.00
1.27 BSC
H
h
L
5.80
6.20
0.25
0.40
0°
0.50
1.27
8°
B
θ
WITH PLATING
BASE METAL
GAUGE PLANE
SEATING PLANE
L
VIEW B
Note:
1.Refer to JEDEC MS-012AA.
2.Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6
mil per side.
3.Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash or protrusion shall not exceed 10 mil per side.
4.Controlling dimension is millimeter, converted inch dimensions
are not necessarily exact.
10/23/2007 Rev.1.00
www.SiliconStandard.com
10
SS6526
ꢀ
DIP-8
E
D
S
Y
M
B
O
L
DIP-8
MILLIMETERS
MIN.
MAX.
5.33
GAUGE PLANE
A
A1
A2
b
0.38
2.92
0.36
1.14
4.95
0.56
1.78
b2
eA
eB
c
0.20
9.01
0.35
D
10.16
D1
E
0.13
7.62
6.10
8.26
7.11
b
E1
WITH PLATING
BASE METAL
e
2.54 BSC
7.62 BSC
eA
eB
L
A
A
e
D1
10.92
3.81
SECTION A-A
b2
2.92
Note:
1.Refer to JEDEC MS-001BA.
2.Dimension D, D1 and E1 do not include mold flash or
protrusions. Mold flash or protrusion shall not exceed 10 mil.
3.Controlling dimension is millimeter, converted inch dimensions
are not necessarily exact.
10/23/2007 Rev.1.00
www.SiliconStandard.com
11
SS6526
ꢀ
MSOP-8
D
S
Y
M
B
O
L
MSOP-8
MILLIMETERS
MIN.
MAX.
1.10
A
A1
A2
b
0.05
0.75
0.25
0.13
2.90
0.15
0.95
0.40
0.23
3.10
c
D
A
A
E
4.90 BSC
0.65 BSC
SEE VIEW B
e
E1
2.90
3.10
e
L
0.40
0°
0.70
6°
θ
b
WITH PLATING
BASE METAL
SECTION A-A
L
VIEW B
Note:
1. Refer to JEDEC MO-187AA.
2. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 6
mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per
side.
4. Controlling dimension is millimeter, converted inch dimensions
are not necessarily exact.
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
10/23/2007 Rev.1.00
www.SiliconStandard.com
12
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