USB97C211-NE [SMSC]
USB 2.0 Flash Media Controller; USB 2.0闪存介质控制器
| 型号： | USB97C211-NE |
| 厂家： | 
SMSC CORPORATION |
| 描述： | USB 2.0 Flash Media Controller |
| 文件： | 总24页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
USB97C211
ADVANCE INFORMATION
Rev 1.3
USB 2.0 Flash Media Controller
FEATURES
ꢀ
8051 8 bit microprocessor
ꢀ
ꢀ
Complete USB Specification 2.0 Compatibility
-
Provides low speed control functions
30 Mhz execution speed at 4 cycles per
instruction average
-
-
Includes USB 2.0 Transceiver
-
-
-
A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
12K Bytes of internal SRAM for general purpose
scratchpad
Complete System Solution for interfacing
CompactFlash (CF) and SmartMedia (SM)
devices to USB 2.0 bus*
768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-
flashing external ROM
-
Supports USB Bulk Only Mass Storage
Compliant Bootable BIOS
ꢀ
ꢀ
Double Buffered Bulk Endpoint
-
Support for the following devices:
-
-
-
Bi-directional 512 Byte Buffer for Bulk Endpoint
64 Byte RX Control Endpoint Buffer
-
-
CF: 300K – 15MB/sec
SM: 2M –15MB/sec
64 Byte TX Control Endpoint Buffer
-
Support for simultaneous operation of both the
above devices.
External Program Memory Interface
-
-
64K Byte Code Space
-
Enhanced CF support to allow true sequential
read operations to improve throughput
Flash, SRAM, or EPROM Memory
ꢀ
ꢀ
On Board 12Mhz Crystal Driver Circuit
Internal PLL for 480Mhz USB2.0 Sampling, 30Mhz
MCU clock
ꢀ
16 GPIOs for special function use: LED indicators,
button inputs, power control to memory devices, etc.
-
Inputs capable of generating interrupts with
either edge sensitivity
ꢀ
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
128 Pin TQFP (1.0 mm height package) or QFP
Package
-
One GPIO has automatic 1 sec toggle capability
for flashing an LED indicator.
ꢀ
ꢀ
ꢀ
ORDERING INFORMATION
Order Number(s):
USB97C211-NE for TQFP Package
USB97C211-NC for QFP Package
SMSC USB97C211
Page 1
Revision 1.3 (11-05-03)
DATASHEET
© STANDARD MICROSYSTEMS CORPORATION (SMSC) 2003
80 Arkay Drive
Hauppauge, NY 11788
(631) 435-6000
FAX (631) 273-3123
Standard Microsystems and SMSC are registered trademarks of Standard Microsystems Corporation. Product names and company names are the
trademarks of their respective holders. Circuit diagrams utilizing SMSC products are included as a means of illustrating typical applications;
consequently complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is
believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product
descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The
provision of this information does not convey to the purchaser of the semiconductor devices described any licenses under the patent rights of SMSC
or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard
Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request.
SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause
or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further
testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale
Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND
ALL WARRANTIES ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE.
IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES,
OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON
CONTRACT, TORT, NEGLIGENCE OF SMSC OR OTHERS, STRICT LIABILITY, BREACH OF WARRANTY, OR OTHERWISE; WHETHER OR
NOT ANY REMEDY IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE; AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE
POSSIBILITY OF SUCH DAMAGES.
SMSC USB97C211
Page 2
Revision 1.3 (11-05-03)
DATASHEET
1
GENERAL DESCRIPTION
The USB97C211 is a USB2.0 Bulk Only Mass Storage Class Peripheral Controller intended for supporting
CompactFlash (CF), in True IDE Mode only, and SmartMedia (SM) flash memory devices. It provides a single chip
solution for the most popular flash memory cards in the market.*
The device consists of a USB 2.0 PHY and SIE, buffers, Fast 8051 microprocessor with expanded scratchpad, and
program SRAM, and CF/SM controllers.*
Provisions for external Flash Memory up to 64K bytes for program storage is provided.
12K bytes of scratchpad SRAM and 768Bytes of program SRAM are also provided.
Sixteen GPIO pins are for the 128-pin device. Provisions are made to allow hot swap of flash media to be
implemented.
The USB97C211 supports the insertion of cards (CF, SM) simultaneously.
SMSC provides the following object code software free of charge with purchase of the USB97C211**:
ꢀ
ꢀ
Multiple LUN Mass Storage Class compliant firmware to support all media types in a single code image, with
option for firmware download via USB if a sector erasable program memory is used.
Windows application for programming VID/PID/OEM strings, and unique serial number into serial EEPROM via
USB. Serial EEPROM may be eliminated entirely if appropriate firmware and specific Flash device is used for
program code.
ꢀ
Firmware with field upgrade capability via USB (requires specific 128KB Flash for firmware storage).
Source code licenses are also available for USB97C211 customers.**
SMSC may make complete internal specifications available for those customers requiring programming information,
subject to SMSC’s applicable Proprietary Information Agreement (nondisclosure agreement). Contact your SMSC
sales representative for more information.
Note:
* In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC
devices made the subject of this document or to use related SMSC software programs, technical information and
licenses under patent and other intellectual property rights from or through various persons or entities, including
without limitation media standard companies, forums, and associations, and other patent holders may be required.
These media standard companies, forums, and associations include without limitation the following: Sony Corporation
(Memory Stick), SD3 LLC (Secure Digital/MultiMediaCard), the SSFDC Forum (SmartMedia), and the Compact Flash
Association (Compact Flash). SMSC does not make such licenses or technical information available; does not
promise or represent that any such licenses or technical information will actually be obtainable from or through the
various persons or entities (including the media standard companies, forums, and associations), or with respect to the
terms under which they may be made available; and is not responsible for the accuracy or sufficiency of, or otherwise
with respect to, any such technical information.
SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or
otherwise, with respect to infringement, including without limitation any obligations to defend or settle claims, to
reimburse for costs, or to pay damages, shall not apply to any of the devices made the subject of this document or
any software programs related to any of such devices, or to any combinations involving any of them, with respect to
infringement or claimed infringement of any existing or future patents related to solid state disk or other flash memory
technology or applications (“Solid State Disk Patents”). By making any purchase of any of the devices made the
subject of this document, the customer represents, warrants, and agrees that it has obtained all necessary licenses
under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk and other flash
memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses
under Solid State Disk Patents; that the manufacture and testing by or for SMSC of the units of any of the devices
made the subject of this document which may be sold to the customer, and any sale by SMSC of such units to the
customer, are valid exercises of the customer’s rights and licenses under such Solid State Disk Patents; that SMSC
shall have no obligation for royalties or otherwise under any Solid State Disk Patents by reason of any such
manufacture, use, or sale of such units; and that SMSC shall have no obligation for any costs or expenses related to
the customer’s obtaining or having obtained rights or licenses under any Solid State Disk Patents.
SMSC USB97C211
Page 3
Revision 1.3 (11-05-03)
DATASHEET
SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR
OTHER VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND
ALL WARRANTIES AGAINST INFRINGEMENT AND THE LIKE.
No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark,
copyright, mask work right, trade secret, or other intellectual property right.
**To obtain this software program the appropriate SMSC Software License Agreement must be executed and in
effect. Forms of these Software License Agreements may be obtained by contacting SMSC.
SMSC USB97C211
Page 4
Revision 1.3 (11-05-03)
DATASHEET
TABLE OF CONTENTS
1
2
GENERAL DESCRIPTION.................................................................................................................................3
PIN TABLE.........................................................................................................................................................6
2.1 By Interface................................................................................................................................... 6
2.2 Pin Numbers................................................................................................................................. 7
2.2.1 128 Pin VTQFP.......................................................................................................................... 7
2.2.2 128 Pin QFP .............................................................................................................................. 8
3
PIN CONFIGURATION ......................................................................................................................................9
3.1 128 Pin VTQFP.............................................................................................................................. 9
3.2 128 Pin QFP ................................................................................................................................ 10
4
5
BLOCK DIAGRAM...........................................................................................................................................11
PIN DESCRIPTIONS........................................................................................................................................12
5.1 Pin Descriptions......................................................................................................................... 12
5.2 Buffer Type Descriptions .......................................................................................................... 16
6
7
DC PARAMETERS ..........................................................................................................................................17
6.1 Maximum Guaranteed Ratings ................................................................................................. 17
PACKAGE OUTLINES.....................................................................................................................................20
7.1 128 Pin VTQFP Package Outline, 14X14X1.0 Body, 2 MM Footprint .................................... 20
7.2 128 Pin QFP Package Outline, 14X20X2.7 Body, 3.9 MM Footprint...................................... 21
8
9
TYPICAL APPLICATION .................................................................................................................................22
REFERENCES.................................................................................................................................................23
10
USB97C211 REVISIONS.................................................................................................................................24
SMSC USB97C211
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Revision 1.3 (11-05-03)
DATASHEET
2
PIN TABLE
2.1 By Interface
CompactFlash Interface (28 Pins)
CF_D0
CF_D4
CF_D1
CF_D5
CF_D2
CF_D6
CF_D3
CF_D7
CF_D8
CF_D9
CF_D10
CF_D14
CF_IRQ
CF_nCS1
CF_nCD1
CF_D11
CF_D15
CF_nRESET
CF_SA0
CF_nCD2
CF_D12
CF_nIOR
CF_IORDY
CF_SA1
CF_D13
CF_nIOW
CF_nCS0
CF_SA2
SmartMedia Interface (17 Pins)
SM_D0
SM_D4
SM_ALE
SM_nWP
SM_nWPS
SM_D1
SM_D5
SM_D2
SM_D3
SM_D7
SM_nWE
SM_nCD
SM_D6
SM_nRE
SM_nCE
SM_CLE
SM_nB/R
USB Interface (7 Pins)
USB+
RTERM
USB-
FS+
LOOPFLTR
FS-
RBIAS
Memory/IO Interface (29 Pins)
MA0
MA4
MA8
MA12
MD0
MD4
MA1
MA5
MA9
MA13
MD1
MA2
MA3
MA7
MA11
MA15
MD3
MD7
MA6
MA10
MA14
MD2
MD5
MD6
nMRD
nIOW
nMWR
nIOR
nMCE
Misc (21 Pins)
GPIO1/TXD
GPIO5
GPIO0/RXD
GPIO4
GPIO2/T0
GPIO6
GPIO3/nWE
GPIO7
XTAL1/CLKIN
GPIO8
XTAL2
GPIO9
GPIO13
nTEST1
nRESET
GPIO10
GPIO14
GPIO11
GPIO15
GPIO12
nTEST0
Power, Grounds (15 Pins)
No Connects (11 Pins)
Total 128
SMSC USB97C211
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Revision 1.3 (11-05-03)
DATASHEET
2.2 Pin Numbers
2.2.1 128 PIN VTQFP
PIN #
1
2
3
4
5
6
7
8
NAME
MA1
MA2
MA3
VDDIO
MA4
MA5
MA6
MA7
MA8
MA
8
8
PIN #
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
NAME
TEST3
TEST4
TEST5
N.C.
MA PIN #
NAME
MA PIN #
NAME
RBIAS
VDDA
FS+
USB+
USB-
MA
8
8
8
8
8
8
8
8
65
66
67
CF_IORDY
CF_nIOR
CF_nIOW
-
97
8
8
98
99
8
68 CF_nRESET 8
100
101
102
103
104
105
106
107
N.C.
8
8
8
8
8
8
8
8
8
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
CF_nCS0
CF_nCS1
CF_SA0
CF_SA1
CF_SA2
VDDIO
SM_D0
SM_D1
SM_D2
SM_D3
VSSIO
SM_D4
VDDCORE
SM_D5
SM_D6
8
8
8
8
8
N.C.
N.C.
N.C.
VDDIO
N.C.
FS-
RTERM
VSSA
XTAL1
XTAL2
VSSP
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
MA9
8
8
8
8
8
8
8
8
8
MA10
MA11
MA12
VDDCORE
MA13
MA14
MA15
MD0
MD1
MD2
MD3
MD4
VSSIO
MD5
MD6
TEST2
CF_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
VSSIO
VSSCORE
CF_D7
CF_D8
CF_D9
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
CF_nCD1
CF_nCD2
CF_IRQ
8
8
8
8
108 LOOPFLTR
109
110
111
112
113
VDDP
GPIO0
GPIO1
GPIO2
GPIO3
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
114 VSSCORE
115
116
117
118
119
120
121
122
123
124
125
126
127
128
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
VSSIO
GPIO13
GPIO14
GPIO15
MA0
8
8
8
8
8
8
8
8
8
SM_D7
8
8
8
8
8
8
8
-
-
-
-
-
8
8
8
8
8
8
8
8
8
-
SM_ALE
SM_CLE
SM_nRE
SM_nWE
SM_nWP
SM_nCE
SM_nWPS
SM_nB/R
SM_nCD
nRESET
nTEST0
nTEST1
8
8
8
8
8
8
8
8
-
MD7
nMRD
nMWR
nMCE
nIOW
nIOR
N.C.
8
8
8
8
-
-
-
SMSC USB97C211
Page 7
Revision 1.3 (11-05-03)
DATASHEET
2.2.2 128 PIN QFP
PIN #
NAME
MA1
MA2
MA3
VDDIO
MA
8
8
PIN #
36
37
38
39
NAME
TEST3
TEST4
TEST5
N.C.
MA PIN #
NAME
MA PIN #
NAME
RBIAS
VDDA
FS+
MA
4
5
6
7
8
8
8
68
69
70
71
CF_IORDY
CF_nIOR
CF_nIOW
-
100
101
102
103
8
8
8
8
CF_nRESE
USB+
8
8
8
8
8
T
8
9
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
8
8
8
8
8
8
8
8
40
41
42
43
44
45
46
47
N.C.
N.C.
N.C.
N.C.
VDDIO
N.C.
72
73
74
75
76
77
78
79
CF_nCS0
CF_nCS1
CF_SA0
CF_SA1
CF_SA2
VDDIO
8
8
8
8
8
104
105
106
107
108
109
110
USB-
FS-
10
11
12
13
14
15
RTERM
VSSA
XTAL1
XTAL2
VSSP
8
8
TEST2
CF_D0
SM_D0
SM_D1
8
8
111 LOOPFLT
8
8
8
8
8
8
8
R
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
MA12
VDDCORE
MA13
MA14
MA15
MD0
MD1
MD2
MD3
MD4
VSSIO
MD5
MD6
8
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
VSSIO
VSSCORE
CF_D7
CF_D8
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
SM_D2
SM_D3
VSSIO
SM_D4
VDDCORE
SM_D5
8
8
112
113
114
115
116
VDDP
GPIO0
GPIO1
GPIO2
GPIO3
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
-
117
SM_D6
SM_D7
118
119
120
121
122
123
124
125
126
127
128
1
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
VSSIO
GPIO13
GPIO14
GPIO15
MA0
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
-
SM_ALE
SM_CLE
SM_nRE
SM_nWE
SM_nWP
SM_nCE
SM_nWPS
SM_nB/R
SM_nCD
nRESET
nTEST0
nTEST1
CF_D9
8
8
8
8
8
8
8
8
-
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
CF_nCD1
CF_nCD2
CF_IRQ
MD7
nMRD
nMWR
nMCE
nIOW
nIOR
-
-
-
8
8
8
8
-
-
-
2
N.C.
-
3
SMSC USB97C211
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Revision 1.3 (11-05-03)
DATASHEET
3
PIN CONFIGURATION
3.1 128 Pin VTQFP
MA1
nTEST1
nTEST0
nRESET
SM_nCD
SM_nB/R
SM_nWPS
SM_nCE
SM_nWP
SM_nWE
SM_nRE
SM_CLE
SM_ALE
SM_D7
1
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
MA2
2
MA3
3
VDDIO
4
MA4
5
MA5
6
MA6
7
MA7
8
MA8
9
MA9
10
MA10
11
MA11
12
MA12
13
VDDCORE
SM_D6
14
MA13
SM_D5
15
MA14
VDDCORE
SM_D4
16
USB97C211
MA15
17
MD0
VSSIO
18
MD1
SM_D3
19
MD2
SM_D2
20
MD3
SM_D1
21
MD4
VSSIO
MD5
22
23
24
25
26
27
28
29
30
31
32
SM_D0
VDDIO
CF_SA2
CF_SA1
CF_SA0
CF_nCS1
CF_nCS0
CF_nRESET
CF_nIOW
CF_nIOR
CF_IORDY
MD6
MD7
nMRD
nMWR
nMCE
nIOW
nIOR
N.C.
SMSC USB97C211
Page 9
Revision 1.3 (11-05-03)
DATASHEET
3.2 128 Pin QFP
102
65
CF_D15
CF_D14
CF_D13
CF_D12
CF_D11
CF_D10
CF_D9
CF_D8
CF_D7
VSSCORE
VSSIO
CF_D6
CF_D5
CF_D4
CF_D3
CF_D2
CF_D1
CF_D0
TEST2
N.C.
USB+
USB-
FS-
RTERM
VSSA
XTAL1
XTAL2
VSSP
LOOPFLTR
VDDP
GPIO0
GPIO1
GPIO2
GPIO3
VSSCORE
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
VSSIO
GPIO13
USB97C211
VDDIO
N.C.
N.C.
N.C.
N.C.
128
N.C.
1
38
SMSC USB97C211
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Revision 1.3 (11-05-03)
DATASHEET
4
BLOCK DIAGRAM
Auto address generators
512 Bytes EP2 TX/RX Buffer B
512 Bytes EP2 TX/RX Buffer A
1.25KB
SRAM
Address
Address
64 Bytes EP1RX
64 Bytes EP1TX
64 Bytes EP0RX
64 Bytes EP0TX
EP0TX_BC
Flash Media
Controllers
(FMC)
Memory
Cards
Address
Address
EP0RX_BC
EP1TX_BC
Flash Media DMA Unit
DATA
CF
32 Bit
60MHz
Controller
Control/
CF
EP1RX_BC
Address
Address
Status
DATA
Latch phase 3
8051
Latch phase 1
FMC
Latch phase 0, 2
SIE
RAMWR_A/B
SM
ECC
Controller
Control/
Status
Control/
SM/SSFDC
RAMRD_A/B
Address
Status
Data @ 32 bit
15Mhz
Clocked byPhase 0, 2 Clock
SIE
32 bit 15MHz Data Buss
SIE Control Regs
( Serial Interface Engine )
Work Scratchpad
SRAM (768 Byte)
USB 2.0 PHY
GPIO
8 pins
Configuration and Control
( Transciever )
12K Byte
Program/Scratchpad
SRAM
Clock Generation
Osc
Interrupt Controller
Program Memory/ IO
Bus
MEM/IO Bus
29pins
FAST 8051
CPU CORE
CLOCKOUT
12 MHz
Clocked by Phase 3 Clock
SMSC USB97C211
Page 11
Revision 1.3 (11-05-03)
DATASHEET
5
PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low
voltage level. When “n” is not present before the signal name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture
of “active low” and “active high” signal. The term assert, or assertion indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation indicates that a signal is
inactive.
5.1 Pin Descriptions
BUFFER
NAME
SYMBOL
DESCRIPTION
TYPE
CompactFlash (In True IDE mode) Interface
CF Chip Select 1
CF_nCS1
O8
This pin is the active low chip select 1 signal for the CF
ATA device
CF Chip Select 0
CF_nCS0
CF_SA2
CF_SA1
CF_SA0
O8
O8
O8
O8
This pin is the active low chip select 0 signal for the task
file registers of CF ATA device in the True IDE mode.
CF Register Address 2
CF Register Address 1
CF Register Address 0
This pin is the register select address bit 2 for the CF
ATA device.
Address signal 1 for the task file registers, when the
CFC is enabled in True IDE mode
Address signal 0 for the task file registers, when the CFC
is enabled in True IDE mode.
CF Interrupt
CF_IRQ
IPD
This is the active high interrupt request signal from the
CF device.
This pin has an internal weak pull-down resistor.
CF
Data 15-8
CF_D[15:8]
IO8
The bi-directional data signals CF_D15-CF_D8 in True
IDE mode data transfer, when the CFC is enabled.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
These pins have an internal weak pull-down resistor.
CF
Data7-0
CF_D[7:0]
IO8
The bi-directional data signals CF_D7-CF_D0 in the True
IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
These pins have an internal weak pull-down resistor.
IO Ready
CF_IORDY
CF_nCD2
IPU
IPU
This pin is active high input signal with an internal weak
pull-up resistor.
CF
This card detection pin is connected to the ground on the
CF device, when the CF device is inserted.
Card Detection2
This pin has an internal weak pull-up resistor.
CF
CF_nCD1
IPU
This card detection pin is connected to ground on the CF
device, when the CF device is inserted.
Card Detection1
This pin has an internal weak pull-up resistor.
SMSC USB97C211
Page 12
Revision 1.3 (11-05-03)
DATASHEET
BUFFER
TYPE
NAME
SYMBOL
DESCRIPTION
CF
CF_nRESET
O8
O8
O8
This pin is an active low hardware reset signal to CF
device.
This pin is an active low read strobe signal for CF device,
when the CFC is enabled.
This pin is an active low write strobe signal for CF device,
when the CFC is enabled.
Hardware Reset
CF
CF_nIOR
CF_nIOW
IO Read
CF
IO Write Strobe
SmartMedia Interface
SM
Write Protect
SM
Address Strobe
SM
Command Strobe
SM
Data7-0
SM_nWP
SM_ALE
SM_CLE
SM_D[7:0]
O8
O8
O8
IO8
This pin is an active low write protect signal for the SM
device, when the SMC is enabled.
This pin is an active high Address Latch Enable signal for
the SM device, when the SMC is enabled
This pin is an active high Command Latch Enable signal
for the SM device, when the SMC is enabled.
These pins are the bi-directional data signal SM_D7-
SM_D0, when the SMC is enabled.
The bi-directional input signal should have an internal
weak pull-up resister on the input.
SM
Read Enable
SM
Write Enable
SM
Write Protect Switch
SM_nRE
SM_nWE
SM_nWPS
O8
O8
This pin is an active low read strobe signal for SM device,
when SMC is enabled.
This pin is an active low write strobe signal for SM
device, when SMC is enabled.
A write-protect seal is detected, when this pin is low.
IPU
This pin has an internal weak pull-up resistor.
SM
SM_nB/R
SM_nCE
SM_nCD
IPU
O8
This pin is connected to the BSY/RDY pin of the SM
device.
Busy or Data Reday
This pin has an internal weak pull-up resistor.
SM
Chip Enable
This pin is the active low chip enable signal to the SM
device.
This pin has an internal weak pull-up resistor.
SM
IPU
This is the card detection signal from SM device to
indicate if the device is inserted.
Card Detection
This pin has internal weak pull-up resistor.
SMSC USB97C211
Page 13
Revision 1.3 (11-05-03)
DATASHEET
BUFFER
TYPE
NAME
SYMBOL
DESCRIPTION
USB Interface
USB Bus Data
USB-
USB+
IO-U
These pins connect to the USB bus data signals.
USB Transceiver Filter
LOOPFLTR
This pin provides the ability to supplement the internal
filtering of the transceiver with an external network, if
required. This pin is normally not connected.
USB Transceiver Bias
Termination Resistor
Full Speed USB Data
RBIAS
A precision 10.0K resistor is attached from ground to this
pin to set the transceiver’s internal bias currents.
RTERM
A precision 1.5K resistor is attached to this pin from a
3.3V supply.
FS-
FS+
IO-U
These pins connect to the USB- and USB+ pins through
39.2 ohm series resistors.
Memory/IO Interface
Memory Data Bus
MD[7:0]
IO8
These signals are used to transfer data between the
internal CPU and the external program memory.
Memory Address Bus
MA[15:0]
O8
These signals address memory locations within the
external memory. Memory access time should be 80 ns or
less.
Memory Write Strobe
Memory Read Strobe
nMWR
nMRD
O8
O8
Program Memory Write; active low
Program Memory Read; active low. Memory output enable
time (assuming this signal is used for this memory
function) must be 80 ns or less.
Memory Chip Enable
nMCE
O8
Program Memory Chip Enable; active low. This signal
shall be deasserted, when the USB97C211 is in power
down mode (USB SUSPEND).
I/O Read Strobe
I/O Write Strobe
nIOR
nIOW.
O8
O8
This is an active low I/O Read strobe signal of MD bus.
This is an active low I/O Write strobe signal of MD bus.
Misc
Crystal Input/External
Clock Input
XTAL1/
CLKIN
ICLKx 12Mhz Crystal or external clock input.
This pin can be connected to one terminal of the crystal or
can be connected to an external 12Mhz clock when a
crystal is not used.
Crystal Output
XTAL2
OCLKx 12Mhz Crystal
This is the other terminal of the crystal, or left open when
an external clock source is used to drive XTAL1/CLKIN. It
may not be used to drive any external circuitry other than
the crystal circuit.
General Purpose I/O
GPIO0
/RXD
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
In addition to the above, this port has the capability of
auto-toggling at a 1 Hz rate when used as an output.
As an input, the GPIO0 can also be used as input to the
RXD of a UART in the device for firmware debug
purposes.
Note: This pin defaults as an input and should be
terminated to a supply via a high value resistor to avoid a
floating input condition.
SMSC USB97C211
Page 14
Revision 1.3 (11-05-03)
DATASHEET
BUFFER
TYPE
I/O8
NAME
SYMBOL
DESCRIPTION
General Purpose I/O
GPIO1
/TXD
This pin may be used either as input, edge sensitive
interrupt input, or output.
In addition, as an output, the GPIO1 can also be used as
an output TXD of a UART in the device for firmware
debug purposes.
Note: This pin defaults as an input and should be
terminated to a supply via a high value resistor to avoid a
floating input condition.
General Purpose I/O
General Purpose I/O
GPIO2
/T0
I/O8
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
In addition, the pin can be used as the internal 8051 “T0
timer P3.4” output.
Note: This pin defaults as an input and should be
terminated to a supply via a high value resistor to avoid a
floating input condition.
GPIO3
/nWE
This pin may be used either as input, edge sensitive
interrupt input, or output.
In addition, the output can be nWE, for use with PCMCIA
form factor flash cards with “true IDE” capability.
Note: This pin defaults as an input and should be
terminated to a supply via a high value resistor to avoid a
floating input condition.
General Purpose I/O
GPIO[7:4]
I/O8
This pin may be used either as input, edge sensitive
interrupt output, or output.
General Purpose I/O
RESET input
GPIO[15:8]
nRESET
I/O8
IS
These pins may be used either as input, or output.
This active low signal is used by the system to reset the
chip. The active low pulse must be at least 100ns wide.
TEST Input
TEST Input
nTEST[0:1]
TEST[2:5]
I
I
These signals are used for testing the chip. User should
normally leave them unconnected.
These pins are used for testing the chips. They should be
tied to ground thru high value resistors for normal
operation.
SMSC USB97C211
Page 15
Revision 1.3 (11-05-03)
DATASHEET
POWER, GROUNDS, and NO CONNECTS
+2.5V Core power
VDD
VDDIO
VDDP
VSSP
VDDA
VSSA
GND
+3.3V I/O power
+2.5 Analog power
Analog Ground Reference
+3.3V Analog power
Analog Ground Reference
Ground Reference
N.C.
No connection should be made externally
5.2 Buffer Type Descriptions
Table 1 - USB97C211 Buffer Type Descriptions
BUFFER
I
DESCRIPTION
Input
IPU
IPD
IS
Input with internal weak pull-up resistor.
Input with internal weak pull-down resistor.
Input with Schmitt trigger
I/O4
I/OD4
I/O8
I/OD8
O4
Input/Output with 4mA drive
Input/Open drain output … 4mA sink
Input/Output with 8mA drive
Input/Open drain output … 8mA sink
Output with 4mA drive
O8
Output with 8mA drive
I/O12
O12
Output with 12mA drive
Output with 12mA drive
OD12
ICLKx
OCLKx
I/O-U
Open drain….12mA sink
XTAL clock input
XTAL clock output
Defined in USB specification
SMSC USB97C211
Page 16
Revision 1.3 (11-05-03)
DATASHEET
6
DC PARAMETERS
6.1 Maximum Guaranteed Ratings
Operating Temperature Range........................................................................................................................... 0oC to +70oC
Storage Temperature Range............................................................................................................................-55o to +150oC
Lead Temperature Range (soldering, 10 seconds)..................................................................................................... +325oC
Positive Voltage on any pin, with respect to Ground ........................................................................................................5.5V
Negative Voltage on any pin, with respect to Ground......................................................................................................-0.3V
Maximum VDD, VDDP ........................................................................................................................................................+3.0V
Maximum VDDIO, VDDA ......................................................................................................................................................+4.0V
*Stresses above the specified parameters could cause permanent damage to the device. This is a stress rating only
and functional operation of the device at any other condition above those indicated in the operation sections of this
specification is not implied.
Note: When powering this device from laboratory or system power supplies, it is important that the Absolute
Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on their
outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line may appear on
the DC output. When this possibility exists, it is suggested that a clamp circuit be used.
DC ELECTRICAL CHARACTERISTICS (TA = 0°C - 70°C, VDDIO,VDA = +3.3 V ± 10%, VDD, VDDP = +2.5 V ± 10%,)
PARAMETER
I Type Input Buffer
SYMBOL
MIN
TYP
MAX
UNITS
COMMENTS
VILI
VIHI
0.8
V
V
TTL Levels
Low Input Level
2.0
High Input Level
ICLK Input Buffer
VILCK
VIHCK
0.4
V
V
Low Input Level
2.2
High Input Level
Input Leakage
(All I and IS buffers)
IIL
-10
-10
+10
+10
uA
uA
VIN = 0
Low Input Leakage
IIH
VIN = VDDIO
High Input Leakage
O8 Type Buffer
VOL
VOH
IOL
0.4
V
V
IOL = 8 mA @ VDDIO
Low Output Level
High Output Level
Output Leakage
= 3.3V
I
OH = -4mA @ VDDIO
2.4
-10
= 3.3V
+10
uA
VIN = 0 to VDDIO
(Note 1)
SMSC USB97C211
Page 17
Revision 1.3 (11-05-03)
DATASHEET
PARAMETER
I/O8 Type Buffer
SYMBOL
MIN
TYP
MAX
UNITS
COMMENTS
Low Output Level
VOL
0.4
V
I
OL = 8 mA @ VDDIO
= 3.3V
I
OH = -4 mA @ VDDIO
VOH
2.4
-10
V
HIGH OUTPUT LEVEL
= 3.3V
IOL
+10
0.4
µA
Output Leakage
V
IN = 0 to VDDIO
(Note 1)
I/O12 Type Buffer
Low Output Level
VOL
V
V
I
OL = 12 mA @ VDDIO
= 3.3V
I
OH = -6mA @ VDDIO
High Output Level
VOH
2.4
-10
= 3.3V
V
IN = 0 to VDDIO
Output Leakage
IOL
+10
0.4
µA
V
(Note 1)
I/O24 Type Buffer
Low Output Level
High Output Level
Output Leakage
VOL
IOL = 24 mA @ VDDIO
= 3.3V
I
OH = -12 mA @
VOH
2.4
-10
V
VDDIO = 3.3V
VIN = 0 to VDDIO
(Note 1)
IOL
+10
µA
IO-U
(Note 2)
Supply Current Unconfigured
ICCINIT
ICC
80
60
80
60
4
mA
mA
µA
VDD, VDDP = 2.5V
V
DDA, VDDIO = 3.3V
Supply Current Active
Supply Current Standby
100
70
170
130
VDD, VDDP = 2.5V
VDDA, VDDIO = 3.3V
VDD, VDDP = 2.5V
VDDA, VDDIO = 3.3V
ICSBY
2
Note 1: Output leakage is measured with the current pins in high impedance.
Note 2: See Appendix A for USB DC electrical characteristics.
Note 3: Unconfigured and Operating Supply currents are measured in HS mode.
Note 4: Standby currents are measured in optimum board configuration and vary depending on system configuration.
SMSC USB97C211
Page 18
Revision 1.3 (11-05-03)
DATASHEET
CAPACITANCE TA = 25°C; fc = 1MHz; VDD = 2.5V
LIMITS
PARAMETER
Clock Input Capacitance
Input Capacitance
SYMBOL MIN TYP MAX UNIT
TEST CONDITION
All pins except USB pins
(and pins under test tied
to AC ground)
CIN
CIN
20
10
20
pF
pF
pF
Output Capacitance
COUT
SMSC USB97C211
Page 19
Revision 1.3 (11-05-03)
DATASHEET
7
PACKAGE OUTLINES
7.1 128 Pin VTQFP Package Outline, 14X14X1.0 Body, 2 MM Footprint
MIN
~
NOMINAL
MAX
1.20
0.15
1.05
16.20
14.20
16.20
14.20
0.20
0.75
~
REMARKS
Overall Package Height
Standoff
~
A1
A2
D
0.05
0.95
15.80
13.80
15.80
13.80
0.09
0.45
~
~
~
Body Thickness
X Span
~
~
X body Size
D1
E
~
Y Span
~
Y body Size
E1
H
~
Lead Frame Thickness
Lead Foot Length
Lead Length
0.60
L
1.00
L1
e
0.40 Basic
Lead Pitch
Lead Foot Angle
Lead Width
0o
0.13
0.08
0.08
~
~
0.18
~
~
~
7o
0.23
~
0.20
0.08
θ
W
R1
R2
ccc
Lead Shoulder Radius
Lead Foot Radius
Notes:
1 Controlling Unit: millimeter.
2 Tolerance on the true position of the leads is ± 0.035 mm maximum.
3 Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5 Details of pin 1 identifier are optional but must be located within the zone indicated.
SMSC USB97C211
Page 20
Revision 1.3 (11-05-03)
DATASHEET
7.2 128 Pin QFP Package Outline, 14X20X2.7 Body, 3.9 MM Footprint
MIN
~
NOMINAL
MAX
3.4
REMARKS
Overall Package Height
Standoff
~
A1
A2
D
0.05
2.55
23.70
19.90
17.70
13.90
0.09
0.73
~
~
0.5
~
3.05
24.10
20.10
18.10
14.10
0.20
1.03
~
Body Thickness
X Span
~
~
X body Size
D1
E
~
Y Span
~
Y body Size
E1
H
~
Lead Frame Thickness
Lead Foot Length
Lead Length
0.88
L
1.95
L1
e
0.50 Basic
Lead Pitch
Lead Foot Angle
Lead Width
0o
0.10
0.13
0.13
~
~
~
~
~
~
7o
0.30
~
0.30
0.08
θ
W
R1
R2
ccc
Lead Shoulder Radius
Lead Foot Radius
Notes:
1 Controlling Unit: millimeter.
2 Tolerance on the position of the leads is ± 0.04 mm maximum.
3 Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5 Details of pin 1 identifier are optional but must be located within the zone indicated.
SMSC USB97C211
Page 21
Revision 1.3 (11-05-03)
DATASHEET
8
TYPICAL APPLICATION
3.3V Regulator
2.5V Regulator
VCCEXT
VCCEXT
COMPACT FLASH MEDIA SOCKET
VR1
VR2
J1
VDD
3
2
3
2
VDDIO
VIN
VOUT
VIN
VOUT
+
+
+
+
Compact_Flash_1
C1
C2
C3
C4
10uF
10uF
10uF
10uF
VDDCF
VDDSM
VDDIO,VDDA
12
VDD
VCC
22
VCC
17
LVD
24
Card Det. SW1
6
D0
7
C5
C6
C7
C8
.1uF
C9
C10
.1uF
C11
.1uF
C12
C13
.1uF
C14
.1uF
D1
8
.1uF
.1uF
.1uF
.1uF
.1uF
D2
9
D3
13
D4
14
D5
15
GPIO3
D6
16
R1
10.0K
1/10W
1%
D7
3
ALE
2
R2
CLE
20
1M
10K
RE#
4
WE#
5
R3
WP#
19
R/B#
21
P1
CE#
11
R4 39.2
1
2
3
4
CD#
23
VCC
FS-
FS+
USB-
1
2
Card Det. SW0
D-
USB+
1
2
D+
1
GND
GND
10
18
R6
R7
R5 39.2
GND
GND
10 K
10 K
USB TYPE B
R8
VDDIO
VDD
J2 Smart_Media
VDDA
100K
1.5K1/10W
5%
VDDIO
100K
69
CF_nCS0
70
17
MA15
MA14
MA13
MA12
MA11
MA10
MA9
CF_nCS1
71
MA15
MA14
MA13
MA12
MA11
MA10
MA9
16
15
13
12
11
10
9
CF_SA0
72
CF_SA1
73
CF_SA2
62
CF_nCD1
63
CF_nCD2
75
SM_D0
76
MA8
SM_D1
79
MA8
8
MA7
VSS
77
MA7
23
7
MA[0:15]
SM_D2
78
VSS
MA6
MA5
MA4
MA3
SM_D3
80
MA6
6
SM_D4
82
U1
MA5
5
13
12
11
10
9
MA0
SM_D5
MA4
D0
14
A0
A1
VDD
81
83
84
85
86
87
88
89
92
3
MA1
VDDCORE
SM_D6
MA3
D1
15
14
2
VDD
MA2
VDDCORE
MA2
D2
17
A2
MA2
MA1
MA0
VDDCF
Q1
VDDSM
MA3
USB97C211
SM_D7
D3
18
A3
1
8
MA4
SM_ALE
SM_CLE
SM_nRE
SM_nWE
SM_nWP
SM_nB/R
MA1
D4
19
A4
128
18
19
20
21
22
4
7
MA5
(128 pin VTQFP)
MA0
D5
20
A5
6
MA6
MD0
D6
21
A6
5
MA7
MD1
D7
A7
GPIO13
GPIO14
Q2
27
26
23
25
4
MA8
MD2
A8
MA9
MD3
A9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MD4
A10
A11
A12
A13
A14
A15
A16
90
93
91
36
40
39
41
VDDIO
SM_nCE
SM_nCD
SM_nWPS
NC
VDDIO
MD5
24
25
26
28
27
29
51
30
28
29
3
MD6
NC
VDDIO
MD7
NC
nMWR
nMRD
nMCE
VSS
32
2
NC
VCC
R11 100
SM
R12 100
VDDIO
VDDIO
CF
22
24
31
1
CE
OE
Insertion/
Insertion/
Activity
16
Activity
Indicator
GND
WE
VPP
VDDIO
Indicator
U2
D1
D2
39VF010 or equiv OTP/EPROM
LED
LED
VDDIO
Note 1: If firmware download is not required,a 64KB Flash
(39VF512) can be used. GPIO6 should be not connected.
4x100K
R17 10K
VDDIO
VDDIO
SERIAL EEPROM
High Speed INIDICATOR
Flash Card Power Control
Y1
GPIO5
93LC66A Serial EEPROM
1
Q3
Q4
8
7
6
5
GPIO2
MOSFET P
GPIO9
C15
1µf
VCC
N.C.
N.C.
VSS
CS
CLK
DI
12.00Mhz
2
3
4
GPIO7
GPIO4
C16
22pf
U3
D3
LED
VDDCF
C17 22pf
Q5
GPIO10
MOSFET P
DO
R18
1K
HS
Title
Note: May be
eliminated with
appropriate firmware
and component
Indicator
R19
100
USB97C211 Typical Application
VDDSM
Size
Document Number
Rev
D
Custom
Date:
utilization for U2
Friday, August 02, 2002
Sheet
1
of
1
SMSC USB97C211
Page 22
Revision 1.3 (11-05-03)
DATASHEET
9
REFERENCES
1. SmartMedia Electrical Specification Version 1.30
2. SmartMedia Physical Format Specifications Version 1.30
3. SmartMedia Logical Format Specifications Version 1.20
4. SMIL (SmartMedia Interface Library) Software Edition Version 1.00, Toshiba Corporation, 01, July, 2000
5. SMIL (SmartMedia Interface Library) Hardware Edition Version 1.00, Toshiba Corporation, 01, July, 2000
6. CompactFlash Specification Rev 1.4
7. CF+ & CF Specification Rev. ATA-5 Draft 0.2
8. Universal Serial Bus Specification Rev 2.0
SMSC USB97C211
Page 23
Revision 1.3 (11-05-03)
DATASHEET
10 USB97C211 REVISIONS
PAGE
SECTION
COMMENT
DATE
17
6 - DC PARAMETERS
DC ELECTRICAL CHARACTERISTICS –
Updated High Input Leakage units.
11-05-03
3
1 - GENERAL DESCRIPTION
8 - Typical Application
Two bullets under SMSC provides the
following object code software free of charge
with purchase of the USB97C211**
08-02-02
22
Updated diagram
08-02-02
SMSC USB97C211
Page 24
Revision 1.3 (11-05-03)
DATASHEET
相关型号：
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