SP708TCU [SIPEX]
+3.0V/+3.3V Low Power Microprocessor Supervisory Circuits; + 3.0V / + 3.3V的低功耗微处理器监控电路
| 型号： | SP708TCU |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | +3.0V/+3.3V Low Power Microprocessor Supervisory Circuits |
| 文件： | 总18页 (文件大小：214K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP706P/R/S/T, SP708R/S/T
+3.0V/+3.3V Low Power Microprocessor
Supervisory Circuits
■ Precision Low Voltage Monitor:
SP706P/R and SP708R at +2.63V
SP706S and SP708S at +2.93V
SP706T and SP708T at +3.08V
■ RESET Pulse Width - 200ms
■ Independent Watchdog Timer - 1.6 sec
Timeout (SP706P/S/R/T)
■ 40µA Maximum Supply Current
■ Debounced TTL/CMOS Manual-Reset Input
■ RESET Asserted Down to VCC = 1V
■ RESET Output:
■ Built-In Vcc Glitch Immunity
SP706P Active-High
■ Available in 8-pin PDIP, NSOIC, and
µSOIC packages
SP706R/S/T Active-Low
SP708R/S/T Both Active High + Active Low
■ Voltage Monitor for Power Failure or Low
■ WDI Can Be Left Floating, Disabling the
Battery Warning
Watchdog Function
■ Pin Compatible Enhancement to Industry
Standards 706P/R/S/T and 708R/S/T
DESCRIPTION
The SP706P/S/R/T, SP708R/S/T series is a family of microprocessor (µP) supervisory circuits
thatintegratemyriadcomponentsinvolvedindiscretesolutionswhichmonitorpower-supplyand
battery, in µP, and digital systems. The SP706P/S/R/T, SP708R/S/T series will significantly
improve system reliability and operational efficiency when compared to results obtained with
discrete components. The features of the SP706P/S/R/T, SP708R/S/T series include a
watchdog timer, a µP reset, a Power Fail Comparator, and a manual-reset input. The SP706P/
S/R/T, SP708R/S/T series is ideal for +3.0V or +3.3V applications in automotive systems,
computers, controllers, and intelligent instruments. The SP706P/S/R/T, SP708R/S/T series is
anidealsolutionforsystemsinwhichcriticalmonitoringofthepowersupplytothe µPandrelated
digital components is demanded.
Part Number
SP706P
SP706R
SP706S
SP706T
SP708R
SP708S
SP708T
RESET Active RESET Threshold Manual Reset PFI Accuracy Watchdog Input
HIGH
LOW
2.63V
2.63V
2.93V
3.08V
2.63V
2.93V
3.08V
YES
YES
YES
YES
YES
YES
YES
4%
4%
4%
4%
4%
4%
4%
YES
YES
YES
YES
NO
LOW
LOW
LOW/HIGH
LOW/HIGH
LOW/HIGH
NO
NO
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
Continuous Power Dissipation
Plastic DIP
(derate 9.09mW/OC above +70OC)..................727mW
SO
(derate 5.88mW/OC above +70OC)..................471mW
Mini SO
(derate 4.10mW/OC above +70OC)..................330mW
Storage Temperature Range.............-65˚C to +160˚C
Lead Temperature (solding 10 sec)................+300˚C
Terminal Voltage (with respect to GND):
V
CC........................................................-0.3V to +6.0V
All Other Inputs (Note 1)..............-0.3V to (VCC +3.0V)
Input Current:
V
CC.....................................................................20mA
GND...................................................................20mA
Output Current (all outputs)...............................20mA
ESD Rating...........................................................2kV
SPECIFICATIONS
Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted,
typical at 25°C.
PARAMETER
MIN.
TYP.
MAX.
UNITS CONDITIONS
Operating Voltage Range, VCC
1.0
5.5
V
µA
Supply Current, ISUPPLY
Reset Threshold
25
40
MR=VCC or Floating, WDI Floating
2.55
2.85
3.00
2.63
2.93
3.08
2.70
3.00
3.15
SP70_P/R
SP70_S
SP70_T
V
Reset Threshold Hysteresis
20
mV
ms
Note 2
Note 2
Reset Pulse Width, tRS
140
200
280
RESET Output Voltage
VOH
0.8xVCC
VCC-1.5
VRST(MAX)<VCC<3.6V, ISOURCE = 500µA
VRST(MAX)<VCC<3.6V, ISINK =1.2mA
4.5V<VCC<5.5V, ISOURCE = 800µA
4.5V<VCC<5.5V, ISINK = 3.2mA
VOL
0.3
0.4
V
V
VOH
VOL
RESET Output Voltage
VOH
VCC-0.6
VCC-1.5
VRST(MAX)<VCC<3.6V, ISOURCE = 215µA
VRST(MAX)<VCC<3.6V, ISOURCE =1.2mA
4.5V<VCC<5.5V, ISOURCE = 800µA
4.5V<VCC<5.5V, ISOURCE = 3.2mA
VCC<3.6V
VOL
0.3
VOH
VOL
0.4
Watchdog Timeout Period, tWD
WDI Pulse Width, tWP
1.00
50
1.60
0.02
2.25
s
ns
VIL = 0.4V, VIH = 0.8xVCC
WDI Input Threshold,
VIL
VIH
VIL
VIH
0.6
0.8
VRST (MAX) <VCC <3.6V
VRST (MAX) <VCC <3.6V
VCC = 5.0V
0.7xVCC
V
3.5
-1
VCC = 5.0V
µA
WDI Input Current
1
WDI = 0 or VCC
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
2
SPECIFICATIONS (continued)
Vcc = 2.7V to 5.5V for SP70_P/R, VCC = 3.0 to 5.5V for SP70_S, VCC = 3.15V to 5.5V for SP70_T, TA= TMIN to TMAX to TMAX, unless otherwise noted,
typical at 25°C.
PARAMETER
MIN.
TYP. MAX. UNITS CONDITIONS
WDO Output Voltage
VOH
VOL
VOH
VOL
0.8xVCC
VCC-1.5
V
RST(MAX)<VCC<3.6V, ISOURCE = 500µA
0.3
0.4
V
VRST(MAX)<VCC<3.6V, ISINK =1.2mA
4.5V<VCC<5.5V, ISOURCE = 800µA
4.5V<VCC<5.5V, ISINK = 3.2mA
µA
MR Pull-Up Current
25
100
70
250
250
600
MR = 0V,VRST(MAX)<VCC<3.6V
MR = 0V,4.5V<VCC<5.5V
MR Pulse Width, tMR
500
150
VRST(MAX)<VCC<3.6V
4.5V<VCC<5.5V
ns
MR Input Threshold
VIL
VIH
VIL
VIH
0.6
0.8
VRST(MAX)<VCC<3.6V
VRST(MAX)<VCC<3.6V
4.5V<VCC<5.5V
0.7xVCC
2.0
V
4.5V<VCC<5.5V
MR to Reset Out Delay, tMD
PFI Input Threshold
PFI Input Current
750
250
VRST(MAX)<VCC<3.6V,NOTE 2
4.5V<VCC<5.5V,NOTE 2
ns
VCC = 3.0V for the SP70_P/R,VCC
3.3V for the SP70_S/T,PFI falling
=
1.20
1.25
1.30
V
-25.00
0.01 25.00
nA
PFO Output Voltage
VOH
VOL
VOH
VOL
0.8xVCC
VCC-1.5
VRST(MAX)<VCC<3.6V, ISOURCE = 500µA
0.3
0.4
V
VRST(MAX)<VCC<3.6V,ISINK =1.2mA
4.5V<VCC<5.5V, ISOURCE = 800µA
4.5V<VCC<5.5V, ISINK = 3.2mA
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
3
µSOIC
DIP and SOIC
1
2
8
7
MR
WDO
1
8
7
RESET / RESET*
WDI
PFO
V
CC
RESET / RESET*
WDO 2
SP706P/R/S/T
SP706P/R/S/T
3
4
6
5
GND
PFI
WDI
PFO
3
6
5
MR
PFI
4
VCC
GND
1
2
8
7
MR
RESET
RESET
1
2
8
7
RESET
RESET
N.C.
PFO
V
CC
SP708S/R/T
SP708S/R/T
3
4
6
5
GND
PFI
N.C.
PFO
3
4
6
5
MR
PFI
V
CC
GND
*SP706P only
*SP706P only
Figure 1. Pinouts
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
4
PIN DESCRIPTION
SP706R/S/T
SP706P
SP708R/S/T
NAME
FUNCTION
DIP/
SOIC
DIP/
SOIC
DIP/
SOIC
µSOIC
µSOIC
µSOIC
Manual Reset - This input triggers a reset pulse
when pulled below 0.8V. This active-LOW input
has an internal 70µA pull-up current. It can be
driven from a TTL or CMOS logic line or shorted
to ground with a switch
MR
1
3
1
3
1
3
VCC
Voltage input.
2
3
4
5
2
3
4
5
2
3
4
5
GND
Ground reference for all signals
Power-Fail Input - When this voltage monitor input
is less than 1.25V, PFO goes LOW. Connect PFI
to ground or VCC when not in use.
PFI
4
5
6
7
4
5
6
7
4
5
6
7
Power-Fail Output - This output is HIGH until PFI
is less than 1.25V.
PFO
Watchdog Input - If this input remains HIGH or
LOW for 1.6s, the internal watchdog timer times
out and WDO goes LOW. Floating WDI or
connecting WDI to a high-impedance tri-state
buffer disables the watchdog feature. The internal
watchdog timer clears whenever RESET is
asserted, WDI is tri-stated, or whenever WDI sees
a rising or falling edge.
WDI
N.C.
6
8
6
8
-
-
No Connect.
-
-
-
-
-
-
6
7
8
1
Active-LOW RESET Output - This output pulses
LOW for 200ms when triggered and stays LOW
whenever VCC is below the reset threshold. It
RESET remains LOW for 200ms after Vcc rises above the
reset threshold or MR goes from LOW to HIGH.
A watchdog timeout will not trigger RESET unless
WDO is connected to MR.
7
1
Watchdog Output - This output pulls LOW when
the internal watchdog timer finishes its 1.6s count
and does not go HIGH again until the watchdog is
cleared. WDO also goes LOW during low-line
WDO
conditions. Whenever VCC is below the reset
threshold, WDO stays LOW. However, unlike
RESET, WDO does not have a minimum pulse
width. As soon as VCC is above the reset
threshold, WDO goes HIGH with no delay.
8
7
2
8
2
-
-
Active-HIGH RESET Output - This output is the
complement of RESET. Whenever RESET is
HIGH, RESET is LOW, and vice versa. Note the
SP708R/S/T has a reset output only.
RESET
1
-
-
8
2
Table 1. Device Pin Description
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
5
WATCHDOG
TRANSITION
DETECTOR
WATCHDOG
TIMER
WDI
MR
WDO
V
CC
TIMEBASE FOR
RESET AND
WATCHDOG
70µA
RESET
GENERATOR
RESET/RESET*
V
CC
2.63V for the SP706P/R
2.93V for the SP706S
3.08V for the SP706T
PFI
PFO
1.25V
SP706P/R/S/T
GND
* For the SP706P only
Figure 2. Internal Block Diagram for the SP706P/R/S/T
V
CC
RESET
RESET
250µA
MR
RESET
GENERATOR
V
CC
2.63V for the SP708R
2.93V for the SP708S
3.08V for the SP708T
PFI
PFO
1.25V
SP708R/S/T
GND
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
6
+3.3V
1.4V
PFI
V
CC = +3.3V
1.2V
T
A
= +25 C
PFI
PFO
3V
PFO
1KΩ
30pF
+1.25V
0V
Figure 4B. Circuit for the Power-Fail Comparator
De-assertion Response Time.
Figure 4A. Power-Fail Comparator De-assertion
Response Time.
+3.3V
1.4V
V
CC = +3.3V
PFI
1.2V
T
A
= +25 C
1KΩ
3V
PFI
PFO
PFO
0V
30pF
+1.25V
Figure 5A. Power-Fail Comparator Assertion
Response Time.
Figure 5B. Circuit for the Power-Fail Comparator
Assertion Response Time.
VCC
TA = +25oC
3.6V
VCC
VCC
2KΩ
0V
RESET
RESET
RESET
330pF
GND
Figure 6B. Circuit for the SP706 RESET Output
Voltage vs. Supply Voltage.
Figure 6A. SP706 RESET Output Voltage vs. Supply
Voltage.
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
7
VCC
T
A
= +25oC
RESET
V
CC
10KΩ
RESET
330pF
GND
Figure 7A. SP706 RESET Response Time
Figure 7B. Circuit for the SP706 RESET Response
Time
3.2V
2.8V
RESET
RESET
0V
0V
3.2V
2.8V
RESET
RESET
0V
0V
Figure 8. SP708 RESET and RESET Assertion
Figure 9. SP708 RESET and RESET De-Assertion
V
CC
T
A
= +25oC
RESET
V
CC
10KΩ
330pF
330pF
RESET
10KΩ
GND
Figure 10. Circuit for the SP708 RESET and RESET Assertion and De-Assertion
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
8
3.6V
VCC
0V
RESET
0V
Figure 12. SP708 RESET Response Time
Figure 11. SP708 RESET Output Voltage vs. Supply
Voltage
V
CC
V
CC
RESET
330pF
10KΩ
GND
Figure 13. Circuit for the SP708 RESET Output Voltage vs. Supply Voltage and the RESET Response Time
Figures
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
9
the reset threshold, an internal timer releases
RESETafter200ms. RESETpulsesLOWwhen-
ever VCC dips below the reset threshold, such as
in a brownout condition. When a brownout
condition occurs in the middle of a previously
initiated reset pulse, the pulse continues for at
least another 140ms. During power-down, once
VCC falls below the reset threshold, RESET
stays LOW and is guaranteed to be 0.4V or less
until VCC drops below 1V.
FEATURES
TheSP706P/R/S/T-SP708R/S/Tseriesprovides
four key functions:
1. Aresetoutputduringpower-up, power-down
and brownout conditions.
2. An independent watchdog output that goes
LOWifthewatchdoginputhasnotbeentoggled
within 1.6 sec.
3. A 1.25V threshold detector for power-fail
warning, low battery detection, or monitoring a
power supply other than +3.3V/+3.0V.
4. An active-LOW manual-reset that allows
RESET to be triggered by a pushbutton switch.
The active-HIGH RESET output is simply
the complement of the RESET output and is
guaranteed to be valid with VCC down to 1.1V.
Some µPs, such as Intel's 80C51, require an
active-HIGH reset pulse.
The SP706R/S/T devices are the same as the
SP708R/S/Tdevicesexceptfortheactive-HIGH
RESET substitution of the watchdog timer. The
SP706P device is the same as the SP706R de-
vice except an active-HIGH RESET is provided
rather than an active-LOW RESET.
Watchdog Timer
The SP706P/R/S/T-SP708R/S/T series watchdog
circuit monitors the µP's activity. If the µP does
not toggle the watchdog input (WDI) within 1.6
seconds and WDI is not tri-stated, WDO goes
LOW. As long as RESET is asserted or the WDI
input is tri-stated, the watchdog timer will stay
cleared and will not count. As soon as RESET
is released and WDI is driven HIGH or LOW,
the timer will start counting. Pulses as short as
50ns can be detected.
THEORY OF OPERATION
The SP706P/R/S/T-SP708R/S/T series is a mi-
croprocessor(µP)supervisorycircuitthatmoni-
tors the power supplied to digital circuits such
as microprocessors, microcontrollers, or
memory. The series is an ideal solution for
portable, battery-powered equipment that re-
quires power supply monitoring. Implementing
this series will reduce the number of compo-
nents and overall complexity of a system. The
watchdog functions of this product family will
continuously oversee the operational status of a
system. The operational features and benefits of
the SP706P/R/S/T-SP708R/S/T series are de-
scribed, in more detail, below.
Typically, WDO will be connected to the
non-maskable interrupt input (NMI) of a µP.
WhenVCC dropsbelowtheresetthreshold,WDO
will go LOW independent of the current status
of the watchdog timer. Normally this would
trigger an NMI but RESET goes LOW simulta-
neously, and thus overrides the NMI.
If WDI is left unconnected, WDO can be used as
a low-line output. Since floating WDI disables
the internal timer, WDO goes LOW only when
VCC falls below the reset threshold, thus
functioning as a low-line output.
RESET Output
A microprocessor's reset input starts the µP
in a known state. The SP706P/R/S/T-SP708R/
S/T series asserts reset during power-up and
prevents code execution errors during power-
down or brownout conditions.
Power-Fail Comparator
The power-fail comparator can be used for
various purposes because its output and
noninverting input are not internally connected.
The inverting input is internally connected to
a 1.25V reference.
Duringpower-up, onceVCC reaches1V, RESET
is a guaranteed logic LOW of 0.4V or less. As
VCC
rises,RESETstaysLOW.WhenVCC risesabove
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
10
t
WP
t
WD
t
WD
+3.3V
0V
WDI
+3.3V
0V
WDO
t
WD
+3.3V
RESET*
RESET*
0V
t
RS
+3.3V
0V
* externally triggered LOW by MR,
RESET is for the SP813L/813M only
Figure 14. Watchdog Timing Waveforms
Manual Reset
The manual-reset input (MR) allows RESET to
be triggered by a pushbutton switch. The switch
is effectively debounced by the 140ms
minimum RESET pulse width. MR is TTL/
CMOS logic compatible, so it can be driven by
an external logic line. MR can be used to force
a watchdog timeout to generate a RESET pulse
in the SP706P/R/S/T-SP708R/S/T series.
Simply connect WDO to MR.
To build an early-warning circuit for power
failure, connect the PFI pin to a voltage divider
as shown in Figure 16. Choose the voltage
divider ratio so that the voltage at PFI falls
below1.25Vjustbeforethe+5Vregulatordrops
out. UsePFOtointerrupttheµPsoitcanprepare
for an orderly power-down.
+3.3V
V
RT
V
RT
VCC
0V
+3.3V
0V
WDO
t
RS
t
RS
+3.3V
0V
RESET
MR*
+3.3V
0V
t
MD
*externally driven LOW
t
MR
Figure 15. Timing Diagrams with WDI Tri-stated. The RESET Output is the Inverse of the RESET Waveform
Shown.
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
11
VCC line. Connect PFO to MR to initiate a
RESET pulse when PFI drops below 1.25V.
Figure 17 shows the SP706R/S/T-SP708R/
S/TseriesconfiguredtoassertRESETwhenthe
+3.3V/+3.0V supply falls below the RESET
threshold, or when the +12V supply falls below
approximately 11V.
Ensuring a Valid RESET Output Down to
VCC = 0V
When VCC falls below 1V, the RESET output no
longer sinks current, it becomes an open circuit.
High-impedanceCMOSlogicinputscandriftto
undeterminedvoltagesifleftundriven. Ifapull-
down resistor is added to the RESET pin, any
stray charge or leakage currents will be shunted
to ground, holding RESET LOW. The resistor
value is not critical. It should be about 100KΩ,
large enough not to load RESET and small
enough to pull RESET to ground.
Monitoring a Negative Voltage Supply
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 18.
When the negative rail is good (a negative
voltage of large magnitude), PFO is LOW. By
adding the resistors and transistor as shown, a
HIGH PFO triggers RESET. As long as PFO
remains HIGH, the SP706P/R/S/T-SP708R/S/
T series will keep RESET asserted (where
RESET=LOWandRESET=HIGH). Notethat
this circuit's accuracy depends on the PFI
threshold tolerance, the VCC line, and the resis-
tors.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC
by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
sensitivity to high-frequency noise on the
line being monitored. RESET can be used to
monitor voltages other than the +3.3V/+3.0V
Interfacing to mPs with Bidirectional
RESET Pins
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
RESET output. If, for example, the RESET
Regulated +3.3V/+3.0V
Power Supply
+12V
+3.3V/+3.0V
Unregulated DC
Power Supply
0.1µF
V
CC
1MΩ
V
CC
1%
MR
V
CC
R
1
2
PFI
RESET
RESET
µP
PFI
MR
INTERRUPT
PFO
PFI
PFO
130KΩ
1%
I/O LINE
NMI
R
WDO
RESET
to µP
GND
GND
GND
PUSHBUTTON
SWITCH
Figure 16. Typical Operating Circuit
Figure 17. Monitoring Both +3.3V/+3.0V and +12V
Power Supplies
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
12
themagnitudeindicated(resetcomparatorover-
drive). The graph shows the maximum pulse
width a negative-going VCC transient may
typically have without causing a reset pulse to
be issued. As the amplitude of the transient
increases (i.e. goes farther below the reset
threshold), the maximum allowable pulse width
decreases. Typically, a VCC transient that goes
100mV below the reset threshold and lasts for
40µs or less will not cause a reset pulse to be
issued.A100nFbypasscapacitormountedclose
to the VCC pin provides additional transient
immunity.
output is driven HIGH and the µP wants to pull
it LOW, indeterminate logic levels may result.
To correct this, connect a 4.7kΩ resistor
between the RESET output and the µP reset
I/O, as shown if Figure 19. Buffer the
RESET output to other system components.
Negative-Going VCC Transients
While issuing resets to the µP during power-up,
power-down, and brownout conditions, these
supervisors are relatively immune to short-
durationnegative-goingV transients(glitches).
ItisusuallyundesirabletoCrCesettheµPwhenVCC
experiences only small glitches.
Applications
The SP706P/R/S/T-SP708R/S/T series offers
unmatched performance and the lowest power
consumption for these industry standard de-
vices. Refer to Figures 21 and 22 for supply
currentperformancecharacteristicsratedagainst
temperature and supply voltages.
Figure 20 shows maximum transient dura-
tion vs. reset-comparator overdrive, for which
reset pulses are not generated. The data was gen-
erated using negative-going VCC pulses, starting
at 3.3V and ending below the reset threshold by
+3.3V/+3.0V
V
CC
R
1
100kΩ
MR
Buffered RESET connects to System Components
PFI
PFO
2N3904
100kΩ
R2
RESET
+3.3V/+3.0V
+3.3V/+3.0V
to µP
V-
GND
VCC
VCC
V
CC - 1.25
R
R
1
=
, VTRIP < 0
1.25 - VTRIP
2
µP
RESET
RESET
4.7KΩ
+3.3V
MR
0V
V-
V-
GND
GND
+3.3V
PFO
0V
V
TRIP
0V
Figure 18. Monitoring a Negative Voltage Supply
Figure 19. Interfacing to Microprocessors with
Bidirectional RESET I/O for the SP706
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
13
20.2
20.1
20.0
19.9
19.8
19.7
19.6
19.5
19.4
Maximum Transient Duration
100
80
Vcc=3.3V
1nF Capacitor
V
OUT TO GND
60
40
Above Line
RESET
Generated
20
0
NO
RESET
Generated
10
1000
100
10000
-60
-40
-20
0
20
40
60
80
100
Reset Overdrive (mV)
Temperature (°C)
Figure 20. Maximum Transient Duration Without
Causing a Reset Pulse vs. Reset Comparator Overdrive
Figure 21. Supply Current vs. Temperature
30
28
26
24
22
20
18
16
14
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
Figure 22. Supply Current vs. Supply Voltage
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
14
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1
E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
(0.381min.)
D
A = 0.210" max.
(5.334 max).
C
A2
Ø
L
B1
B
e
= 0.300 BSC
(7.620 BSC)
e = 0.100 BSC
(2.540 BSC)
A
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
8–PIN
0.115/0.195
(2.921/4.953)
A2
0.014/0.022
(0.356/0.559)
B
0.045/0.070
B1
C
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.355/0.400
(9.017/10.160)
D
0.300/0.325
(7.620/8.255)
E
0.240/0.280
E1
L
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
Ø
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
15
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
E
H
h x 45°
D
A
Ø
A1
L
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
8–PIN
A
A1
B
D
E
0.053/0.069
(1.346/1.748)
0.004/0.010
(0.102/0.249
0.014/0.019
(0.35/0.49)
0.189/0.197
(4.80/5.00)
0.150/0.157
(3.802/3.988)
e
0.050 BSC
(1.270 BSC)
H
h
0.228/0.244
(5.801/6.198)
0.010/0.020
(0.254/0.498)
L
0.016/0.050
(0.406/1.270)
Ø
0°/8°
(0°/8°)
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
16
PACKAGE: PLASTIC
MICRO SMALL
OUTLINE (µSOIC)
0.0256
BSC
12.0˚
±4˚
0.012
±0.003
0.008
0˚ - 6˚
0.0965
±0.003
0.006
±0.006
R .003
0.006
±0.006
0.118
±0.004
0.16
±0.003
3.0˚
±3˚
12.0˚
±4˚
0.0215
1
±0.006
0.020
0.020
0.037
Ref
1
2
0.116
±0.004
0.034
±0.004
0.116
±0.004
0.040
±0.003
0.013
±0.005
0.118
±0.004
0.004
±0.002
0.118
±0.004
All package dimensions are in inches
50 USOIC devices per tube
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
17
ORDERING INFORMATION
Model .......................................................................................Temperature Range ................................................................................ Package
SP706PCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706PCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706PCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706RCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706RCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706RCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706SCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706SCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706SCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706TCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP706TCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP706TCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP706PEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706PEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706PEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706REP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706REN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706REU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706SEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706SEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706SEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP706TEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP706TEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP706TEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708RCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708RCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708RCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708SCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708SCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708SCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708TCP ..................................................................................... 0°C to +70°C ................................................................................... 8–pin PDIP
SP708TCN ..................................................................................... 0°C to +70°C ................................................................................ 8–pin NSOIC
SP708TCU ..................................................................................... 0°C to +70°C ................................................................................. 8-pin µSOIC
SP708REP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708REN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708REU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708SEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708SEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708SEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
SP708TEP ................................................................................... -40°C to +85°C ................................................................................. 8–pin PDIP
SP708TEN ................................................................................... -40°C to +85°C .............................................................................. 8–pin NSOIC
SP708TEU ................................................................................... -40°C to +85°C ............................................................................... 8-pin µSOIC
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Co rp o ra tio n
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev. 10-17-00
SP706 +3.0/ +3.3 Low Power Microprocessor Circuits
© Copyright 2000 Sipex Corporation
18
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