SP507CF-L [SIPEX]
Line Transceiver, 7 Func, 7 Driver, 7 Rcvr, PQFP80, MS-022BEC, MQFP-80;
| 型号： | SP507CF-L |
| 厂家： | 
SIPEX CORPORATION |
| 描述： | Line Transceiver, 7 Func, 7 Driver, 7 Rcvr, PQFP80, MS-022BEC, MQFP-80 |
| 文件： | 总28页 (文件大小：429K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
SP507
+5V, Single ChipWAN Multi-Mode SerialTransceiver
■ Interface Modes Supported:
■ RS-232 (V.28)
■ X.21/RS-422 (V.11)
■ EIA-530 (V.10 & V.11) ■ EIA-530A (V.10 & V.11)
■ RS-449 (V.10 & V.11) ■ V.35 (V.35 & V.28)
■ Software Selectable Protocols
■ Highest Differential Transmission Rates
available at over 20Mbps
■ +5V Only Operation
■ Seven (7) Drivers and Seven (7) Receivers
■ Driver and Receiver Tri-state Control
■ Internal Transceiver Termination Resistors for
V.11 and V.35 Protocols
■ Improved ESD Tolerance for Analog I/Os
■ Compliant to NET1/2 and TBR2 Physical Layer
Requirements
■ Used in WAN Serial Ports in Routers Switches,
DSU/CSU's and other Access Devices
■ Available in 132-Lead Small Scale Ball Grid
Array and 80-Lead MQFP
DESCRIPTION
The SP507 is a monolithic IC that supports seven (7) popular serial interface standards for
DTE/DCE connectivity. The seven (7) drivers and seven (7) receivers transmit and receive
signals at over 20Mbps. The SP507 requires no additional external components for compliant
operation for all seven (7) modes of operation. All necessary termination is integrated within
the SP507 and is switchable when V.35 drivers, V.35 receivers, and V.11 receivers are used.
The SP507 can operate as either a DTE or DCE.
Additional features include a latch enable pin with the driver and receiver address decoder.
Tri-state ability for the driver and receiver outputs is controlled by supplying a 3-bit word into
the address decoder. Four (4) drivers and four (4) receivers in the SP507 include separate
enable pins for added convenience.
V.35
EIA-530
WAN
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
1
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability.
STORAGE CONSIDERATIONS
Due to the relatively large package size of the 80-pin
quad flat-pack, storage in a low humidity environment
is preferred. Large high density plastic packages are
moisture sensitive and should be stored in Dry Vapor
Barrier Bags. Prior to usage, the parts should remain
baggedandstoredbelow40°Cand60%RH.Iftheparts
are removed from the bag, they should be used within
48hoursorstoredinanenvironmentatorbelow20%RH.
If the above conditions cannot be followed, the parts
should be baked for four hours at 125°C in order
remove moisture prior to soldering. Sipex ships the
80-pin QFP in Dry Vapor Barrier Bags with a humidity
indicator card and desiccant pack. The humidity indicator
should be below 30%RH.
VCC............................................................................+7V
Input Voltages:
Logic...............................-0.3Vto(VCC+0.5V)
Drivers............................-0.3Vto(VCC+0.5V)
Receivers........................................±15.5V
Output Voltages:
Logic................................-0.3Vto(VCC+0.5V)
Drivers................................................±15V
Receivers........................-0.3Vto(VCC+0.5V)
StorageTemperature..........................-65˚Cto+150˚C
Power Dissipation per package
80-pinQFP(derate18.3mW/˚Cabove+70˚C)...1500mW
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
CONDITIONS
LOGIC INPUTS
VIL
VIH
0.8
Volts
Volts
2.0
LOGIC OUTPUTS
VOL
VOH
0.4
Volts
Volts
IOUT= –3.2mA
IOUT= 1.0mA
2.4
V.28 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Loaded Voltage
Short-Circuit Current
Power-Off Impedance
AC Parameters
Outputs
±15
±15
±100
Volts
Volts
mA
per Figure 1
per Figure 2
per Figure 4
per Figure 5
±5.0
300
Ω
VCC = +5V for AC parameters
Transition Time
Instantaneous Slew Rate
Propagation Delay
tPHL
1.5
30
µs
V/µs
per Figure 6; +3V to -3V
per Figure 3
0.5
0.5
1
1
5
5
µs
µs
tPLH
Max.Transmission Rate
120
230
kbps
V.28 RECEIVER
DC Parameters
Inputs
Input Impedance
Open-Circuit Bias
HIGH Threshold
LOW Threshold
AC Parameters
Propagation Delay
tPHL
3
7
+2.0
3.0
kΩ
per Figure 7
per Figure 8
Volts
Volts
Volts
1.7
1.2
0.8
VCC = +5V for AC parameters
50
50
100
100
500
500
ns
ns
tPLH
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
2
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
CONDITIONS
V.28 RECEIVER (continued)
AC Parameters (cont.)
Max.Transmission Rate
120
230
kbps
V.10 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
±4.0
±6.0
Volts
Volts
mA
per Figure 9
per Figure 10
per Figure 11
per Figure 12
Test-Terminated Voltage 0.9VOC
Short-Circuit Current
Power-Off Current
AC Parameters
±150
±100
µA
VCC = +5V for AC parameters
Outputs
Transition Time
200
ns
per Figure 13; 10% to 90%
Propagation Delay
tPHL
tPLH
50
50
100
100
500
500
ns
ns
Max.Transmission Rate
120
kbps
V.10 RECEIVER
DC Parameters
Inputs
Input Current
Input Impedance
Sensitivity
–3.25
4
+3.25
mA
kΩ
Volts
per Figures 14 and 15
±0.3
AC Parameters
Propagation Delay
tPHL
VCC = +5V for AC parameters
50
50
120
120
250
250
ns
ns
tPLH
Max.Transmission Rate
120
kbps
V.11 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Test Terminated Voltage
±5.0
Volts
Volts
Volts
Volts
Volts
mA
per Figure 16
per Figure 17
±2.0
0.5VOC
0.67VOC
±0.4
+3.0
±150
±100
Balance
Offset
Short-Circuit Current
Power-Off Current
AC Parameters
Outputs
per Figure 17
per Figure 17
per Figure 18
per Figure 19
µA
VCC = +5V for AC parameters
Transition Time
Propagation Delay
tPHL
20
ns
per Figures 21 and 36; 10% to 90%
50
50
65
65
10
85
85
20
ns
ns
ns
per Figures 33 and 36, CL = 50pF
per Figures 33 and 36, CL = 50pF
per Figures 33 and 36, CL = 50pF
per Figure 33, CL = 50pF
tPLH
Differential Skew
Max.Transmission Rate
20
Mbps
fIN = 10MHz
V.11 RECEIVER
DC Parameters
Inputs
Common Mode Range
Sensitivity
–7
+7
±0.3
Volts
Volts
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
3
SPECIFICATIONS
TA = +25°C and VCC = +4.75V to +5.25V unless otherwise noted.
MIN.
TYP.
MAX.
UNITS
CONDITIONS
V.11 RECEIVER (continued)
DC Parameters (cont.)
Input Current
–3.25
4
±3.25
±60.75
mA
mA
kΩ
per Figure 20 and 22
per Figure 23 and 24
Current w/ 100Ω Termination
Input Impedance
AC Parameters
Propagation Delay
tPHL
VCC = +5V for AC parameters
30
30
65
65
10
85
85
ns
ns
ns
per Figures 33 and 38; CL = 50pF
per Figures 33 and 38; CL = 50pF
per Figure 33; CL = 50pF
per Figure 33; CL = 50pF
fIN = 10MHz
tPLH
Differential Skew
Max.Transmission Rate
20
Mbps
V.35 DRIVER
DC Parameters
Outputs
Open Circuit Voltage
Test Terminated Voltage
Offset
±1.20
±0.66
±0.6
150
Volts
Volts
Volts
Ω
per Figure 16
per Figure 25
per Figure 25
per Figure 27; ZS = V2/V1 x 50Ω
per Figure 28
±0.44
Source Impedance
Short-Circuit Impedance
AC Parameters
Outputs
50
135
165
Ω
VCC = +5V for AC parameters
Transition Time
Propagation Delay
tPHL
30
40
ns
per Figure 29; 10% to 90%
50
50
70
70
7
90
90
10
ns
ns
ns
per Figures 33 and 36; CL = 20pF
per Figures 33 and 36; CL = 20pF
per Figures 33 and 36; CL = 20pF
per Figure 33; CL = 20pF
tPLH
Differential Skew
Max.Transmission Rate
20
Mbps
fIN = 10MHz
V.35 RECEIVER
DC Parameters
Inputs
Sensitivity
±80
mV
Ω
Ω
Source Impedance
Short-Circuit Impedance
AC Parameters
Propagation Delay
tPHL
90
135
110
165
per Figure 30; ZS = V2/V1 x 50Ω
per Figure 31
VCC = +5V for AC parameters
30
30
75
75
10
90
90
ns
ns
ns
per Figures 33 and 38; CL = 20pF
per Figures 33 and 38; CL = 20pF
per Figure 33; CL = 20pF
per Figure 33; CL = 20pF
fIN = 10MHz
tPLH
Differential Skew
Max.Transmission Rate
20
Mbps
TRANSCEIVER LEAKAGE CURRENTS
Driver Output 3-State Current
Rcvr Output 3-State Current
500
1
µA
µA
per Figure 32; Drivers disabled
Mx = 111, 0.4V ≤ VO ≤ 2.4V
10
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
4
OTHER AC CHARACTERISTICS
TA = +25°C and VCC = +5.0V unless otherwise noted.
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
DRIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
0.70
0.40
0.20
0.40
5.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
RS-423/V.10
tPZL; Tri-state to Output LOW
0.15
0.20
0.20
0.15
2.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
CL = 100pF, Fig. 34 & 40; S1
closed
CL = 100pF, Fig. 34 & 40; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
RS-422/V.11
tPZL; Tri-state to Output LOW
2.80
0.10
0.10
0.10
10.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 34 & 37; S1
closed
CL = 100pF, Fig. 34 & 37; S2
closed
CL = 15pF, Fig. 34 & 37; S1
closed
CL = 15pF, Fig. 34 & 37; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
V.35
tPZL; Tri-state to Output LOW
2.60
0.10
0.10
0.15
10.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 34 & 37; S1
closed
CL = 100pF, Fig. 34 & 37; S2
closed
CL = 15pF, Fig. 34 & 37; S1
closed
CL = 15pF, Fig. 34 & 37; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
RECEIVER DELAY TIME BETWEEN ACTIVE MODE AND TRI-STATE MODE
RS-232/V.28
tPZL; Tri-state to Output LOW
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
0.12
0.10
0.10
0.10
2.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 35 & 38; S1
closed
CL = 100pF, Fig. 35 & 38; S2
closed
CL = 100pF, Fig. 35 & 38; S1
closed
CL = 100pF, Fig. 35 & 38; S2
closed
RS-423/V.10
tPZL; Tri-state to Output LOW
0.10
0.10
0.10
0.10
2.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 35 & 38; S1
closed
CL = 100pF, Fig. 35 & 38; S2
closed
CL = 100pF, Fig. 35 & 38; S1
closed
CL = 100pF, Fig. 35 & 38; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
5
OTHER AC CHARACTERISTICS (Continued)
TA = +25°C and VCC = +5.0V unless otherwise noted.
PARAMETER
MIN.
TYP.
MAX.
UNITS
CONDITIONS
RS-422/V.11
tPZL; Tri-state to Output LOW
0.10
0.10
0.10
0.10
2.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 35 & 39; S1
closed
CL = 100pF, Fig. 35 & 39; S2
closed
CL = 15pF, Fig. 35 & 39; S1
closed
CL = 15pF, Fig. 35 & 39; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
V.35
tPZL; Tri-state to Output LOW
0.10
0.10
0.10
0.10
2.0
2.0
2.0
2.0
µs
µs
µs
µs
CL = 100pF, Fig. 35 & 39; S1
closed
CL = 100pF, Fig. 35 & 39; S2
closed
CL = 15pF, Fig. 35 & 39; S1
closed
CL = 15pF, Fig. 35 & 39; S2
closed
tPZH; Tri-state to Output HIGH
tPLZ; Output LOW to Tri-state
tPHZ; Output HIGH to Tri-state
TRANSCEIVER TO TRANSCEIVER SKEW
(per Figures 33, 36, 38)
V.28 Driver
100
100
20
20
2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[ (tphl
[ (tplh
[ (tphl
[ (tplh
[ (tphl
[ (tplh
[ (tphl
[ (tplh
[ (tphl
[ (tplh
[ (tphl
[ (tplh
[ (tphl
[ (tplh
)
)
Tx1 – (tphl
Tx1 – (tplh
)
)
]
]
Tx6,7
Tx6,7
V.28 Receiver
V.11 Driver
)
Rx1 – (tphl
Rx1 – (tphl
Tx1 – (tphl
Tx1 – (tplh
)
)
]
]
Rx2,7
)
Rx2,7
)
)
)
]
Tx6,7
Tx6,7
2
)
]
V.11 Receiver
V.10 Driver
3
)
Rx1 – (tphl
)
)
]
]
Rx2,7
3
)Rx1 – (tphl
)
Rx2,7
5
Tx2 – (tphl
)
)
]
Tx3,4,5
Tx3,4,5
5
)
Tx2 – (tplh
]
V.10 Receiver
V.35 Driver
5
)
Rx2 – (tphl
)
)
]
]
Rx3,4,5
5
)Rx2 – (tphl
)
Rx3,4,5
4
Tx1 – (tphl
Tx1 – (tplh
)
)
]
Tx6,7
Tx6,7
4
)
]
V.35 Receiver
6
6
ns
ns
[ (tphl
[ (tplh
)
)
– (tphl
)
)
]
]
Rx2,7
Rx2,7
RRxx11 – (tphl
POWER REQUIREMENTS
PARAMETER
MIN.
TYP.
MAX. UNITS
CONDITIONS
VCC
ICC
4.75
5.00
5.25
Volts
mA
(No Mode Selected)
(V.28/RS-232)
(V.11/X.21)
(EIA-530 & RS-449)
(V.35)
30
65
175
250
100
All ICC values are with VCC = +5V
mA fIN = 120kbps; Drivers active & loaded.
mA fIN = 10Mbps; Drivers active & loaded.
mA
mA
fIN = 10Mbps; Drivers active & loaded.
V.35 @ fIN = 10Mbps, V.28 @ 120kbps;
Drivers active & loaded.
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
6
TEST CIRCUITS
A
A
VOC
VT
3kΩ
C
C
Figure 1. V.28 Driver Output Open Circuit Voltage
Figure 2. V.28 Driver Output Loaded Voltage
A
A
Isc
Oscilloscope
VT
7kΩ
C
C
Scope used for slew rate
measurement.
Figure 3. V.28 Driver Output Slew Rate
Figure 4. V.28 Driver Output Short-Circuit Current
V
= 0V
CC
A
A
Ix
Oscilloscope
3kΩ
2500pF
±2V
C
C
Figure 6. V.28 Driver Output Rise/Fall Times
Figure 5. V.28 Driver Output Power-Off Impedance
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
7
A
A
Iia
±15V
Voc
C
C
Figure 7. V.28 Receiver Input Impedance
Figure 8. V.28 Receiver Input Open Circuit Bias
A
A
Vt
VOC
450Ω
3.9kΩ
C
C
Figure 9. V.10 Driver Output Open-Circuit Voltage
Figure 10. V.10 Driver Output Test Terminated Voltage
V
= 0V
CC
A
A
Ix
±0.25V
Isc
C
C
Figure 11. V.10 Driver Output Short-Circuit Current
Figure 12. V.10 Driver Output Power-Off Current
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
8
A
A
Iia
±10V
Oscilloscope
450Ω
C
C
Figure 13. V.10 Driver Output Transition Time
Figure 14. V.10 Receiver Input Current
V.10 RECEIVER
A
+3.25mA
+10V
VOCA
3.9kΩ
VOC
VOCB
–10V
–3V
B
+3V
Maximum Input Current
versus Voltage
C
–3.25mA
Figure 15. V.10 Receiver Input IV Graph
Figure 16. V.11 and V.35 Driver Output Open-Circuit
Voltage
A
Isa
A
50Ω
50Ω
VT
Isb
B
B
V
OS
C
C
Figure 17. V.11 Driver Output Test Terminated Voltage
Figure 18. V.11 Driver Output Short-Circuit Current
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
9
V
= 0V
CC
A
Iia
A
Ixa
±10V
±0.25V
B
B
C
C
V
= 0V
CC
A
A
±0.25V
±10V
Ixb
Iib
B
B
C
C
Figure 19. V.11 Driver Output Power-Off Current
Figure 20. V.11 Receiver Input Current
V.11 RECEIVER
+3.25mA
A
50Ω
Oscilloscope
50Ω
–10V
–3V
B
VE
50Ω
+3V
+10V
C
Maximum Input Current
versus Voltage
–3.25mA
Figure 22. V.11 Receiver Input IV Graph
Figure 21. V.11 Driver Output Rise/Fall Time
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
10
V.11 RECEIVER
w/ Optional Cable Termination
(100Ω to 150Ω)
A
i [mA] = V [V] / 0.1
Iia
i [mA] = (V [V] – 3) / 4.0
±6V
100Ω to
150Ω
–6V
–3V
+3V
+6V
B
i [mA] = (V [V] – 3) / 4.0
C
Maximum Input Current
versus Voltage
i [mA] = V [V] / 0.1
Figure 24. V.11 Receiver Input Graph w/ Termination
A
A
±6V
50Ω
100Ω to
150Ω
VT
50Ω
Iib
B
VOS
B
C
C
Figure 23. V.11 Receiver Input Current w/ Termination
Figure 25. V.35 Driver Output Test Terminated Voltage
V1
A
A
50Ω
24kHz, 550mV
p-p
Sine Wave
50Ω
VT
V2
50Ω
VOS
B
B
C
C
Figure 26. V.35 Driver Output Offset Voltage
Figure 27. V.35 Driver Output Source Impedance
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
11
A
A
50Ω
50Ω
Oscilloscope
ISC
B
B
50Ω
±2V
C
C
Figure 29. V.35 Driver Output Rise/Fall Time
Figure 28. V.35 Driver Output Short-Circuit Impedance
A
V1
A
50Ω
24kHz, 550mV
p-p
Sine Wave
V2
Isc
B
B
±2V
C
C
Figure 30. V.35 Receiver Input Source Impedance
Figure 31. V.35 Receiver Input Short-Circuit Impedance
Any one of the three conditions for disabling the driver.
1
1
1
VCC = 0V
C
C
L1
M2
M1
M0
A
B
A
A
B
TIN
VCC
IZSC
±15V
ROUT
L2
15pF
fIN (50% Duty Cycle, 2.5V
)
P-P
Logic “0”
B
Figure 33. Driver/Receiver Timing Test Circuit
Figure 32. Driver Output Leakage Current Test
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
12
1KΩ
Test Point
V
CC
Receiver
Output
S
S
V
CC
1
S
S
500Ω
1
Output
Under
Test
C
RL
1KΩ
C
L
2
2
Figure 35. Receiver Timing Test Load Circuit
Figure 34. Driver Timing Test Load Circuit
f > 10MHz; t < 10ns; t < 10ns
R
F
+3V
DRIVER
INPUT
1.5V
1.5V
0V
t
t
PHL
PLH
A
1/2V
1/2V
O
O
DRIVER
OUTPUT
V
O
B
+
t
t
DPHL
DPLH
DIFFERENTIAL
OUTPUT
V
V
O
0V
–
V
A
– V
O
B
t
R
t
F
t
t
t
SKEW =
|
DPLH - DPHL |
Figure 36. Driver Propagation Delays
+3V
1.5V
1.5V
Mx or Tx_Enable
0V
t
t
LZ
ZL
5V
2.3V
A, B
Output normally LOW
0.5V
0.5V
V
OL
V
OH
Output normally HIGH
A, B
2.3V
0V
t
t
HZ
ZH
Figure 37. Driver Enable and Disable Times
f > 10MHz; tR < 10ns; tF < 10ns
+
–
V0D2
0V
0V
A – B
INPUT
V0D2
OUTPUT
VOH
VOL
(VOH - VOL)/2
(VOH - VOL)/2
RECEIVER OUT
tPLH
tPHL
tSKEW
tPHL tPLH
- |
= |
Figure 38. Receiver Propagation Delays
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
13
+3V
0V
1.5V
1.5V
Mx or RCVR Enable
RECEIVER OUT
RECEIVER OUT
t
t
LZ
ZL
5V
50%
Output normally LOW
Output normally HIGH
0.5V
0.5V
V
IL
V
IH
50%
0V
t
t
HZ
ZH
Figure 39. Receiver Enable and Disable Times
+3V
Mx or Tx_Enable
0V
1.5V
1.5V
t
LZ
t
ZL
0V
T
OUT
V
OL
Output LOW
0.5V
0.5V
+3V
1.5V
1.5V
t
Mx or Tx_Enable
0V
t
HZ
ZH
Output HIGH
0.5V
V
OH
T
OUT
0.5V
0V
Figure 40. V.28 (RS-232) and V.10 (RS-423) Driver Enable and Disable Times
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
14
Figure 42. Typical V.10 Driver Output Waveform
Figure 41. Typical V.28 Driver Output Waveform
Figure 43. Typical V.11 Driver Output Waveforms
Figure 44. Typical V.35 Driver Output Waveforms
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
15
Pin 61 — SD(a) — Analog Out — Send data,
inverted; sourced from TxD.
PINOUT (QFP)
Pin 63 — TT(a) — Analog Out — Terminal
Timing, inverted; sourced from TxCE.
Pin 65 — TT(b) — Analog Out — Terminal
Timing, non–inverted; sourced from TxCE.
RxD
RTEN
1
2
3
4
5
6
7
8
9
60 GND
59 SD(b)
58 TR(a)
57 GND
56 TR(b)
RREN
TMEN
Pin 70 — RD(a) — Receive Data, analog input;
inverted; source for RxD.
LLEN
TTEN
55 V
CC
SCTEN
LATCH
TERM_OFF
54 RS(a)
53 GND
52 RS(b)
51 LL(a)
50 GND
49 LL(b)
M2 10
M1 11
Pin 71 — RD(b) — Receive Data; analog input;
non-inverted; source for RxD.
M0 12
SP507
DTR 13
TxD 14
TxCE 15
RTS 16
RL 17
48 V
CC
47 RL(a)
46 GND
45 RL(b)
44 ST(b)
43 GND
42 ST(a)
Pin 76 — SCT(a) — Serial Clock Transmit;
analog input, inverted; source for DCE_ST.
RLEN 18
DCD 19
RxC 20
41
V
CC
Pin 77 — SCT(b) — Serial Clock Transmit:
analoginput,non–inverted;sourceforDCE_ST.
Pin 79 — DTE_ST — Serial Clock Transmit;
TTL output; sources from SCT(a) and SCT(b)
inputs.
PIN ASSIGNMENTS
CLOCK AND DATA GROUP
CONTROL LINE GROUP
Pin 13 — DTR — Data Terminal Ready; TTL
input; source for TR(a) and TR(b) outputs.
Pin 1 — RxD — Receive Data; TTL output,
sourced from RD(a) and RD(b) inputs.
Pin 16 — RTS — Ready To Send; TTL input;
source for RS(a) and RS(b) outputs.
Pin 14 — TxD — TTL input ; transmit data
source for SD(a) and SD(b) outputs.
Pin 17 — RL — Remote Loopback; TTL input;
source for RL(a) and RL(b) outputs.
Pin 15 — TxCE — Transmit Clock; TTL input
for TT driver outputs.
Pin 19 — DCD— Data Carrier Detect; TTL
output; sourced from RR(a) and RR(b) inputs.
Pin 20 — RxC — Receive Clock; TTL output
sourced from RT(a) and RT(b) inputs.
Pin 21 — TM — Ring In; TTL output; sourced
from TM(a) and TM(b) inputs.
Pin 22 — DCE_ST — Send Timing; TTL input;
source for ST(a) and ST(b) outputs.
Pin 24 — LL — Local Loopback; TTL input;
source for LL(a) and LL(b) outputs.
Pin 37 — RT(a) — Receive Timing; analog
input, inverted; source for RxC.
Pin 35 — RR(a)— Receiver Ready; analog
input, inverted; source for DCD.
Pin 38 — RT(b) — Receive Timing; analog
input, non-inverted; source for RxC.
Pin 36 — RR(b)— Receiver Ready; analog
input, non-inverted; source for DCD.
Pin 42 — ST(a) — Send Timing; analog output,
inverted; sourced from DCE_ST.
Pin39—TM(a)—IncomingCall;analoginput,
inverted; source for TM.
Pin 44 — ST(b) — Send Timing; analog output,
non-inverted; sourced from DCE_ST.
Pin40—TM(b)—IncomingCall;analoginput,
non-inverted; source for TM.
Pin 59 — SD(b) — Analog Out — Send data,
non-inverted; sourced from TxD.
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
16
Pin 45 — RL(b) — Remote Loopback; analog
output, non-inverted; sourced from RL.
Pin 7 — SCTEN — Enables DTE_ST receiver;
active low; TTL input.
Pin 47 — RL(a) — Remote Loopback; analog
output inverted; sourced from RL.
Pin 8 — LATCH — Latch control for decoder
bits (pins 10-12), active low. Logic high input
will make decoder transparent.
Pin 49— LL(b) — Local Loopback; analog
output, non-inverted; sourced from LL.
Pin 9 — TERM_OFF — Disables receiver
termination networks for RxD, RxC, and
DTE_ST; TTL input.
Pin 51 — LL(a) — Local Loopback; analog
output, inverted; sourced from LL.
Pins 10,11, 12 — M2, M1, M0 — Transmitter
and receiver decode register; configures
transmitter and receiver modes; TTL inputs.
Pin 52 — RS(b) — Ready To Send; analog
output, non-inverted; sourced from RTS.
Pin 54 — RS(a) — Ready To Send; analog
output, inverted; sourced from RTS.
Pin 18 — RLEN — Enables RL driver; active
high; TTL input.
Pin 56 — TR(b) — Terminal Ready; analog
output, non-inverted; sourced from DTR.
Pin 23 — STEN — Enables DTE_ST driver;
active high; TTL input.
Pin 58 — TR(a) — Terminal Ready; analog
output, inverted; sourced from DTR.
POWER SUPPLIES
Pins25, 33, 41, 48, 55, 62, 73, 74 —VCC —+5V
input.
Pin 66 — CS(a)— Clear To Send; analog input,
inverted; source for CTS.
Pin 67 — CS(b)— Clear To Send; analog input,
non-inverted; source for CTS.
Pins 29, 34, 43, 46, 50, 53, 57, 60, 64, 72, 75 —
GND — Ground.
Pin 68 — DM(a)— Data Mode; analog input,
inverted; source for DSR.
Pin27—VDD +10VChargePumpCapacitor—
Connects from VDD to VCC. Suggested
capacitor size is 22µF, 16V.
Pin 69 — DM(b)— Data Mode; analog input,
non-inverted; source for DSR
Pin 32 — VSS –10V Charge Pump Capacitor —
Connects from ground to VSS. Suggested
capacitor size is 22µF, 16V.
Pin 78 — DSR— Data Set Ready; TTL output;
sourced from DM(a) and DM(b) inputs.
–
Pins 26 and 30 — C1+ and C1 — Charge Pump
Pin 80 — CTS— Clear To Send; TTL output;
sourced from CS(a) and CS(b) inputs.
+
–
Capacitor — Connects from C1 to C1 .
Suggested capacitor size is 22µF, 16V.
–
Pins 28 and 31 — C2+ and C2 — Charge Pump
+
–
Capacitor — Connects from C2 to C2 .
CONTROL REGISTERS
Pin 2—RTEN—EnablesRxCreceiver, active
low; TTL input.
Suggested capacitor size is 22µF, 16V.
Pin 3 — RREN — Enables DCD receiver,
active low; TTL input.
Pin 4—TMEN —EnablesTMreceiver, active
high; TTL input.
Pin 5 — LLEN — Enables LL driver, active
low; TTL input.
Pin 6 — TTEN — Enables TxCE driver, active
high; TTL input.
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
17
1N5819
25
22µF
22µF
(SEE PINOUT FOR VCC PINS)
22µF
+5V
27 26
V
DD
30 28
C1+ C1- C2+
31
C2-
10µF
V
CC
22µF
32
Charge Pump
V
SS
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
A
A
B
RD(b) 71
RT(a) 37
13 DTR
58 TR(a)
56 TR(b)
RxC 20
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
CTS 80
54 RS(a)
52 RS(b)
CS(b) 67
17 RL
DM(a) 68
47 RL(a)
45 RL(b)
18 RLEN
24 LL
DSR 78
DM(b) 69
RR(a) 35
51 LL(a)
49 LL(b)
DCD 19
RREN 3
RR(b) 36
5
LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
TM(a) 39
B
B
TM 21
TMEN 4
TM(b) 40
SCT(a) 76
DTE_ST 79
A
6
TTEN
SCTEN 7
SCT(b) 77
9
TERM_OFF
M2 10
A — Receiver Tri-State circuitry,
V.11, & V.35 termination
resistor circuitry (RxD,
RxC & DTE_ST).
M1 11
M0 12
B — Driver Tri-State circuitry &
V.35 termination circuitry
(TxD, TxCE & DCE_ST).
SP507
8
LATCH
(SEE PINOUT ASSIGNMENTS FOR GROUND PINS)
Figure 45. Typical Operating Circuit
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
18
SP507 Driver Mode Selection
V.11
EIA-530A
V.35
EIA-530
RS-232
110
RS-449
101
Pin Label
M2 - M0
SD(a)
SD(b)
TR(a)
TR(b)
RS(a)
RS(b)
RL(a)
RL(b)
LL(a)
Mode
111
X.21
000
001
100
010
011
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
3-state
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.10
V.11-
V.11+
V.10
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.10
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.10
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.11-
V.11+
V.10
V.28
3-state
V.28
V.35-
V.35+
V.28
3-state
V.11-
V.11+
V.11-
V.11+
V.10
3-state
V.28
3-state
V.28
3-state
V.28
3-state
V.28
3-state
V.28
3-state
V.28
3-state
V.11-
V.11+
V.11-
V.11+
3-state
V.11-
V.11+
V.11-
V.11+
3-state
V.11-
V.11+
V.11-
V.11+
LL(b)
3-state
V.11-
V.11+
V.11-
V.11+
3-state
V.11-
V.11+
V.11-
V.11+
3-state
V.28
3-state
ST(a)
ST(b)
TT(a)
V.35-
3-state
V.28
V.35+
V.35-
V.35+
3-state
TT(b)
Table 1. SP507 Driver Decoder Table
SP507 Receiver Mode Selection
Pin Label
M2 - M0
RD(a)
RD(b)
RT(a)
X.21
RS-232
110
Mode
V.11
EIA-530
V.35
RS-449
101
EIA-530A
011
111
000
010
100
001
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
>10kΩ to GND
V.28
V.11-
V.35-
V.11-
V.11-
V.11-
V.11-
>10kΩ to GND
V.28
V.11+
V.11-
V.11+
V.35+
V.35-
V.35+
V.11+
V.11-
V.11+
V.11+
V.11-
V.11+
V.11+
V.11-
V.11+
V.11+
V.11-
V.11+
RT(b)
>10kΩ to GND
V.28
CS(a)
V.11-
V.28
V.11-
V.11-
V.11-
V.11-
CS(b)
>10kΩ to GND
V.28
V.11+
V.11-
>10kΩ to GND
V.28
V.11+
V.11-
V.11+
V.11-
V.11+
V.10
V.11+
V.10
V.11+
V.11-
V.11+
V.11-
DM(a)
DM(b)
RR(a)
RR(b)
TM(a)
TM(b)
SCT(a)
SCT(b)
>10kΩ to GND
V.28
V.11+
>10kΩ to GND
V.28
>10kΩ to GND
V.11-
V.11+
V.11+
V.11-
V.11-
V.11-
>10kΩ to GND
V.28
V.11+
>10kΩ to GND
V.28
V.11+
V.11+
V.11+
V.10
V.10
V.10
V.10
>10kΩ to GND
V.28
>10kΩ to GND
V.11-
>10kΩ to GND >10kΩ to GND
>10kΩ to GND
V.11-
>10kΩ to GND
V.11-
>10kΩ to GND
V.11-
V.35-
V.11-
V.11+
>10kΩ to GND
V.11+
V.35+
V.11+
V.11+
V.11+
Table 2. SP507 Receiver Decoder Table
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
19
MODE: V.11
DRIVER/RECEIVER
M2
0
M1 M0
0
0
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
58 TR(a)
56 TR(b)
RxC 20
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
54 RS(a)
52 RS(b)
CTS 80
CS(b) 67
17 RL
DM(a) 68
DSR 78
47 RL(a)
45 RL(b)
18 RLEN
DM(b) 69
RR(a) 35
24 LL
DCD 19
51 LL(a)
RREN 3
RR(b) 36
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 46. Mode Diagram – V.11
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
20
MODE: EIA-530A
DRIVER/RECEIVER
M2
0
M1 M0
0
1
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
RxC 20
58 TR(a)
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
54 RS(a)
52 RS(b)
CTS 80
CS(b) 67
17 RL
DM(a) 68
DSR 78
47 RL(a)
45 RL(b)
18 RLEN
RR(a) 35
DCD 19
24 LL
51 LL(a)
RREN 3
RR(b) 36
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 47. Mode Diagram – EIA-530A
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
21
MODE: EIA-530
DRIVER/RECEIVER
M2
0
M1 M0
1
0
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
58 TR(a)
56 TR(b)
RxC 20
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
54 RS(a)
52 RS(b)
CTS 80
CS(b) 67
17 RL
DM(a) 68
DSR 78
47 RL(a)
45 RL(b)
18 RLEN
DM(b) 69
RR(a) 35
24 LL
DCD 19
51 LL(a)
RREN 3
RR(b) 36
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 48. Mode Diagram – EIA-530
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
22
MODE: X.21
DRIVER/RECEIVER
M2
0
M1 M0
1
1
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
58 TR(a)
56 TR(b)
RxC 20
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
54 RS(a)
52 RS(b)
CTS 80
CS(b) 67
17 RL
DM(a) 68
DSR 78
47 RL(a)
45 RL(b)
18 RLEN
DM(b) 69
RR(a) 35
24 LL
DCD 19
51 LL(a)
RREN 3
RR(b) 36
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 49. Mode Diagram – X.21
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
23
MODE: V.35
DRIVER/RECEIVER
M2
1
M1 M0
0
0
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
RxC 20
58 TR(a)
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
CTS 80
54 RS(a)
17 RL
DM(a) 68
DSR 78
47 RL(a)
18 RLEN
24 LL
RR(a) 35
DCD 19
RREN 3
51 LL(a)
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 50. Mode Diagram – V.35
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
24
MODE: RS-449
DRIVER/RECEIVER
M2
1
M1 M0
0
1
14 TxD
RD(a) 70
61 SD(a)
59 SD(b)
RxD 1
RD(b) 71
RT(a) 37
13 DTR
58 TR(a)
56 TR(b)
RxC 20
RTEN 2
RT(b) 38
16 RTS
CS(a) 66
54 RS(a)
52 RS(b)
CTS 80
CS(b) 67
17 RL
DM(a) 68
DSR 78
47 RL(a)
45 RL(b)
18 RLEN
DM(b) 69
RR(a) 35
24 LL
DCD 19
51 LL(a)
RREN 3
RR(b) 36
5 LLEN
22 DCE_ST
42 ST(a)
44 ST(b)
23 STEN
15 TxCE
63 TT(a)
65 TT(b)
6 TTEN
TM(a) 39
TM 21
TMEN 4
SCT(a) 76
DTE_ST 79
SCTEN 7
SCT(b) 77
RECEIVERS
DRIVERS
Figure 51. Mode Diagram – RS-449
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
25
MODE: RS-232 (V.28)
DRIVER/RECEIVER
M2
1
M1 M0
1
0
14 TxD
RD(a) 70
RxD 1
61 SD(a)
RT(a) 37
RxC 20
RTEN 2
13 DTR
58 TR(a)
16 RTS
CS(a) 66
CTS 80
54 RS(a)
17 RL
DM(a) 68
DSR 78
47 RL(a)
18 RLEN
24 LL
RR(a) 35
DCD 19
RREN 3
51 LL(a)
5 LLEN
22 DCE_ST
TM(a) 39
TM 21
42 ST(a)
TMEN 4
23 STEN
15 TxCE
SCT(a) 76
DTE_ST 79
SCTEN 7
63 TT(a)
6 TTEN
RECEIVERS
DRIVERS
Figure 52. Mode Diagram – RS-232
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
26
PACKAGE: 80 PIN MQFP
D
D1
D2
0.30" RAD. TYP.
PIN 1
c
0.20" RAD. TYP.
E1
C
L
5°-16°
E
E2
0° MIN.
0°–7°
5°-16°
C
L
L
L1
A2
A
Seating
Plane
A1
b
e
80–PIN MQFP
JEDEC MS-22
(BEC) Variation
DIMENSIONS
Minimum/Maximum
(mm)
COMMON DIMENTIONS
SYMBOL
MIN
NOM MAX
2.45
SYMBL MIN NOM MAX
A
A1
A2
b
c
L
0.11
23.00
0.00
1.80
0.22
0.25
0.73 0.88 1.03
1.60 BASIC
2.00
2.20
0.40
L1
D
17.20 BSC
14.00 BSC
12.35 REF
17.20 BSC
14.00 BSC
12.35 REF
0.65 BSC
80
D1
D2
E
E1
E2
e
N
80 PIN MQFP (MS-022 BC)
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
27
ORDERING INFORMATION
Model
Temperature Range
Package Types
SP507CF ........................................................................... 0°C to +70°C ...................................................... 80–pin JEDEC (BE-2 Outline) MQFP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
REVISION HISTORY
DATE
REVISION
DESCRIPTION
1/27/04
A
Implemented tracking revision.
Corporation
ANALOGEXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Rev: A Date:1/27/04
SP507 Multi–Mode Serial Transceiver
© Copyright 2004 Sipex Corporation
28
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