SP3220EBCY_技术文档

®

SP3220EB/EU

High Speed +3.0V to +5.5V RS-232 Driver/Receiver Pair

■ Meets True RS-232 Protocol Operation

From A +3.0V to +5.5V Power Supply

■ Minimum 250 Kbps Data Rate

(SP3220EB) or 1Mbps Data Rate

(SP3220EU) under Fully Load

■ 1µA Low-Power Shutdown With

Receivers Active

■ Interoperable With EIA/TIA - 232 and

SP3220EB/EU

adheres to EIA/TIA - 562 Down to

+2.7V Power Source

■ Pin-Compatible With The

MAX3221E Device Without

®

The AUTO ON-LINE Feature

■ ESD Specifications:

+15kV Human Body Model

+15kV IEC1000-4-2 Air Discharge

+8kV IEC1000-4-2 Contact Discharge

DESCRIPTION

The SP3220EB/EU device is an RS-232 driver/receiver solution intended for portable or hand-

heldapplicationssuchasnotebookorpalmtopcomputers.TheSP3220EB/EUdevicehasahigh-

efficiency,charge-pumppowersupplythatrequiresonly0.1µFcapacitorsin3.3Voperation. This

charge pump allows the SP3220EB/EU device to deliver true RS-232 performance from a single

power supply ranging from +3.3V to +5.0V. The ESD tolerance of the SP3220EB/EUE device is

over ±15kV for both Human Model and IEC1000-4-2 Air discharge test methods.

TheSP3220EB/EUdevicehasalow-powershutdownmodewherethedriveroutputsandcharge

pumps are disabled. During shutdown, the supply current falls to less than 1µA.

V

CC

+

15

CC

0.1µF

C5

C1

V

3

7

2

C1+

V+

V-

+

0.1µF

*C3

C4

4

5

C1-

C2+

SP3220EB/EU

+

C2

0.1µF

6

C2-

T1OUT

R1IN

LOGIC

13

8

11

T1IN

RS-232

INPUTS

OUTPUTS

R1OUT

EN

9

1

LOGIC

OUTPUTS

RS-232

INPUTS

5kΩ

SHDN 16

GND

14

*can be returned to

either V^CCor GND

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

1

Input Voltages

TxIN, EN .............................................. -0.3V to +6.0V

RxIN ................................................................... +25V

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation

of the device at these ratings or any other above those

indicated in the operation sections of the specifications

below is not implied. Exposure to absolute maximum

rating conditions for extended periods of time may

affect reliability and cause permanent damage to the

device.

Output Voltages

TxOUT ............................................................. +13.2V

RxOUT .........................................-0.3V to (V_CC+0.3V)

Short-Circuit Duration

TxOUT ...................................................... Continuous

V

_CC.............................................................-0.3Vto+6.0V

Storage Temperature ....................... -65°C to +150°C

V+(NOTE1)..............................................-0.3Vto+7.0V

V-(NOTE1).............................................+0.3Vto-7.0V

V++|V-| (NOTE1)...................................................+13V

Power Dissipation Per Package

16-pin SSOP (derate 9.69mW/^oCabove+70^oC) ........ 775mW

16-pin TSSOP (derate 10.5mW/^oC above +70^oC) ..... 840mW

16-pin Wide SOIC (derate 11.2mW/^oC above+70^oC) 900mW

I_CC(DC V_CCor GND current)..........................+100mA

NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

SPECIFICATIONS

Unless otherwise noted, the following specifications apply for V_CC= +3.0V to +5.0V with T_AMB= T_MINto T_MAX

.

Typical Values apply at V_CC= +3.3V or +5.0V and T_AMB= 25^oC, C1-4=0.1µF.

PARAMETER

MIN.

TYP.

MAX. UNITS CONDITIONS

DC CHARACTERISTICS

Supply Current

0.3

1.0

10

mA

no load, T_AMB= +25^oC, V_CC= 3.3V

TxIN = GND or V_CC

Shutdown Supply Current

SHDN = GND, T_AMB= +25^oC, V_CC= +3.3V

TxIN = 0V or V_CC

µA

LOGIC INPUTS AND RECEIVER OUTPUTS

Input Logic Threshold LOW

Input Logic Threshold HIGH

Input Leakage Current

GND

0.8

V

TxIN, EN, SHDN, Note 2

V_CC

2.0

V_CC= 3.3V, Note 2 or 5.0V, Note 2

µA

±0.01

±0.05

±1.0

TxIN, EN, SHDN,

T_AMB= +25^oC V_IN= 0V to V_CC

µA

V

Output Leakage Current

Output Voltage LOW

Output Voltage HIGH

DRIVER OUTPUTS

Output Voltage Swing

±10

0.4

Receivers Disabled V_OUT= 0V to V_CC

I_OUT= 1.6mA

V

_CC-0.6 V_CC-0.1

V

I_OUT= -1.0mA

±5.0

300

±5.4

±35

V

3kΩ load to ground at all driver outputs,

T_AMB= +25^oC

Ω

Output Resistance

V

_CC= V+ = V- = 0V, T_OUT= +2V

V_OUT= 0V

_OUT= +12V,V_CC= 0V to 5.5V,drivers disabled

Output Short-Circuit Current

Output Leakage Current

±60

±25

mA

µA

V

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

2

SPECIFICATIONS (continued)

Unless otherwise noted, the following specifications apply for V_CC= +3.0V to +5.0V with T_AMB= T_MINto T_MAX

.

Typical Values apply at V_CC= +3.3V or +5.0V and T_AMB= 25^oC, C1-4=0.1µF.

PARAMETER

MIN. TYP. MAX. UNITS CONDITIONS

RECEIVER INPUTS

Input Voltage Range

Input Threshold LOW

-25

+25

V

0.6

0.8

1.2

1.5

V_CC=3.3V

_CC=5.0V

V

Input Threshold HIGH

1.5

1.8

2.4

V

V_CC=3.3V

V_CC=5.0V

Input Hysteresis

0.3

5

V

Input Resistance

3

7

kΩ

TIMING CHARACTERISTICS

Maximum Data Rate

Receiverr Propagation Delay

250

Kbps

R_L=3kΩ, C_L=1000pF (SP3220EB)

R_L=3kΩ, C_L= 250pF (SP3220EU)

1000

µs

0.15

t_PHL, RxIN to RxOUT, C_L= 150pF

Receiver Output Enable Time

Receiver Output Disable Time

Driver Skew

200

100

50

ns

| t_PHL- t_PLH|, T_AMB= 25^oC

Receiver Skew

ns

| t_PHL- t_PLH|

Transition-Region Slew Rate

30

V/µs

V_CC= 3.3V, R_L= 3KΩ, T_AMB= 25^oC,

measurements taken from -3.0V to +3.0V

or +3.0V to -3.0V (SP3220EB)

(SP3220EU)

90

V/µs

NOTE 2: Driver input hysteresis is typically 250mV.

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

3

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for V_CC= +3.3V, 250kbps data rates, all drivers

loaded with 3kΩ, 0.1µF charge pump capacitors, and T_AMB= +25°C.

6

4

30

25

20

15

10

5

T1 at Full Data Rate

T2 at 1/16 Full Data Rate

T1+T2 Loaded with 3k/CLoad

125Kbps

TxOUT +

2

T1 at 250Kbps

60Kbps

0

20Kbps

-2

-4

-6

TxOUT -

0

1000

2000

3000

4000

5000

0

1000

2000

3000

4000

5000

Load Capacitance (pF)

Figure 2. Transmiter Output Voltage vs Load Capacitance

for the SP3220EB..

Figure 1. I_CCvs Load Capacitance for the SP3220EB.

12

10

8

6

TxOUT +

4

2

0

6

-2

4

-4

2

TxOUT -

T1 Loaded with 3K // 1000pf @ 250Kbps

-6

0

2.7

3

3.5

4

4.5

5

2.7

3

3.5

4

4.5

5

Supply Voltage (V)

Figure 4. Supply Current vs Supply Voltage for the

SP3220EB.

Figure 3. Transmitter Output Voltage vs Supply Voltage

for the SP3220EB.

40

25

1Mbps

- Slew

+ Slew

20

30

2Mbps

15

10

5

500Kbps

20

10

0

500 1000

2000 3000 4000 5000

0

250

500

1000 2000 3000 4000

Load Capacitance (pF)

Figure 4. Supply Current vs Supply Voltage for the

SP3220EU.

Figure 5. Slew Rate vs Load Capacitance for the

SP3220EB.

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

4

TYPICAL PERFORMANCE CHARACTERISTICS: Continued

Unless otherwise noted, the following performance characteristics apply for V_CC= +3.3V, 250kbps data rates, all drivers

loaded with 3kΩ, 0.1µF charge pump capacitors, and T_AMB= +25°C.

6

1.5Mbps

TxOUT +

2Mbps

1Mbps

4

2

4

2

0

-2

-4

-6

-2

-4

-6

1.5Mbps

1000

2Mbps

1Mbps

1500

TxOUT -

2.5

2.7

3

3.5

4

4.5

5

0

250

500

2000

Supply Voltage (V)

Load Capacitance (pF)

Figure 8. Transmiter Output Voltage vs Supply Voltage

for the SP3220EU.

Figure 7. Transmitter Output Voltage vs Load Capaci-

tance for the SP3220EU.

16

14

12

10

8

6

4

T1 Loaded with 3K // 1000pf @1Mbps

2

0

2.7

3

3.5

4

4.5

5

Supply Voltage (V)

Figure 9. Supply Current vs Supply Voltage for the

SP3220EU.

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

5

NAME

FUNCTION

PIN NUMBER

Receiver Enable Control. Drive LOW for normal operation. Drive HIGH to Tri-

State the receiver outputs (high-Z state).

EN

1

C1+

V+

Positive terminal of the voltage doubler charge-pump capacitor.

+5.5V generated by the charge pump.

2

3

C1-

C2+

C2-

V-

Negative terminal of the voltage doubler charge-pump capacitor.

Positive terminal of the inverting charge-pump capacitor.

Negative terminal of the inverting charge-pump capacitor.

-5.5V generated by the charge pump.

4

5

6

7

R1IN

RS-232 receiver input.

8

R1OUT TTL/CMOS reciever output.

9

N.C.

T1IN

No Connect.

10, 12

11

13

14

15

TTL/CMOS driver input.

T1OUT RS-232 driver output.

GND

V_CC

Ground.

+3.0V to +5.5V supply voltage

Shutdown Control Input. Drive HIGH for normal device operation. Drive LOW to

shutdown the drivers (high-Z output) and the on-board charge pump power

supply.

SHDN

16

Table 1. Device Pin Description

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

6

EN

16

15

14

13

12

11

1

2

3

4

5

6

7

SHDN

C1+

V+

V

CC

GND

SP3220EB/EU

C1-

T1OUT

C2+

C2-

V-

No Connect

T1IN

10

9

No Connect

R1OUT

R1IN

8

Figure 10. Pinout Configurations for the SP3220EB/EU

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

7

V

CC

+

15

CC

0.1µF

C5

C1

V

3

7

2

C1+

V+

V-

+

0.1µF

*C3

C4

4

5

C1-

C2+

SP3220EB/EU

+

C2

0.1µF

6

C2-

T1OUT

R1IN

13

8

LOGIC

11

T1IN

RS-232

INPUTS

OUTPUTS

R1OUT

EN

9

1

LOGIC

OUTPUTS

RS-232

INPUTS

5kΩ

16

SHDN

GND

14

*can be returned to

either V^CCor GND

Figure 11. SP3220EB/EU Typical Operating Circuits

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

8

DESCRIPTION

The SP3220EU drivers can guarantee a data rate

of 1000Kbps fully loaded with 3 in parallel

with 250pF.

The SP3220EB/EU device meets the EIA/TIA-

232 and V.28/V.24 communication protocols

and can be implemented in battery-powered,

portable, or hand-held applications such as

notebookorpalmtopcomputers.TheSP3220EB/

EU device features Sipex's proprietary on-

board charge pump circuitry that generates 2 x

V_CCfor RS-232 voltage levels from a single

+3.0V to +5.5V power supply. This series is

ideal for +3.3V-only systems, mixed +3.0V to

+5.5V systems, or +5.0V-only systems that re-

quire true RS-232 performance. The SP3220EB

device has a driver that can operate at a data rate

of 250Kbps fully loaded. The SP3220EU can

Operate at 1000Kbps

The slew rate of the SP3220EB output is inter-

nallylimitedtoamaximumof30V/µsinorderto

meet the EIA standards (EIA RS-232D 2.1.7,

Paragraph 5). The transition of the loaded output

from HIGH to LOW also meets the monotonicity

requirements of the standard.

Figure 12 shows a loopback circuit used to test

the RS-232 driver. Figure 13 shows the test

resultsoftheloopbackcircuitwiththeSP3220EB

driver active at 250Kbps with an RS-232 load in

parallel with a 1000pF capacitor. Figure 14

shows the test results where the SP3220EU

driver was active at 1000Kbps and loaded with

an RS-232 receiver in parallel with a 250pF

capacitor. A solid RS-232 data transmission rate

of 250Kbps provides compatibility with many

designs in personal computer peripherals and

LAN applications.

The SP3220EB/EU is a 1-driver/1-receiver de-

viceidealforportableorhand-held applications.

The SP3220EB/EU features a 1µA shutdown

mode that reduces power consumption and ex-

tends battery life in portable systems. Its receiv-

ers remain active in shutdown mode, allowing

external devices such as modems to be

monitored using only 1µA supply current.

TheSP3220EB/EUdriver'soutputstageisturned

off (high-Z) when the device is in shutdown

mode. When the power is off, the SP3220EB/

EU device permits the outputs to be driven up to

+12V. The driver's input does not have pull-up

resistors. Designers should connect an unused

input to V_CCor GND.

THEORY OF OPERATION

The SP3220EB/EU device is made up of three

basic circuit blocks: 1. Drivers, 2. Receivers,

and 3. the Sipex proprietary charge pump.

In the shutdown mode, the supply current falls to

less than 1µA, where SHDN = LOW. When the

SP3220EB/EUdeviceisshutdown, thedevice's

driver output is disabled (high-Z) and the charge

pump is turned off with V+ pulled down to V_CC

and V- pulled to GND. The time required to exit

shutdown is typically 100µs. Connect SHDN to

V_CCiftheshutdownmodeisnotused. SHDNhas

no effect on RxOUT. Note that the driver is

enabled only when the magnitude of V- exceeds

approximately 3V.

Drivers

The drivers are inverting level transmitters that

convert TTL or CMOS logic levels to +5.0V

EIA/TIA-232 levels inverted relative to the

input logic levels. Typically, the RS-232 output

voltage swing is +5.5V with no load and at least

+5V minimum fully loaded. The driver outputs

are protected against infinite short-circuits to

groundwithoutdegradationinreliability. Driver

outputs will meet EIA/TIA-562 levels of +3.7V

with supply voltages as low as 2.7V.

The SP3220EB drivers typically can operate at

a data rate of 250Kbps fully loaded with 3KΩ in

parallel with 1000pF, ensuring compatibility

with PC-to-PC communication software.

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

9

VCC

+

0.1µF

C5

C1

V

CC

C1+

V+

V-

+

C3

C4

0.1µF

C1-

SP3220EB/EU

C2+

+

C2

0.1µF

C2-

TxOUT

RxIN

TxIN

LOGIC

INPUTS

RxOUT

EN

LOGIC

OUTPUTS

5kΩ

VCC

*SHDN

GND

(SP3220EB 1000pF)

(SP3220EU 250pF)

Figure 12. SP3220EB/EU Driver Loopback Test Circuit

Figure 13. SP3220EB Driver Loopback Test Results at

250Kbps

Figure 14. SP3220EU Driver Loopback Test Results at

1Mbps

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

10

Receivers

In most circumstances, decoupling the power

supplycanbeachievedadequatelyusinga0.1µF

bypass capacitor at C5 (refer to Figures 11).

In applications that are sensitive to power-

supply noise, decouple V_CCto ground with a

capacitor of the same value as charge-pump

capacitor C1. Physically connect bypass

capacitors as close to the IC as possible.

The receiver converts EIA/TIA-232 levels to

TTL or CMOS logic output levels. The receiver

has an inverting high-impedance output. This

receiver output (RxOUT) is at high-impedance

when the enable control EN = HIGH. In the

shutdown mode, the receiver can be active or

inactive. EN has no effect on TxOUT. The truth

table logic of the SP3220EB/EU driver and

receiver outputs can be found in Table 2.

The charge pumps operate in a discontinuous

mode using an internal oscillator. If the output

voltages are less than a magnitude of 5.5V, the

charge pumps are enabled. If the output voltage

exceed a magnitude of 5.5V, the charge pumps

are disabled. This oscillator controls the four

phases of the voltage shifting. A description of

each phase follows.

Sincereceiverinputisusuallyfromatransmission

line where long cable lengths and system

interference can degrade the signal, the inputs

have a typical hysteresis margin of 300mV.

This ensures that the receiver is virtually

immune to noisy transmission lines. Should an

input be left unconnected, a 5kΩ pulldown

resistor to ground will commit the output of the

receiver to a HIGH state.

Phase 1

— V_SScharge storage — During this phase of

the clock cycle, the positive side of capacitors

C₁and C₂are initially charged to V_CC. C_l⁺is then

switched to GND and the charge in C₁^–is

transferredtoC₂^–. SinceC₂⁺isconnectedtoV_CC,

the voltage potential across capacitor C₂is now

2 times V_CC.

Charge Pump

The charge pump is a Sipex–patented design

(U.S. 5,306,954) and uses a unique approach

compared to older less–efficient designs. The

charge pump still requires four external

capacitors, but uses a four–phase voltage shifting

technique to attain symmetrical 5.5V power

supplies. The internal power supply consists of

a regulated dual charge pump that provides

output voltages 5.5V regardless of the input

voltage (V_CC) over the +3.0V to +5.5V range.

Phase 2

— V_SStransfer — Phase two of the clock

connects the negative terminal of C₂to the V_SS

storagecapacitorandthepositiveterminalofC₂

to GND. This transfers a negative generated

voltage to C₃. This generated voltage is

regulated to a minimum voltage of -5.5V.

Simultaneous with the transfer of the voltage to

C₃, the positive side of capacitor C₁is switched

to V_CCand the negative side is connected to GND.

SHDN

EN

0

TxOUT

Tri-state

Active

RxOUT

Active

0

1

Phase 3

— V_DDcharge storage — The third phase of the

clock is identical to the first phase — the charge

transferred in C₁produces –V_CCin the negative

terminal of C₁, which is applied to the negative

side of capacitor C₂. Since C₂⁺is at V_CC, the

voltage potential across C₂is 2 times V_CC.

1

Tri-state

Active

0

1

Active

Tri-state

Table 2. Truth Table Logic for Shutdown and

Enable Control

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

11

Phase 4

this ESD test is to simulate the human body’s

potential to store electro-static energy and

discharge it to an integrated circuit. The

simulation is performed by using a test model as

shown in Figure 20. This method will test the

IC’s capability to withstand an ESD transient

during normal handling such as in manufacturing

areas where the ICs tend to be handled

— V_DDtransfer — The fourth phase of the clock

connects the negative terminal of C₂to GND,

and transfers this positive generated voltage

across C₂to C₄, the V_DDstorage capacitor. This

voltage is regulated to +5.5V. At this voltage,

the internal oscillator is disabled. Simultaneous

withthetransferofthevoltagetoC₄, thepositive

side of capacitor C₁is switched to V_CCand the

negative side is connected to GND, allowing the

charge pump cycle to begin again. The charge

pump cycle will continue as long as the

operational conditions for the internal oscillator

are present.

frequently.

The IEC-1000-4-2, formerly IEC801-2, is gen-

erally used for testing ESD on equipment and

system manufacturers, they must guarantee a

certain amount of ESD protection since the

systemitselfisexposedtotheoutsideenviroment

andhumanpresence.ThepremisewithIEC1000-

4-2 is that the system is required to withstand an

amount of static electricity when ESD is applied

to points and surfaces of the equipment that are

accesible to personnel during normal usage.

The transceiver IC receives most of the ESD

current when the ESD source is applied to the

connector pins. The test circuit for IEC-1000-4-

2 is shown in Figure 21. There are two methods

within IEC-4-2, the Air Discharge method and

the Contact Discharge method.

Since both V⁺and V^–are separately generated

from V_CC; in a no–load condition V⁺and V^–will

besymmetrical. Olderchargepumpapproaches

that generate V^–from V⁺will show a decrease in

the magnitude of V^–compared to V⁺due to the

inherent inefficiencies in the design.

The clock rate for the charge pump typically

operatesat250kHz. Theexternalcapacitorscan

be as low as 0.1µF with a 16V breakdown

voltage rating.

ESD Tolerance

WiththeAirDischargeMethod,anESDvoltage

is applied to the equipment under test (EUT)

troughair. Thissimulatesanelectricallycharged

person ready to connect a cable onto the rear of

the system only to find an unpleasent zap just

before the person touches the back panel. The

high energy potential on the person discharges

through an arcing path to the rear panel system

before he or she even touches the system. This

energy,weatherdischargeddirectlyorthroughair,

is predominantly a function of the discharge cur-

rent rather than the discharge voltage.

Variables with an air discharge such as ap-

proach speed of the object carrying the ESD

potential to the system and humidity will tend to

change the discharge current. For example, the

rise time of the discharge current varies with the

approach speed.

The SP3220EB/EU device incorporates rugge-

dizedESDcellsonalldriveroutputandreceiver

input pins. The ESD structure is improved over

our previous family for more rugged applications

and environments sensitive to electro-static

discharges and associated transients. The im-

proved ESD tolerance is at least ±15kV without

damage nor latch-up.

There are different methods of ESD testing applied:

a) MIL-STD-883, Method 3015.7

b)IEC1000-4-2 Air Discharge

c)IEC1000-4-2 Direct Contact

The Human Body Model has been the generally

acceptedESDtestingmethodforsemiconductors.

This method is also specified in MIL-STD-883,

Method 3015.7 for ESD testing. The premise of

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

12

V

= +5V

CC

C

+5V

4

+

–

+

V

Storage Capacitor

DD

+

–

+

–

C

2

1

–

SS

C

–5V

3

Figure 15. Charge Pump — Phase 1

V

= +5V

CC

C

4

+

–

+

V

Storage Capacitor

DD

+

–

+

–

C

1

2

–

SS

C

–10V

3

Figure 16. Charge Pump — Phase 2

[

T

]

+6V

a) C²⁺

T

GND

1

2

GND

b) C2-

-6V

Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V

Figure 17. Charge Pump Waveforms

V

= +5V

CC

C

+5V

4

+

–

+

V

Storage Capacitor

DD

+

–

+

–

C

2

1

–

SS

C

–5V

3

Figure 18. Charge Pump — Phase 3

V

= +5V

CC

C

+

+10V

+

4

–

+

V

Storage Capacitor

DD

SS

+

C

2

–

1

–

V

C

3

Figure 19. Charge Pump — Phase 4

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

13

R

S

R

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

Figure 20. ESD Test Circuit for Human Body Model

The Contact Discharge Method applies the ESD

current directly to the EUT. This method was

devised to reduce the unpredictability of the

ESD arc. The discharge current rise time is

constant since the energy is directly transfered

without the air-gap arc. In situations such as

hand held systems, the ESD charge can be

directly discharged to the equipment from a

person directly discharged to the equipment.

The current is transferred on to the keypad or the

serial port of the equipment directly and then

travels through the PCB and finally to the IC.

The circuit models in Figure 20 and 21 repre-

sent the typical ESD testing circuits used for all

three methods. The C is initially charged with

the DC power suppl^Sy when the first switch

(SW1) is on. Now that the capacitor is charged,

the second switch (SW2) is on while SW1

switches off. The voltage stored in the capacitor

is then applied through R , the current limiting

resistor, onto the device ^Sunder test (DUT). In

ESD tests, the SW2 switch is pulsed so that the

device under test recives a duration of voltage.

CCoonnttaacctt--DDiisscchhaarrggee MMoodduullee

R

V

R

S

R

C

SW2

SW1

Device

Under

Test

DC Power

Source

C

S

R

and R add up to 330Ω for IEC1000-4-2.

S

V

Figure 21. ESD Test Circuit for IEC1000-4-2

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

14

For the Human Body Model, the current

limiting resistor (R_S) and the source capacitor

(C_S) are 1.5k and 100pF, respectively. For

IEC-1000-4-2, the current limiting resistor (RS)

and the source capacitor (CS) are 330 and

150pF, respectively.

30A

15A

0A

The higher CS value and lower RS value in the

IEC1000-4-2 model are more stringent than the

Human Body Model. The larger storage capaci-

tor injects a higher voltage to the test point when

SW2 is switched on. The lower current limiting

resistorincreasesthecurrentchargeontothetest

point.

t=30nS

t

t=0nS

Figure 22. ESD Test Waveform for IEC1000-4-2

Device Pin

Tested

Human Body

Model

IEC1000-4-2

Air Discharge Direct Contact Level

Driver Ouputs

Receiver Inputs

±15kV

±8kV

4

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

15

PACKAGE: PLASTIC SHRINK

SMALL OUTLINE

(SSOP)

E

H

D

A

Ø

A1

L

e

B

DIMENSIONS (Inches)

Minimum/Maximum

(mm)

16–PIN

24–PIN

20–PIN

28–PIN

0.068/0.078

(1.73/1.99)

0.068/0.078

(1.73/1.99)

A

A1

B

D

E

0.068/0.078

(1.73/1.99)

0.068/0.078

(1.73/1.99)

0.002/0.008

(0.05/0.21)

0.002/0.008

(0.05/0.21)

0.002/0.008

(0.05/0.21)

0.002/0.008

(0.05/0.21)

0.010/0.015

(0.25/0.38)

0.010/0.015

(0.25/0.38)

0.010/0.015

(0.25/0.38)

0.010/0.015

(0.25/0.38)

0.239/0.249

(6.07/6.33)

0.317/0.328

(8.07/8.33)

0.278/0.289

(7.07/7.33)

0.397/0.407

(10.07/10.33)

0.205/0.212

(5.20/5.38)

0.205/0.212

(5.20/5.38)

0.205/0.212

(5.20/5.38)

0.205/0.212

(5.20/5.38)

0.0256 BSC

(0.65 BSC)

0.0256 BSC

(0.65 BSC)

e

0.0256 BSC

(0.65 BSC)

0.0256 BSC

(0.65 BSC)

0.301/0.311

(7.65/7.90)

0.301/0.311

(7.65/7.90)

H

L

0.301/0.311

(7.65/7.90)

0.301/0.311

(7.65/7.90)

0.022/0.037

(0.55/0.95)

0.022/0.037

(0.55/0.95)

0.022/0.037

(0.55/0.95)

0.022/0.037

(0.55/0.95)

0°/8°

(0°/8°)

0°/8°

(0°/8°)

Ø

0°/8°

(0°/8°)

0°/8°

(0°/8°)

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

16

PACKAGE: PLASTIC

SMALL OUTLINE (SOIC)

E

H

D

A

Ø

A1

L

e

B

DIMENSIONS (Inches)

Minimum/Maximum

(mm)

16–PIN

18–PIN

A

A1

B

D

E

0.090/0.104

(2.29/2.649)

0.090/0.104

(2.29/2.649))

0.004/0.012

(0.102/0.300) (0.102/0.300)

0.004/0.012

0.013/0.020

(0.330/0.508) (0.330/0.508)

0.013/0.020

0.398/0.413 0.447/0.463

(10.10/10.49) (11.35/11.74)

0.291/0.299 0.291/0.299

(7.402/7.600) (7.402/7.600)

e

0.050 BSC

(1.270 BSC)

0.050 BSC

(1.270 BSC)

H

L

0.394/0.419

(10.00/10.64) (10.00/10.64)

0.016/0.050

(0.406/1.270) (0.406/1.270)

0.016/0.050

Ø

0°/8°

(0°/8°)

0°/8°

(0°/8°)

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

17

PACKAGE: PLASTIC THIN SMALL

OUTLINE

(TSSOP)

E2

E

D

A

Ø

A1

L

e

B

DIMENSIONS

in inches (mm)

16–PIN

20–PIN

Minimum/Maximum

- /0.043

(- /1.10)

- /0.043

(- /1.10)

A

0.002/0.006

(0.05/0.15)

0.002/0.006

(0.05/0.15)

A1

B

0.007/0.012

(0.19/0.30)

0.007/0.012

(0.19/0.30)

0.193/0.201

(4.90/5.10)

0.252/0.260

(6.40/6.60)

D

0.169/0.177

(4.30/4.50)

0.169/0.177

(4.30/4.50)

E

0.026 BSC

(0.65 BSC)

0.026 BSC

(0.65 BSC)

e

0.126 BSC

(3.20 BSC)

0.126 BSC

(3.20 BSC)

E2

L

0.020/0.030

(0.50/0.75)

0.020/0.030

(0.50/0.75)

0°/8°

Ø

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

18

ORDERING INFORMATION

Temperature Range

Model

Package Type

SP3220EBCA .......................................... 0˚C to +70˚C .......................................... 16-Pin SSOP

SP3220EBCT........................................... 0˚C to +70˚C .................................. 16-Pin Wide SOIC

SP3220EBCY .......................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP

SP3220EBEA.......................................... -40˚C to +85˚C ........................................ 16-Pin SSOP

SP3220EBET .......................................... -40˚C to +85˚C ................................ 16-Pin Wide SOIC

SP3220EBEY.......................................... -40˚C to +85˚C ...................................... 16-Pin TSSOP

SP3220EUCA .......................................... 0˚C to +70˚C .......................................... 16-Pin SSOP

SP3220EUCT .......................................... 0˚C to +70˚C .................................. 16-Pin Wide SOIC

SP3220EUCY .......................................... 0˚C to +70˚C ........................................ 16-Pin TSSOP

SP3220EUEA ......................................... -40˚C to +85˚C ........................................ 16-Pin SSOP

SP3220EUET.......................................... -40˚C to +85˚C ................................ 16-Pin Wide SOIC

SP3220EUEY ......................................... -40˚C to +85˚C ...................................... 16-Pin TSSOP

Corporation

ANALOGEXCELLENCE

Sipex Corporation

Headquarters and

Sales Office

233 South Hillview Drive

Milpitas, CA 95035

TEL: (408) 934-7500

FAX: (408) 935-7600

Sales Office

22 Linnell Circle

Billerica, MA 01821

TEL: (978) 667-8700

FAX: (978) 670-9001

e-mail: sales@sipex.com

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the

application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.

Rev: A Date:12/11/03

SP3220EB/EU +3.0 to +5.0V RS-232 Transceivers

19


型号：	SP3220EBCY
厂家：	SIPEX CORPORATION
描述：	High Speed +3.0V to +5.5V RS-232 Driver/Receiver Pair 高速+ 3.0V至+ 5.5V的RS - 232驱动器/接收器对驱动器
文件：	总19页 (文件大小：160K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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