C8051F126 [SILICON]
50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU; 50 MIPS ， 128 KB闪存， 10位ADC ， 100引脚混合信号MCU
| 型号： | C8051F126 |
| 厂家： | 
SILICON |
| 描述： | 50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU |
| 文件： | 总2页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C8051F126
50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
10-Bit ADC
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
-
-
-
-
-
-
±1 LSB INL; no missing codes
-
Up to 50 MIPS Throughput with 50 MHz system clock
Expanded interrupt handler
Programmable throughput up to 100 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
-
Memory
-
-
8448 bytes data RAM
128 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes
8-Bit ADC
are reserved)
-
External parallel data memory interface
-
-
-
-
±1 LSB INL; no missing codes
Programmable throughput up to 500 ksps
8 external inputs
Programmable amplifier gain: 4, 2, 1, 0.5
Digital Peripherals
-
-
64 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
Two 12-Bit DACs
ports available concurrently
-
Can synchronize outputs to timers for jitter-free waveform generation
-
-
-
-
Programmable 16-bit counter/timer array with six capture/compare
modules
Two Comparators
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using a timer or PCA
Internal Voltage Reference
V
Monitor/Brown-out Detector
DD
On-Chip JTAG Debug & Boundary Scan
Clock Sources
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
-
-
-
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
On-chip programmable PLL: up to 50 MHz
External oscillator: Crystal, RC, C, or Clock
-
-
-
-
Provides breakpoints, single stepping, watchpoints, stack monitor
Inspect/modify memory and registers
Real-time instruction trace buffer
IEEE1149.1 compliant boundary scan
Supply Voltage: 2.7 to 3.6 V
-
Typical operating current: 25 mA at 50 MHz
Typical stop mode current: <0.1 uA
-
100-Pin TQFP
Temperature Range: –40 to +85 °C
VDD
VDD
VDD
Digital Power
DGND
DGND
P0.0
P0.7
UART0
P0
UART1
SFR Bus
8
0
5
1
DGND
Drv
AV+
AV+
C
SMBus
Analog Power
256 Byte
Branch
AGND
AGND
P1.0/AIN1.0
P1.7/AIN1.7
R
O
S
S
B
A
R
P1
SPI Bus
Target Buffer
Drv
8
TCK
TMS
TDI
6 Chnl
PCA
Boundary Scan
Debug HW
JTAG
Logic
Prefetch
HW
P2.0
P2.7
TDO
P2
Drv
Timers
Reset
0, 1, 2, 4
RST
32
Timer 3
VDD
128 kB
P3.0
P3.7
WDT
MONEN
P3
Monitor
C
o
r
FLASH
Drv
P0, P1,
P2, P3
External
Oscillator
Circuit
XTAL1
XTAL2
Latches
256 Byte
RAM
System
Clock
VREF1
Internal
2%
Oscillator
A
M
U
X
N/M
PLL
8 kB
ADC
8:1
Prog
Gain
500 ksps
(8-Bit)
e
XRAM
VREF
VREFD
VREF
External Data Memory Bus
P4.0
DAC1
DAC1
(12-Bit)
C
T
L
P4 Latch
Bus Control
P4
P4.4
P4.5/ALE
P4.6/RD
P4.7/WR
DRV
DAC0
(12-Bit)
DAC0
VREF0
P5.0/A8
P5 Latch
P6 Latch
P5
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
A
d
d
r
DRV
P5.7/A15
P6.0/A0
Address Bus
Data Bus
ADC
A
M
U
X
P6
DRV
Prog
Gain
100 ksps
(10-Bit)
P6.7/A7
P7.0/D0
P7.7/D7
D
a
t
P7 Latch
TEMP
SENSOR
P7
DRV
CP0+
CP0-
CP1+
CP1-
CP0
a
CP1
Precision Mixed Signal
Copyright © 2004 by Silicon Laboratories
10.6.2004
C8051F126
50 MIPS, 128 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER
GLOBAL CHARACTERISTICS
Supply Voltage
CONDITIONS
MIN
TYP
MAX
UNITS
2.7
3.6
V
mA
mA
µA
Supply Current
Clock = 50 MHz
25
0.5
16
(CPU active)
Clock = 1 MHz
Clock = 32 kHz
Supply Current
Oscillator off; VDD Monitor Enabled
Oscillator off; VDD Monitor Disabled
10
µA
(shutdown)
<0.1
µA
Clock Frequency Range
INTERNAL CLOCKS
Oscillator Frequency
PLL Frequency
DC
50
MHz
24.0
48
24.5
49
25.0
50
MHz
MHz
A/D CONVERTER
Resolution
10
bits
LSB
LSB
dB
Integral Nonlinearity
Differential Nonlinearity
Signal-to-Noise Plus
Distortion
±1
±1
Guaranteed Monotonic
Guaranteed Monotonic
59
61
Throughput Rate
D/A CONVERTERS
Resolution
100
ksps
12
10
bits
LSB
µS
Differential Nonlinearity
Output Settling Time
COMPARATORS
Supply Current
±1
(each Comparator)
(CP+) – (CP-) = 100 mV
1.5
4.0
µA
µS
Response Time
C8051F120DK Development Kit
Package Information
D
MIN NOM MAX
(mm) (mm) (mm)
D1
A
-
-
-
1.20
0.15
A1 0.05
A2 0.95 1.00 1.05
b
D
0.17 0.22 0.27
-
-
-
-
-
16.00
14.00
0.50
-
-
-
-
-
D1
e
E1
E
E
16.00
14.00
E1
100
PIN 1
DESIGNATOR
1
e
A2
A
b
A1
Precision Mixed Signal
Copyright © 2004 by Silicon Laboratories
10.6.2004
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
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