C8051F016-GQR [SILICON]
Microcontroller, 8-Bit, FLASH, 8051 CPU, 25MHz, CMOS, PQFP48, ROHS COMPLIANT, TQFP-48;
| 型号： | C8051F016-GQR |
| 厂家： | 
SILICON |
| 描述： | Microcontroller, 8-Bit, FLASH, 8051 CPU, 25MHz, CMOS, PQFP48, ROHS COMPLIANT, TQFP-48 闪存 |
| 文件： | 总2页 (文件大小：420K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C8051F016
25 MIPS, 32 kB Flash, 10-Bit ADC, 48-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
10-Bit ADC
-
Pipelined instruction architecture; executes 70% of Instructions in 1 or 2
system clocks
-
-
-
-
-
-
±1 LSB INL; no missing codes
-
-
Up to 25 MIPS throughput with 25 MHz clock
Programmable throughput up to 100 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
Expanded interrupt handler; up to 21 interrupt sources
Memory
-
-
2304 bytes data RAM
32 kB Flash; in-system programmable in 512-byte sectors (512 bytes
are reserved)
Two 12-Bit DACs
-
-
Voltage output
Digital Peripherals
10 µsec settling time
-
-
16 port I/O; all are 5 V tolerant
Two Comparators
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
available concurrently
-
-
16 programmable hysteresis values
Configurable to generate interrupts or reset
-
Programmable 16-bit counter/timer array with five capture/compare
modules
Internal Voltage Reference
-
-
4 general-purpose 16-bit counter/timers
V
Monitor/Brown-out Detector
DD
Dedicated watchdog timer; bidirectional reset
On-Chip JTAG Debug
Clock Sources
-
-
-
-
On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit
emulation
Supports breakpoints, single stepping, watchpoints, inspect/modify
memory, and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Fully compliant with IEEE 1149.1 specification
-
-
-
Internal programmable oscillator: 2–16 MHz
External oscillator: Crystal, RC, C, or Clock
Can switch between clock sources on-the-fly
Package
-
48-pin TQFP (standard lead and lead-free packages)
Ordering Part Numbers
Supply Voltage: 2.7 to 3.6 V
-
-
Lead-free package: C8051F016-GQ
-
-
Typical operating current: 12.5 mA at 25 MHz
Standard package: C8051F016
Multiple power saving sleep and shutdown modes
- Temperature Range: –40 to +85 °C
VDD
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
VDD
Digital Power
P
0
DGND
DGND
DGND
DGND
UART
C
R
O
S
S
B
A
R
SMBus
D
r
v
SPI Bus
AV+
AV+
AGND
AGND
Analog Power
5-Chnl
PCA
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P
1
Timers
0,1,2
32 kB
FLASH
TCK
TMS
TDI
Boundary Scan
8
0
5
1
JTAG
Logic
D
r
v
Debug HW
TDO
Timer 3
256 Byte
RAM
Reset
S
W
I
T
C
H
RST
Port 0
Latch
P
2
VDD
Monitor
2048 Byte
XRAM
WDT
Port 1
Latch
D
r
v
External
Oscillator
Circuit
C
o
r
XTAL1
XTAL2
Port 2
Latch
System Clock
SFR Bus
Internal
Oscillator
P
3
Port 3
Latch
e
VREF
DAC1
VREF
D
r
v
DAC1
(12-Bit)
DAC0
(12-Bit)
DAC0
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
ADC
100 ksps
(10-Bit)
A
M
U
X
Prog
Gain
TEMP
SENSOR
CP0+
CP0-
CP1+
CP1-
CP0
CP1
Precision Mixed Signal
Copyright © 2005 by Silicon Laboratories
5.5.2005
C8051F016
25 MIPS, 32 kB Flash, 10-Bit ADC, 48-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GLOBAL CHARACTERISTICS
Analog Supply Voltage
Analog Supply Current
2.7
3.6
V
mA
Internal REF, ADC, DAC, Comparators all
active
Internal REF, ADC, DAC, Comparators all
disabled
0.8
5
Analog Supply Current with
analog sub-systems inactive
Digital Supply Voltage
Digital Supply Current with
CPU active
µA
2.7
3.6
V
Clock = 25 MHz
Clock = 1 MHz
Clock = 32 kHz
12
0.5
20
2
mA
mA
µA
µA
Digital Supply Current
(shutdown mode)
Oscillator not running
VDD Data Retention Voltage
CPU & DIGITAL I/O
Clock Frequency Range
Port Output High Voltage
Port Output Low Voltage
Input High Voltage
Input Low Voltage
SMBus SCL Frequency
SPI Bus Clock Frequency
A/D CONVERTER
Resolution
Integral Nonlinearity
Differential Nonlinearity
Throughput Rate
Input Voltage Range
D/A CONVERTERS
Resolution
RAM remains valid
1.5
V
DC
VDD – 0.7
25
MHz
V
V
V
V
IOH = –3 mA, Port I/O push-pull
IOL = 8.5 mA
0.6
0.8 x VDD
0.2 x VDD
SYSCLK/8
SYSCLK/2
SYSCLK = MCU system clock
SYSCLK = MCU system clock
MHz
MHz
10
bits
LSB
LSB
ksps
V
±1
±1
100
Guaranteed Monotonic
0
VREF
12
bits
LSB
LSB
LSB
µs
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Output Settling Time
Output Voltage Swing
COMPARATORS
Specified from Data Word 014h to FEBh
Guaranteed Monotonic
Data Word = 014h
±4
±1
±3
10
To ½ LSB of full-scale
0
VREF – 1 LSB
V
Supply Current
Response Time
Input Voltage Range
Input Bias Current
Input Offset Voltage
(each Comparator)
| (CP+) – (CP-) | = 100 mV
1.5
4
µA
µs
V
nA
mV
–0.25
–5
–10
(AV+) +0.25
0.001
+5
+10
C8051F005DK Development Kit
Package Information
D
MIN NOM MAX
(mm) (mm) (mm)
D1
A
-
-
-
1.20
0.15
A1 0.05
E1
E
A2 0.95 1.00 1.05
b
D
0.17 0.22 0.27
-
-
-
-
-
9.00
7.00
0.50
9.00
7.00
-
-
-
-
-
48
D1
e
PIN 1
IDENTIFIER
1
e
A2
E
A
E1
A1
b
Precision Mixed Signal
Copyright © 2005 by Silicon Laboratories
5.5.2005
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
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