S818 [SII]
LOW DROPOUT CMOS VOLTAGE REGULATOR; 低压差CMOS电压稳压器
| 型号： | S818 |
| 厂家： | 
SEIKO INSTRUMENTS INC |
| 描述： | LOW DROPOUT CMOS VOLTAGE REGULATOR |
| 文件： | 总23页 (文件大小：365K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
The S-818 Series is a positive voltage regulator developed
utilizing CMOS technology featured by low dropout voltage,
high output voltage accuracy and low current consumption.
Built-in low on-resistance transistor provides low dropout
voltage and large output current. A ceramic capacitor of 2 µF
or more can be used as an output capacitor. A power-OFF
circuit ensures long battery life.
The SOT-23-5 miniaturized package and the SOT-89-5
package are recommended for configuring portable devices
and large output current applications, respectively.
Applications
Power source for
Features
Low current consumption
battery-powered devices
Power source for
personal communication devices
Power source for home electric/electronic
appliances
During operation: Typ. 30 µA, Max. 40 µA
During power off: Typ. 100 nA, Max. 500 nA
Output voltage: 0.1 V steps between 2.0 and 6.0 V
High accuracy output voltage: ±2.0%
Peak output current;
200 mA capable (3.0 V output product, VIN=4 V)
300 mA capable (5.0 V output product, VIN=6 V)
Low dropout voltage
Note
Note
Typ. 170 mV (5.0 V output product, IOUT = 60 mA)
A ceramic capacitor (2 µF or more) can be used as an
output capacitor.
Built-in power-off circuit
Compact package: SOT-23-5, SOT-89-5
Note : Please consider power dissipation of the package when the output current is large.
Package
5-pin SOT-23-5 (Package drawing code: MP005-A)
5-pin SOT-89-5 (Package drawing code: UP005-A)
Seiko Instruments Inc.
1
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
Block Diagram
*1
VOUT
VIN
ON/OFF
ON/OFF
circuit
Reference
voltage
VSS
*1: Parasitic diode
Figure 1 Block Diagram
Selection Guide
1. Product Name
S-818x xx A xx - xxx - T2
IC orientation in taping specifications
Product abbreviation
Package type MC : SOT-23-5
UC : SOT-89-5
Output voltage x 10
Product type
A: ON/OFF pin has positive logic (high active)
B: ON/OFF pin has negative logic (low active)
Table 1 Selection Guide
SOT-23-5
Output Voltage
2.0 V ± 2.0%
2.5 V ± 2.0%
2.8 V ± 2.0%
3.0 V ± 2.0%
3.3 V ± 2.0%
3.8 V ± 2.0%
4.0 V ± 2.0%
5.0 V ± 2.0%
Note:
SOT-89-5
S-818A20AMC-BGA-T2
S-818A25AMC-BGF-T2
S-818A28AMC-BGI-T2
S-818A30AMC-BGK-T2
S-818A33AMC-BGN-T2
S-818A38AMC-BGS-T2
S-818A40AMC-BGU-T2
S-818A50AMC-BHE-T2
S-818A20AUC-BGA-T2
S-818A25AUC-BGF-T2
S-818A28AUC-BGI-T2
S-818A30AUC-BGK-T2
S-818A33AUC-BGN-T2
S-818A38AUC-BGS-T2
S-818A40AUC-BGU-T2
S-818A50AUC-BHE-T2
Contact SII sales division for product with an output voltage other than those
specified above or product type B, low active product.
2
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Pin Configuration
Please refer to the package drawings at the end of this document for details.
Table 2 Pin Assignment
Pin No.
Symbol
VIN
Description
5
4
1
2
3
4
5
Voltage input pin
GND pin
VSS
SOT-23-5
Top view
ON/OFF
NC Note
VOUT
Power off pin
No connection
Voltage output pin
1
2
3
Figure 2 SOT-23-5
Table 3 Pin Assignment
Pin No.
Symbol
VOUT
VSS
NC Note
ON/OFF
VIN
Description
1
2
3
4
5
Voltage output pin
GND pin
5
4
No connection
Power off pin
SOT-89-5
Top view
Voltage input pin
Note: NC means electrical open. Connecting
NC pin to VIN or VSS is allowed.
2
3
1
Figure 3 SOT-89-5
Absolute Maximum Ratings
Table 4 Absolute Maximum Ratings
(Ta=25°C unless otherwise specified)
Parameter
Symbol
Absolute Maximum Rating
12
Unit
V
Input voltage
VIN
VON / OFF
VOUT
VSS-0.3 to 12
V
Output voltage
VSS-0.3 to VIN+0.3
V
Power dissipation
PD
250 (SOT-23-5)
500 (SOT-89-5)
-40 to +85
mW
Operating temperature range
Storage temperature range
Tope
Tstg
°C
°C
-40 to +125
The IC has a protection circuit against static electricity. DO NOT apply high static electricity or high voltage
that exceeds the performance of the protection circuit to the IC.
Seiko Instruments Inc.
3
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
Electrical Characteristics
S-818AXXAMC/UC, S-818BXXAMC/UC
Table 5 Electrical Characteristics
(Ta=25°C unless otherwise specified)
Test
circuit
s
Parameter
Output voltage
Symbol
Conditions
Min.
Typ.
Max. Units
*1)
*2)
VOUT(E) VIN=VOUT(S)+1V,IOUT=30mA
VOUT(S) VOUT(S) VOUT(S)
×0.98
V
1
×1.02
−
−
−
−
OUT(S)+1V 2.0V ≤VOUT(S) ≤2.4V
100
*5)
−
−
−
−
mA
mA
mA
mA
mA
V
V
V
V
V
3
3
3
3
3
1
1
1
1
1
1
1
1
1
Output current
IOUT
V
≤ VIN≤10V
2.5V ≤VOUT(S) ≤2.9V
3.0V ≤VOUT(S) ≤3.9V
4.0V ≤VOUT(S) ≤4.9V
5.0V ≤VOUT(S) ≤6.0V
2.0V ≤VOUT(S) ≤2.4V
2.5V ≤VOUT(S) ≤2.9V
3.0V ≤VOUT(S) ≤3.4V
3.5V ≤VOUT(S) ≤3.9V
4.0V ≤VOUT(S) ≤4.4V
4.5V ≤VOUT(S) ≤4.9V
5.0V ≤VOUT(S) ≤5.4V
5.5V ≤VOUT(S) ≤6.0V
150 *5)
*5)
*5)
*5)
200
250
300
−
−
Dropout voltage
*3)
Vdrop
IOUT
60mA
=
−
0.51
0.38
0.30
0.24
0.20
0.18
0.17
0.17
0.05
0.87
0.61
0.44
0.33
0.26
0.22
0.21
0.20
0.2
−
−
−
−
−
−
−
V
V
V
%/V
∆V
OUT
1
1 VOUT(S) + 0.5 V VIN 10 V,
≤
≤
Line regulation 1
Line regulation 2
Load regulation
∆VIN • VOUT IOUT = 30mA
∆V
OUT
2
1 VOUT(S) + 0.5 V VIN 10 V,
≤
≤
0.05
30
0.2
50
%/V
mV
1
1
1
2
2
∆VIN • VOUT IOUT = 10µA
∆VOUT
3
VIN = VOUT(S) + 1 V,
10µA ≤ IOUT ≤ 80mA
1 VIN = VOUT(S) + 1 V, IOUT = 30mA
∆V
OUT
±
100
ppm
Output voltage temperature
coefficient
Current consumption during
operation
Current consumption when
power off
Input voltage
OUT
°
≤
≤
°
°
*4) ∆Ta • V
-40 C Ta 85 C
/ C
ISS1
ISS2
VIN = VOUT(S) + 1 V,
ON/OFF pin = ON, no load
VIN = VOUT(S) + 1 V,
30
40
0.5
10
µA
0.1
µA
ON/OFF pin = OFF, no load
VIN
VSH
V
V
1
4
Power-off pin input voltage "H"
VIN = VOUT(S) + 1 V, RL = 1kΩ,
Judged by VOUT output level.
VIN = VOUT(S) + 1 V, RL = 1kΩ,
Judged by VOUT output level.
VIN = VOUT(S) + 1 V,
ON/OFF = 7 V
VIN = VOUT(S) + 1 V,
ON/OFF = 0 V
VIN = VOUT(S) + 1 V, f = 100Hz,
∆Vrip = 0.5 V p-p, IOUT=30mA
1.5
Power-off pin input voltage "L"
Power-off pin input current "H"
Power-off pin input current "L"
Ripple rejection
VSL
ISH
0.3
0.1
V
4
4
4
5
µA
µA
dB
ISL
-0.1
RR
45
*1) VOUT(S)=Specified output voltage
VOUT(E)=Effective output voltage, i.e., the output voltage at fixet IOUT(=30 mA) and input VOUT(S)+1.0 V.
*2) Output current when the output voltage goes below 95% of VOUT(E) after gradually increasing output current.
*3) Vdrop = VIN1-(VOUT(E) × 0.98)
VIN1 = Input voltage when output voltage falls 98% of VOUT(E) after gradually decreasing input voltage.
*4) Output voltage shift by temperature [mV/°C] is calculated using the following equation.
∆VOUT
∆Ta • VOUT
∆VOUT
∆Ta
[ppm/°C] ÷1000
[mV/°C] = VOUT(S)[V] ×
Specified output voltage
Output voltage temperature coefficient
Output voltage shift by temperature
*5) Peak output current can exceed the minimum value.
4
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Test Circuits
1.
2.
A
VIN
VOUT
VSS
A
VIN
VOUT
VSS
ON/OFF
V
ON/OFF
Set to
power ON
Set to
VIN or GND
3.
4.
A
VIN
VOUT
VSS
VIN
ON/OFF
VOUT
VSS
ON/OFF
V
A
V
RL
Set to
power ON
5.
VIN
VOUT
VSS
ON/ OFF
V
RL
Set to
power ON
Figure 4 Test Circuits
Standard Circuit
OUTPUT
INPUT
VIN
VOUT
In addition to a tantalum capacitor, a ceramic
capacitor of 2 µF or more can be used in CL.
CIN is a capacitor used to stabilize input. Use a
capacitor of 0.47 µF or more.
CL
CIN
VSS
GND
Single GND
Figure 5 Standard Circuit
Operating Conditions
Input capacitor (CIN)
Output capacitor (CL)
: 0.47 µF or more
: 2 µF or more
Equivalent Series Resistor (ESR) : 10 Ω or less
Input Series Resistor (RIN) : 10 Ω or less
Seiko Instruments Inc.
5
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
Technical Terms
1. Low dropout voltage regulator
The low dropout voltage regulator is a voltage regulator having a low dropout voltage characteristic due to the
internal low on-resistance transistor.
2. Output voltage (VOUT)
The accuracy of the output voltage is ensured at ± 2.0% under the specified conditions of input voltage,
output current, and temperature, which differ product by product.
Note:
When the above conditions are changed, the output voltage may vary and go out of the accuracy range of
the output voltage. See the electrical characteristics and characteristic data for details.
3. Line regulations 1 and 2 (∆VOUT1, ∆VOUT2)
Line regulation indicates the input voltage dependence of the output voltage. The value shows how much the
output voltage changes due to the change of the input voltage when the output current is kept constant.
4. Load regulation (∆VOUT3)
Load regulation indicates the output current dependence of output voltage. The value shows how much the
output voltage changes due to the change of the output current when the input voltage is kept constant.
5. Dropout voltage (Vdrop)
Let VIN1 be an input voltage where the output voltage falls to the 98% of the actual output voltage VOUT(E)
when gradually decreasing input voltage. The dropout voltage is the difference between the VIN1 and the
resultant output voltage defined as following equation.
Vdrop = VIN1-[VOUT(E) × 0.98]
6. Temperature coefficient of output voltage [∆VOUT/(∆Ta • VOUT)]
The shadowed area in Figure 6 is the range where VOUT varies in the operating temperature range when the
temperature coefficient of the output voltage is ±100 ppm/°C.
Typical Example of the S-818A28A
OUT
V
[V]
+0.28mV/ C
°
VOUT (E) is a mesured value of
output voltage at 25 C.
OUT
(E)
°
-0.28mV/ C
°
-40
25
Ta [ C]
85
°
Figure 6 Temperature coefficient range of output voltage
A change of output voltage in temperature [mV/°C] is calculated using the following equation.
∆VOUT
∆Ta • VOUT
∆VOUT
∆Ta
[ppm/°C] ÷1000
[mV/°C] = VOUT(S)[V] ×
Specified output voltage
Output voltage temperature coefficient
Change of output voltage in temperatures
6
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
VIN
Operation
*1
Current
source
1. Basic operation
Figure 7 shows the block diagram of the S-818
Series.
Error amplifier
VOUT
The error amplifier compares a reference voltage
Vref
Rf
VREF with the part of the output voltage divided by the
feedback resistors Rs and Rf. It supplies the output
transistor with the gate voltage, necessary to ensure
certain output voltage free of any fluctuations of input
voltage and temperature.
Reference
voltage
circuit
Rs
VSS
*1 Parasitic diode
Figure 7 Typical Circuit Block Diagram
2. Output transistor
The S-818 Series uses a low on-resistance Pch MOS FET as the output transistor.
Be sure that VOUT does not exceed VIN+0.3 V to prevent the voltage regulator from being broken due to
inverse current flowing from VOUT pin to VIN pin through the parasitic diode.
3. Power Off Pin (ON/OFF Pin)
This pin activates and inactivates the regulator.
When the ON/OFF pin is switched to the power off level, the operation of all internal circuit stops, the built-in
Pch MOSFET output transistor between VIN and VOUT pin is switched off, suppressing current consumption.
The VOUT pin goes to the Vss level due to internal divided resistance of several MΩ between VOUT pin and
VSS pin.
The structure of the ON/OFF pin is shown in Figure 8. Since the ON/OFF pin is neither pulled down nor pulled
up internally, do not keep it in the floating state. Current consumption increases if a voltage of 0.3 V to VIN-0.3
V is applied to the ON/OFF pin. When the power off pin is not used, connect it to the VIN pin for product type
"A" and to the VSS pin for product type "B".
Table 6 Power off pin function by product type
VIN
Product
type
ON/OFF pin
Internal
circuit
VOUT pin
voltage
Current
consumption
ON/OFF
A
A
B
B
“H” : Power on
“L” : Power off
“H” : Power off
“L” : Power on
Operating
Stop
Stop
Operating
Set value
VSS level
VSS level
Set value
Iss1
Iss2
Iss2
Iss1
Figure 8 ON/OFF Pin
Seiko Instruments Inc.
7
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
Selection of Output Capacitor (CL)
The S-818 series needs an output capacitor between VOUT pin and VSS pin for phase compensation. A small
ceramic or an OS electrolytic capacitor of 2 µF or more can be used. If a tantalum or an aluminum electrolytic
capacitor is used, its capacitance must be 2 µF or more and the ESR must be 10 Ω or less.
Attention should be paid not to cause an oscillation due to increase of ESR at low temperatures when using an
aluminum electrolytic capacitor.
Evaluate the performance including temperature characteristics before prototyping the circuit.
Overshoot and undershoot characteristics differ depending upon the type of the output capacitor. Refer to output
capacitor dependence data in transient response characteristics .
Design Considerations
•
Design wiring patterns for VIN, VOUT and GND pins to decrease impedance.
When mounting an output capacitor, connection from the capacitor to the VOUT pin and to the VSS pin
should be as close as possible.
•
•
Note that output voltage may increase when the voltage regulator is used at low load current (less than 10
µA).
To prevent oscillation, it is recommended to use the external components under the following conditions:
* Input capacitor (CIN): 0.47 µF or more
* Output capacitor (CL): 2 µF or more
* Equivalent Series Resistance (ESR): 10 Ω or less
* Input series resistance (RIN): 10 Ω or less
•
The voltage regulator may oscillate when the impedance of the power supply is high and the input
capacitor is small or not connected.
•
•
Be sure that input voltage and load current do not exceed the power dissipation level of the package.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned by a third party.
In determining necessary output current, consider the value of output current of Table 4 “Electrical
Characteristics” and Note *5) (page 4).
•
8
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Typical Characteristics (Typical Data)
(1) OUTPUT VOLTAGE vs. OUTPUT CURRENT (When load current increases)
S-818A20A(Ta=25°C)
2.0
S-818A30A(Ta=25°C)
10V
6V
3.0
4V
3V
2.0
10V
5V
5V
3.5V
1.0
1.0
0.0
2.5V
4V
VIN=2.3V
VIN=3.3V
0.0
0
0.2
0.4
IOUT(A)
0.6
0.8
0
0.2
0.4
IOUT(A)
0.6
0.8
S-818A50A(Ta=25°C)
6.0
10V
8V
* In determining necessary output current,
consider the following parameters:
• Minimum value of output current in
Table 4 “Electrical Characteristics”
and Note *5) (page 4);
5.0
4.0
3.0
2.0
1.0
7V
6V
• Power dissipation of the package
5.5V
VIN=5.3V
0.0
0
0.2
0.4
IOUT(A)
0.6
0.8
(2) OUTPUT VOLTAGE vs. INPUT VOLTAGE
S-818A20A (Ta=25°C)
S-818A30A (Ta=25°C)
3.5
3.0
2.5
2.0
1.5
2.5
Iout=10uA
100uA
1mA
Iout=10uA
100uA
2.0
60mA
1.5
60mA
4
30mA
30mA
1mA
1.0
2
3
5
1
2
3
4
V (V)
V (V)
S-818A50A (Ta=25°C)
5.5
Iout=10uA
100uA
1mA
5.0
4.5
4.0
60mA
30mA
4
5
6
7
V (V)
Seiko Instruments Inc.
9
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(3) MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE
S-818A20A
0.8
S-818A30A
0.8
0.6
0.4
0.2
0.0
Ta=-40°C
Ta=-40°C
25°C
85°C
0.6
0.4
0.2
85°C
25°C
0.0
0
2
4
6
8
10
0
2
4
6
8
10
VIN(V)
VIN(V)
S-818A50A
0.8
25°C
* In determining necessary output current,
consider the following parameters:
• Minimum value of output current in
Table 4 “Electrical Characteristics”
and Note *5) (page 4);
0.6
0.4
0.2
Ta=-40°C
85°C
• Power dissipation of the package
0.0
0
2
4
6
8
10
VIN(V)
(4) DROPOUT VOLTAGE vs. OUTPUT CURRENT
S-818A20A
2000
S-818A30A
2000
1500
1000
500
0
1500
85°C
85°C
Ta=-40°C
1000
500
0
Ta=-40°C
25°C
25°C
0
50
100 150 200 250 300
0
100
200
300
400
I
(mA)
I
(mA)
S-818A50A
2000
1500
1000
500
0
85°C
Ta=-40°C
25°C
0
100 200 300 400 500 600
(mA)
I
10
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
(5) OUTPUT VOLTAGE TEMPERATURE DEPENDENCE
S-818A20A
2.04
S-818A30A
3.06
VIN=3V, IOUT=30mA
VIN=4V, IOUT=30mA
2.02
2.00
1.98
1.96
3.03
3.00
2.97
2.94
-50
0
50
100
-50
0
50
100
Ta(°C)
Ta(°C)
S-818A50A
5.10
VIN=6V, IOUT=30mA
5.05
5.00
4.95
4.90
-50
0
50
100
Ta(°C)
(6) LINE REGULATION TEMPERATURE DEPENDENCE
V =V (S)+0.5 10V,I =30mA
↔
S-818A20/30/50A
35
30
25
20
15
10
5
3V
5V
V
=2V
0
-50
0
50
100
Ta(°C)
(7) LOAD REGULATION TEMPERATURE DEPENDENCE
S-818A20/30/50A V =V (S)+1V,I =10uA 80mA
↔
50
3V
40
30
20
5V
10
V
=2V
0
-50
0
50
100
Ta(°C)
Seiko Instruments Inc.
11
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(8) CURRENTCONSUMPTION vs. INPUT VOLTAGE
S-818A20A
40
S-818A30A
40
30
20
10
0
25°C
25°C
85°C
30
20
10
85°C
Ta=-40°C
Ta=-40°C
0
0
2
4
6
8
10
0
2
4
6
8
10
V (V)
V (V)
S-818A50A
40
30
20
10
85°C
25°C
Ta=-40°C
0
0
2
4
6
8
10
V (V)
(9) THRESHOLD VOLTAGE OF POWER OFF PIN vs. INPUT VOLTAGE
S-818A20A
2.5
S-818A30A
2.5
2.0
1.5
1.0
0.5
2.0
1.5
1.0
0.5
VSH
VSH
VSL
VSL
0.0
3
0.0
2
5
7
8
10
4
6
8
10
VIN(V)
VIN(V)
S-818A50A
2.5
2.0
1.5
1.0
0.5
VSH
VSL
0.0
5
6
8
9
10
VIN(V)
12
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
(10) RIPPLE REDUCTION RATE
S-818A20A
VIN=3V IOUT=30mA C =
COUT=2 F 0.5Vp-p Ta=25°C
µ
IN
None
0
-20
-40
Gain
(dB)
-60
-80
-100
0.1
1
10
100
f (kHz)
S-818A30A
0
VIN=4V IOUT=30mA CIN=NoneCOUT=2 F 0.5Vp-p Ta=25°C
µ
-20
-40
Gain
(dB)
-60
-80
-100
0.1
1
10
100
f (kHz)
S-818A50A
0
COUT=2 F 0.5Vp-p Ta=25°C
µ
VIN =6V IOUT=30mA C =
IN None
-20
-40
Gain
(dB)
-60
-80
-100
0.1
1
10
100
f (kHz)
Seiko Instruments Inc.
13
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
REFERENCE DATA
TRANSIENT RESPONSE CHARACTERISTICS (S-818A30A, Typical data: Ta=25°C)
INPUT VOLTAGE
or
LOAD CURRENT
Overshoot
OUTPUT VOLTAGE
Undershoot
(1) Power on
V =0 10V IOUT=30mA
→
IN
10V
0V
CL=4.7 F
µ
VIN
CL=2 F
µ
VOUT
0V
TIME(50usec/div)
Load dependence of overshoot
V =0 (S)+1V, CL=2 F
Output capacitor (CL) dependence of overshoot
V
→
µ
IN
OUT
V =0 VOUT(S)+1V, IOUT=30mA
→
IN
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
5V
VOUT=2V
3V
5V
3V
VOUT=2V
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
1
10
CL(µF)
100
VDD dependence of overshoot
Temperature dependence of overshoot
V =0
(S)+1V, IOUT=30mA,CL=2 F
V
→
V =0 VDD, I =30mA,CL=2 F
µ
→
µ
IN
IN
OUT
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
5V
3V
5V
3V
VOUT=2V
VOUT=2V
0
2
4
6
8
10
-50
0
50
100
VDD(V)
Ta(°C
14
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
(2) Power on/off control
V =10V ON/OFF=0 10V IOUT=30mA
→
IN
10V
0V
CL=4.7 F
µ
VIN
CL=2 F
µ
VOUT
0V
TIME(50usec/div)
Load dependence of overshoot
Output capacitor (CL) dependence of overshoot
VIN=VOUT(S)+1V IOUT=30mA, ON/OFF=0
VOUT(S)+1V
→
VIN=VOUT(S)+1V , CL=2 F, ON/OFF=0
VOUT(S)+1V
µ
→
1.0
0.8
0.6
0.4
0.2
0.0
1.0
0.8
0.6
0.4
0.2
0.0
5V
VOUT=2V
3V
5V
3V
VOUT=2V
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
1
10
CL(uF)
100
VDD dependence of overshoot
Temperature dependence of overshoot
VIN=VOUT(S)+1V ,IOUT=30mA, CL=2 F, ON/OFF=0
VOUT(S)+1V
→
µ
VIN=VDD ,IOUT=30mA, CL=2 F, ON/OFF=0 VDD
µ
→
1.0
0.8
0.6
0.4
0.2
0.0
1.0
5V
3V
0.8
0.6
0.4
0.2
0.0
VOUT=2V
5V
3V
VOUT=2V
0
2
4
6
8
10
-50
0
50
100
VDD(V)
Ta °C
Seiko Instruments Inc.
15
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(3) Power fluctuation
V =10 4V IOUT=30mA
→
IN
V =4 10V IOUT=30mA
→
IN
10V
4V
10V
4V
VIN
VIN
CL=2 F
µ
VOUT
CL=4.7 F
CL=4.7 F
µ
µ
VOUT
3V
3V
CL=2 F
µ
TIME(50usec/div)
Load dependence of overshoot
TIME(50usec/div)
Output capacitor (CL) dependence of overshoot
VIN=VOUT(S)+1V OUT(S)+2V, IOUT=30mA
V
→
VIN=VOUT(S)+1V
V
(S)+2V,CL=2 F
OUT
→
µ
0.05
0.04
0.03
0.02
0.01
0
0.6
VOUT=2V
0.4
0.2
0
3V
VOUT=2V
3V
5V
5V
1
10
CL(uF)
100
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
VDD dependence of overshoot
Temperature dependence of overshoot
V =VOUT(S)+1V
0.06
V
OUT(S)+2V, IOUT=30mA,CL=2 F
→
µ
VIN=VOUT(S) 1V VDD, I =30mA,CL=2 F
IN
+
→
µ
OUT
0.6
0.4
0.2
0
3V
0.05
0.04
0.03
0.02
0.01
0
3V
VOUT=2V
VOUT=2V
5V
5V
-50
0
50
100
0
2
4
6
8
10
VDD(V)
Ta °C
16
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Load dependence of undershoot
Output capacitor (CL) dependence of undershoot
VIN=VOUT(S)+2V
V
(S)+1V,CL=2 F
VIN=VOUT(S)+2V
0.05
VOUT(S)+1V ,IOUT=30mA
→
→
µ
OUT
0.3
0.2
0.1
0
5V
0.04
0.03
0.02
0.01
0
3V
VOUT=2V
VOUT=2V
3V
5V
1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00
IOUT(A)
1
10
CL(uF)
100
VDD dependence of undershoot
Temperature dependence of undershoot
V =VOUT(S)+2V
V
OUT(S)+1V, IOUT=30mA,CL=2 F
→
µ
V =VDD VOUT(S)+1V, IOUT=30mA,CL=2 F
IN
→
µ
0.2IN
0.06
5V
0.05
0.04
0.03
0.02
0.01
0
0.15
3V
VOUT=2V
3V
0.1
0.05
0
VOUT=2V
5V
0
2
4
6
8
10
-50
0
50
100
VDD(V)
Ta(°C)
Seiko Instruments Inc.
17
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Rev.1.2
(4) Load fluctuation
IOUT=10 A 30mA V =4V
µ →
IOUT=30mA 10 A V =4V
→
µ
IN
IN
30mA
30mA
10 A
µ
10 A
µ
IOUT
CL=2 F
IOUT
VOUT
µ
CL=2 F
µ
CL=4.7 F
µ
3V
3V
CL=4.7 F
µ
VOUT
TIME(50 sec/div)
µ
TIME(20msec/div)
Load current dependence of load fluctuation overshoot
∆IOUT shows larger load current at load current
fluctuation while smaller current is fixed to 10 µA.
For example ∆IOUT=1.E-02 (A) means load current
fluctuation from 10 mA to 10 µA.
Output capacitor (CL) dependence of overshoot
VIN=VOUT(S)+1V ,IOUT=30mA 10 A
VIN=VOUT(S)+1V,CL=2 F
µ
→
µ
1.0
0.8
0.6
0.4
0.2
0.0
0.2
5V
VOUT=2V
0.15
0.1
0.05
0
3V
3V
5V
VOUT=2V
1.E-03
1.E-02
1.E-01
1.E+00
1
10
CL(uF)
100
I
OUT(A)
∆
VDD dependence of overshoot
Temperature dependence of overshoot
VIN=VOUT(S)+1V ,IOUT=30mA 10 A CL=2 F
→
µ ,
µ
VIN=VDD, IOUT=30mA 10 A ,CL=2 F
→
µ
µ
0.3
0.2
0.1
0
0.3
0.25
0.2
3V
3V
0.15
0.1
VOUT=2V
VOUT=2V
5V
0.05
0
5V
8
0
2
4
6
10
-50
0
50
100
VDD(V)
Ta(°C)
18
Seiko Instruments Inc.
Rev.1.2
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-818 Series
Load current dependence of load fluctuation undershoot
∆IOUT shows larger load current at load current
fluctuation while smaller current is fixed to 10 µA.
For example ∆IOUT=1.E-02 (A) means load current
fluctuation from 10 µA to 10 mA.
Output capacitor (CL) dependence of undershoot
VIN=VOUT(S)+1V,CL=2 F
VIN=VOUT(S)+1V ,IOUT=10 A 30mA
µ
µ →
0.4
1.0
0.8
0.6
0.4
0.2
0.0
0.3
0.2
0.1
0
3V
3V
5V
5V
VOUT=2V
1.E-01
VOUT=2V
1.E-03
1.E-02
1.E+00
1
10
CL(uF)
100
IOUT(A)
∆
VDD dependence of undershoot
VIN=VDD, IOUT=10 A 30mA,CL=2 F
Temperature dependence of undershoot
VIN=VOUT(S)+1V ,IOUT=10 A 30mA CL 2 F
µ → = µ
,
µ →
µ
0.4
0.3
0.2
0.1
0
0.5
0.4
0.3
0.2
0.1
0
3V
VOUT=2V
3V
VOUT=2V
5V
5V
0
2
4
VDD(V)
6
8
10
-50
0
50
100
Ta(°C)
Seiko Instruments Inc.
19
MP005-A 991105
SOT-23-5
Unit mm
Dimensions
2.9±0.2
1.9±0.2
0.45
5
4
+0.2
-0.3
2.8
1.6
0.16 +0.1
-0.06
3
1
2
1.1±0.1
1.3max
0.95 0.1
0.4±0.1
Taping Specifications
Reel Specifications
4.0±0.1 (10 pitches 40.0±0.2)
3000 pcs./reel
2.0±0.05
ø1.5 +0.1
-0
0.27±0.05
12.5max.
3
max.
+0.1
-0
ø1.0
4.0±0.1
3
max.
1.4±0.2
3.25±0.15
9.0±0.3
21±0.5
φ13±0.2
2±0.2
(60°)
(60°)
Feed direction
UP005-A 990531
SOT-89-5
Unit mm
Dimensions
4.5±0.1
1.6±0.2
1.5±0.1
1
2
3
1.5±0.1 1.5±0.1
0.4±0.05
0.3
0.4±0.1
45
0.4±0.1
0.45±0.1
Taping Specifications
Reel Specifications
+0.1
ø1.5
-0
4.0±0.1(10 pitches 40±0.2)
1 reel holds 1000 ICs.
2.0±0.05
3
max.
ø1.5+0.1
8.0±0.1
0.3±0.05
2.0±0.1
5
max.
-0
4.75±0.1
ø13±0.2
ø21±0.5
2±0.2
Feed direction
814
990603
Markings
SOT-23-5
4
5
1
3
SOT-89-5
5
4
1
2
3
·
·
The information herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or other diagrams
described herein whose industrial properties, patents or other rights belong to third parties. The
application circuit examples explain typical applications of the products, and do not guarantee any
mass-production design.
·
·
When the products described herein include Strategic Products (or Service) subject to regulations,
they should not be exported without authorization from the appropriate governmental authorities.
The products described herein cannot be used as part of any device or equipment which influences
the human body, such as physical exercise equipment, medical equipment, security system, gas
equipment, vehicle or airplane, without prior written permission of Seiko Instruments Inc.
相关型号：
S8201Q
IC 82 SERIES, DUAL NEGATIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, CDFP24, FF/Latch
NXP
©2020 ICPDF网 联系我们和版权申明