S-24C04BPHAL [SII]
2-WIRE CMOS SERIAL E2PROM; CMOS 2线串行E2PROM
| 型号： | S-24C04BPHAL |
| 厂家： | 
SEIKO INSTRUMENTS INC |
| 描述： | 2-WIRE CMOS SERIAL E2PROM |
| 文件： | 总38页 (文件大小：352K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Rev.2.1_00
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
The S-24C04BPHAL is a 2-wire, low-power, wide-
range-operation 4k bit serial E2PROM organized as
512 words × 8 bits. Page write and sequential read
are possible.
Features
• Low power consumption
Standby:
Operating:
1.0 µA max. (VCC = 5.5 V)
0.8 mA max. (VCC = 5.5 V)
0.3 mA max. (VCC = 3.3 V)
1.6 to 5.5 V
• Wide operating voltage range:
Reading:
Writing:
16 bytes/page
1.7 to 5.5 V
• Page write:
• Sequential read
• Operating frequency:
• Endurance:
400 kHz (VCC = 5 V 10%)
106 cycles/word*1
*1. For each address (Word: 8 bits)
10 years
• Data retention:
• Write protection
• Lead-free products
100%
Package
Drawing Code
Package Name
WLP-5A
Package
HA005-A
Tape
HA005-A
Reel
HA005-A
Caution This product is intended for use in general electronic devices such as consumer
electronics, office equipment, and communications devices. Before using the product in
medical equipment or automobile equipment including car audio, keyless entry, and
engine control units, be sure to contact SII.
1
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Pin Configuration
WLP-5A
Bottom view
Table 1
Pin No.
Symbol
VCC
Description
1
2
Power supply
Serial data I/O
Write Protection pin
VCC
1
WP
3
SDA
2
SDA
3
WP
Connected to Vcc: Protection valid
Connected to GND: Protection invalid
Serial clock input
5
4
SCL
GND
4
5
SCL
GND
Ground
Figure 1
Remark See Dimensions for details of the package drawings.
S-24C04BPHAL
2
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Block Diagram
WP
VCC
GND
SCL
SDA
Start/stop
detector
Serial clock
controller
High-voltage generator
LOAD
COMP
LOAD
Device address
comparator
Data Register
INC
E2PROM
X decoder
R/W
Address
counter
Selector
Y decoder
Data output
ACK output
controller
DIN
DOUT
Figure 2
Absolute Maximum Ratings
Table 2
Symbol
VCC
VIN
VOUT
Topr
Tstg
Item
Power supply voltage
Input voltage
Output voltage
Operating ambient temperature
Ratings
−0.3 to +7.0
−0.3 to VCC + 0.3
−0.3 to VCC
−40 to + 85
−65 to + 150
Unit
V
V
V
°C
Storage temperature
°C
Caution The absolute maximum ratings are rated values exceeding which the
product could suffer physical damage. These values must therefore
not be exceeded under any condition.
3
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Recommended Operating Conditions
Table 3
Conditions
Reading
Writing
Item
Symbol
VCC
Min.
1.6
Typ.
Max.
5.5
Unit
V
−
−
−
−
−
−
Power supply voltage
1.7
5.5
V
VCC = 2.5 to 5.5 V
VCC = 1.6 to 2.5 V
VCC = 2.5 to 5.5 V
VCC = 1.6 to 2.5 V
0.7 × VCC
0.8 × VCC
0.0
VCC
VCC
0.3 × VCC
0.2 × VCC
V
High-level input voltage
Low-level input voltage
VIH
VIL
V
V
0.0
V
Pin Capacitance
Table 4
(Ta = 25°C, f = 1.0 MHz, Vcc = 5 V)
Item
Symbol
CIN
CI/O
Conditions
IN = 0 V (SCL, WP)
I/O = 0 V (SDA)
Min.
−
−
Typ.
−
−
Max.
10
10
Unit
pF
pF
Input capacitance
Input/output capacitance
V
V
Endurance
Table 5
Operating Temperature
Item
Endurance
Symbol
NW
Min.
106
Typ.
Max.
Unit
Cycles/word*1
−40 to +85°C
−
−
*1. For each address (Word: 8 bits)
4
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
DC Electrical Characteristics
Table 6
CC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.6 to 2.5 V
V
Item
Symbol Conditions
Unit
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Current consumption
(READ)
ICC1
ICC2
f = 100 kHz
f = 100 kHz
0.8*1
0.3
0.2 mA
1.5*2 mA
−
−
−
−
−
−
Current consumption
4.0
1.5
−
−
−
−
−
−
(PROGRAM)
*1. f = 400 kHz
*2. VCC = 1.7 to 2.5 V
Table 7
CC = 4.5 to 5.5 V
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
V
VCC = 2.5 to 4.5 V VCC = 1.6 to 2.5 V
Item
Symbol
Conditions
Unit
Standby current
consumption
Input current
leakage
ISB
ILI
1.0
1.0
1.0
0.6
1.0
1.0
0.4
VIN = VCC or GND
VIN = GND to VCC
−
−
−
−
−
−
−
−
−
−
−
−
µA
µA
µA
0.1
0.1
0.1
0.1
0.1 1.0
0.1 1.0
Output current
leakage
ILO
VOL
VAH
VOUT = GND to VCC
Low-level output
0.4
0.3
0.4
0.3
V
V
I
OL = 3.2 mA
OL = 1.5 mA
−
−
−
−
−
−
−
−
−
−
−
−
−
0.5
voltage
I
Current address
hold voltage
1.5
5.5 1.5
4.5 1.5
2.5
V
−
−
−
−
5
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
AC Electrical Characteristics
VCC
Table 8 Measurement Conditions
Input pulse voltage
Input pulse rise/fall time
Output judgment voltage
Output load
0.1 × VCC to 0.9 × VCC
20 ns
0.5 × VCC
100 pF + pull-up resistor 1.0 kΩ
R = 1.0 kΩ
C = 100 pF
SDA
Figure 3 Output Load Circuit
Table 9
V
Min.
0
CC = 4.5 to 5.5 V
VCC = 1.6 to 4.5 V
Item
Symbol
fSCL
tLOW
tHIGH
tAA
Unit
Typ.
−
−
Max.
400
−
Min.
0
Typ.
−
Max.
100
−
SCL clock frequency
SCL clock time “L”
SCL clock time “H”
kHz
µs
µs
µs
ns
µs
µs
ns
ns
µs
µs
µs
µs
ns
−
1.0
0.9
0.1
50
0.6
0.6
100
0
4.7
4.0
0.1
100
4.7
4.0
200
0
−
−
−
−
−
−
SDA output delay time
SDA output hold time
Start condition setup time
Start condition hold time
Data input setup time
Data input hold time
Stop condition setup time
SCL • SDA rise time
SCL • SDA fall time
Bus release time
0.9
−
3.5
−
−
−
tDH
−
−
−
−
tSU. STA
tHD. STA
tSU. DAT
tHD. DAT
tSU. STO
tR
tF
tBUF
tI
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.6
−
4.7
−
−
−
0.3
0.3
−
1.0
0.3
−
−
−
−
−
−
−
1.3
−
4.7
−
−
−
Noise suppression time
50
100
tHIGH
tLOW
tR
tF
SCL
tHD. DAT
tSU. DAT
tSU. STA
tHD. STA
tSU. STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 4 Bus Timing
6
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Table 10
Item
Symbol
tWR
Unit
ms
Min.
Typ.
4.0
Max.
10.0
Write time
t
SCL
SDA
D0
Stop condition
Start condition
Write data
Acknowledge
Figure 5 Write Cycle Timing
7
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Pin Functions
1. SDA (serial data input/output) pin
The SDA pin is used for bidirectional transfer of serial data. It consists of a signal input pin and an Nch
open-drain transistor output pin. Usually pull up the SDA line to VCC via a resistor, and use it with other
open-drain or open-collector output devices connected in a wired-OR configuration.
2. SCL (serial clock input) pin
The SCL pin is used for serial clock input. It is capable of processing signals at the rising and falling
edges of the SCL clock input signal. Make sure the rise time and fall time conform to the specifications.
3. WP pin
The WP pin is used for write protection. When there is no need for write protection, connect the pin to
GND; when there is a need for write protection, connect the pin to VCC.
8
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Operation
1. Start condition
When the SDA line changes from “H” to “L” with the SCL line at “H”, the device is in the start condition.
All operations begin from the start condition.
2. Stop condition
When the SDA line changes from “L” to “H” with the SCL line at “H”, the device is in the stop condition.
When the device receives the stop condition signal during a read sequence, the read operation is
interrupted, and the device enters standby mode.
When the device receives the stop condition signal during a write sequence, the retrieval of write data is
halted, and rewriting the E2PROM starts.
tSU. STA
tSU. STO
tHD. STA
SCL
SDA
Start condition
Stop condition
Figure 6 Start/Stop Condition
9
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
3. Data transfer
Changing the SDA line while the SCL line is “L” allows the data to be transferred.
A start or stop condition is recognized when the SDA line changes while the SCL line is “H”.
tSU. DAT
tHD. DAT
SCL
SDA
Figure 7 Data Transfer Timing
4. Acknowledgment
8 bits of data are transferred in succession. The device on the system bus that receives the data changes
the SDA line to “L” during the 9th clock cycle and outputs the acknowledge signal to inform that it has
received the data.
The device does not output the acknowledge signal while the E2PROM is being rewritten.
SCL
(E2PROM input)
1
8
9
SDA
(Master output)
Acknowledge
output
SDA
(E2PROM output)
Start condition
tAA
tDH
Figure 8 Acknowledge Output Timing
10
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
5. Device addressing
To perform data communications, the master device mounted on the system outputs the start condition signal
to the slave device. Next, the master device outputs a 7-bit device address and a 1-bit read/write instruction
code onto the SDA bus.
The higher 4 bits of the device address are called the “Device Code”, and are fixed to “1010”. The following 2
bits are “don’t care” bits.
When the comparison results match, the slave device outputs the acknowledge signal during the 9th clock
cycle.
Page
Don’t
care
address
Device code
1
0
1
0
X
X
P0
R / W
LSB
S-24C04BPHAL
MSB
Remark X: Don’t care
Figure 9 Device Address
In the S-24C04BPHAL, the 7th bit is a page address bit.
Accordingly, when P0 = 0, the first half of the memory area (2 Kb: addresses 000h to 0FFh) is selected; when
P0 = 1, the second half of the memory area (2 Kb; addresses 100h to 1FFh) are selected.
11
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
6. Write operation
6.1 Byte write
When the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “0”, following
the start condition signal, it outputs the acknowledge signal.
Next, when the E2PROM receives an 8-bit word address, it outputs the acknowledge signal.
After the E2PROM receives 8-bit write data and outputs the acknowledge signal, it receives the stop
condition signal. Next, rewriting the specified memory address of the E2PROM starts.
While the E2PROM is being rewritten, all operations are prohibited and the acknowledge signal is not
output.
S
T
A
R
T
W
R
I
S
T
O
P
DEVICE
T
E
ADDRESS
WORD ADDRESS
DATA
W7 W6 W5 W4 W3 W2 W1 W0
D7 D6 D5 D4 D3 D2 D1 D0
SDA line
X
X
1
0
1
0
P0
0
A
C
K
M
S
B
L
R
/
A
C
K
A
C
K
S
B
W
ADR INC
(ADDRESS INCREMENT)
Figure 10 Byte Write
12
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
6.2 Page write
Up to 16 bytes per page can be written in the S-24C04BPHAL.
Basic data transfer procedures are the same as those in “Byte write”. The S-24C04BPHAL performs page
write by successively receiving 8-bit write data sized pages.
When the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “0” following
the start condition signal, it outputs the acknowledge signal. When the E2PROM receives an 8-bit word
address, it outputs the acknowledge signal. After the E2PROM receives 8-bit write data and outputs the
acknowledge signal, it receives 8-bit write data corresponding to the next word address, and outputs the
acknowledge signal. The E2PROM repeats reception of 8-bit write data and output of the acknowledge
signal in succession and can receive write data corresponding to the maximum page size. When the stop
condition signal is received, E2PROM corresponding to the size of the page on which write data starting
from the specified memory address is received starts to be rewritten.
S
T
A
R
T
W
R
I
S
T
DEVICE
T
E
O
P
ADDRESS
WORD ADDRESS (n)
DATA (n)
DATA (n + 1)
DATA (n + x)
SDA
line
W7 W6
W4 W3W2
W1
W5
D7 D6
D4 D3 D2
D5 D1
W0
X
0
X
P0
0
D0
D7
D0
D7
D0
1
0
1
M
S
B
L
A
C
K
R A
/ C
W K
A
C
A
C
A
C
S
B
ADR INC
ADR INC
ADR INC
Figure 11 Page Write
The lower 4 bits of the word address are automatically incremented each time when the E2PROM receives
8-bit write data. Even when the write data exceeds 16 bytes, the higher 4 bits of the word address and
page address P0 remain unchanged, and the lower 4 bits are rolled over and overwritten.
13
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
6.3 Write Protection
Write protection is available in the S-24C04BPHAL. When the WP pin is connected to the VCC, write
operation to memory area is forbidden at all.
When the WP pin is connected to the GND, the write protection is invalid, and write operation in all memory
area is available.
Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of
the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this
time is not guaranteed.
There is no need for using write protection, the WP pin should be connected to the GND. The write
protection is valid in the operating voltage range.
tWR
SCL
SDA
WP
D0
Stop
Start
Condition
Condition
Write Data
Acknowledge
WP Pin Fixed Period
Figure 12 WP Pin Fixed Period
6.4 Acknowledge Polling
Acknowledge polling is used to know the completion of the write cycle in the E2PROM.
After the E2PROM receives a stop condition and once starts the write cycle, all operations are forbidden
and no response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the E2PROM by detecting
a response from the slave device after transmitting the start condition, the device address and the
read/write instruction code to the E2PROM, namely to the slave devices.
That is, if the E2PROM does not generate an acknowledge, the write cycle is in progress and if the E2PROM
generates an acknowledge, the write cycle has been completed.
Keep the level of the WP pin fixed until acknowledge is confirmed.
It is recommended to use the read instruction "1" as the read/write instruction code transmitted by the
master device.
14
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
7. Read
7.1 Current address read
The E2PROM holds the last accessed memory address during both writing and reading. The memory
address is retained as long as the power voltage is the retention voltage VAH or more. Accordingly, when
the master device recognizes the position of the address pointer inside the E2PROM, data can be read from
the memory address of the current address pointer without specifying a word address. This is called
“Current Address Read”.
“Current Address Read” is explained for when the address counter inside the E2PROM is address “n”.
When the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “1”, following
the start condition signal, it outputs the acknowledge signal.
Next, 8-bit data at address “n” is output from the E2PROM, in synchronization with the SCL clock.
The address counter is incremented to address n + 1 at the falling edge of the SCL clock at which the 8th
bit of data is output. The master device does not output the acknowledge signal and transmits the stop
condition signal to finish reading.
No ACK from
master device
S
T
A
R
T
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
D7 D6 D5 D4 D3 D2 D1 D0
DATA
1
0 1 0 X X P0 1
SDA line
M
S
B
L
S
B
R
A
C
K
/
W
ADR INC
Figure 13 Current Address Read
For recognition of the address pointer inside the E2PROM, take into consideration the following:
The memory address counter inside the E2PROM is automatically incremented for every falling edge of the
SCL clock at which the 8th bit of data is output during reading. During writing, the higher bits of the memory
address (higher 4 bits of the word address) are left unchanged and are not incremented at any falling of the
SCL clock when the 8th bit of the write data is received.
15
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
7.2 Random read
Random read is a mode used when data is read from arbitrary memory addresses.
To load a memory address into the address counter inside the E2PROM, first perform a dummy write
following the procedure below.
When the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “0” following the
start condition signal, it outputs the acknowledge signal.
Next, the E2PROM receives an 8-bit word address and outputs the acknowledge signal. The memory
address has now been loaded into the address counter of the E2PROM.
Following this, the E2PROM receives the write data during byte or page writing. However, data reception is
not performed during dummy write.
The memory address is loaded into the memory address counter inside the E2PROM during dummy write.
After that, the master device can read the data starting from the arbitrary memory address by transmitting a
new start condition signal and performing the same operation as that in the “Current Address Read”.
That is, when the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “1”
following the start condition signal, it outputs the acknowledge signal.
Next, 8-bit data is output from the E2PROM in synchronization with the SCL clock. The master device does
not output an acknowledge signal and transmits the stop condition signal instead. Reading is then complete.
W
R
I
S
T
A
R
T
S
T
A
R
T
No ACK from
master device
S
T
R
E
A
D
T
E
O
P
DEVICE
DEVICE
ADDRESS
WORD ADDRESS (n)
ADDRESS
DATA
SDA
line
1
0
1
0
X
X P0 0
W7 W6 W5 W4 W3 W2 W1 W0
1
0
1
0
X
X P0 1
D7 D6 D5 D4 D3 D2 D1 D0
M
S
B
L
S
B
R
/
W
A
C
K
M
S
B
L
S
B
R
/
W
A
C
K
A
C
K
ADR INC
DUMMY WRITE
Figure 14 Random Read
16
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
7.3 Sequential read
When the E2PROM receives a 7-bit device address and the 1-bit read/write instruction code “1” in both
current and random read operations following the start condition signal, it outputs the acknowledge signal.
When 8-bit data is output from the E2PROM, in synchronization with the SCL clock, the memory address
counter inside the E2PROM is automatically incremented at the falling edge of the SCL clock at which the
8th data is output.
When the master device transmits the acknowledge signal, the next memory address data is output.
When the master device transmits the acknowledge signal, the memory address counter inside the
E2PROM is incremented and data can be read in succession. This is called “Sequential Read”.
When the master device does not output an acknowledge signal and transmits the stop condition signal, the
read operation is finished.
Data can be read in the “Sequential Read” mode in succession. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
No ACK from
master device
R
E
A
D
S
T
A
C
K
A
C
K
DEVICE
A
C
K
ADDRESS
O
P
D7
D0
D7
D0
D7
D0
D0
D7
SDA
line
1
R
/
A
C
DATA (n +1 )
DATA (n + 2)
DATA (n + x)
DATA (n)
W K
ADR INC
ADR INC
ADR INC
ADR INC
Figure 15 Sequential Read
17
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
8. Address increment timing
The address increment timing is as follows. During a read operation, the memory address counter is
automatically incremented at the falling edge of the SCL clock (where the 8th bit of read data is output).
During a write operation, the memory address counter is also automatically incremented at the falling edge of
the SCL clock when the 8th bit of write data is fetched.
SCL
8
9
1
8
9
D7 output
D0 output
R / W = 1
SDA
ACK output
Address increment
Figure 16 Address Increment Timing in Read Operation
SCL
SDA
8
9
1
8
9
R / W = 0
ACK output
D7 input
D0 input
ACK output
Address increment
Figure 17 Address Increment Timing in Write Operation
18
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Using S-24C04BPHAL
1. Adding a pull-up resistor to SDA I/O pin and SCL input pin
Add a 1 kΩ to 5 kΩ pull-up resistor to the SCL input pin*1 and the SDA I/O pin in order to enable the
functions of the I2C Bus protocol. Normal communication cannot be provided without a pull-up resistor.
*1. When the SCL input pin of the E2PROM is connected to a tri-state output pin of the microprocessor,
connect the same pull-up resistor to prevent a high impedance status from being input to the SCL input
pin.
This protects the E2PROM from malfunction due to an undefined output (high impedance) from the tri-
state pin when the microprocessor is reset when the voltage drops.
2. Slave address
The S-24C04BPHAL does not have slave address pins (A0, A1, A2). Therefore two or more of this IC cannot
be used on the same bus.
However, slave addresses can be used without changing the communication software because they are
arbitrary addresses in communication with the master device.
1
0
1
0
x
x
P0
R/W
ACK
SDA line
Don’t care
MSB
LSB
Figure 18
19
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
3. I/O pin equivalent circuit
The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output.
The following shows the equivalent circuits.
SCL
Figure 19 SCL Pin
WP
Figure 20 WP Pin
SDA
Figure 21 SDA Pin
20
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
4. Maximum effectiveness of write protection
The following conditions must be satisfied to prevent erroneous writing at power-on due to write protection.
(1) Set the WP pin to high level at a time other than when the write instruction is being executed, including
during power-on or off.
(2) Adjust the phase after power-on.
Pulling up the WP pin to VCC to always enable the WP pin at the absolute maximum rated voltage or lower
prohibits writing all the time regardless of the conditions of the VCC, SDA, and SCL pins.
5. Matching phases while E2PROM is accessed
The S-24C04BPHAL does not have a pin for resetting (the internal circuit), therefore, the E2PROM cannot
be forcibly reset externally. If a communication interruption occurs in the E2PROM, it must be reset by
software.
For example, even if a reset signal is input to the microprocessor, the internal circuit of the E2PROM is not
reset as long as the stop condition is not input to the E2PROM. In other words, the E2PROM retains the
same status and cannot shift to the next operation. This symptom applies to the case when only the
microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage
is restored, reset the E2PROM (after matching the phase with the microprocessor) and input an instruction.
The following shows this reset method.
[How to reset E2PROM]
The E2PROM can be reset by the start and stop instructions. When the E2PROM is reading data “0” or
is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor
cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation
or read operation, and then input a start instruction. Figure 22 shows this procedure.
First, input the condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the
microprocessor sets the SDA line to high level. By this operation, the E2PROM interrupts the
acknowledge output operation or data output, so input the start condition*1. When a start condition is
input, the E2PROM is reset. To make doubly sure, input the stop condition to the E2PROM. Normal
operation is then possible.
Start
condition
Stop
condition
Start
condition
Dummy clock
1
2
8
9
SCL
SDA
Figure 22 Resetting E2PROM
*1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition
being input, a write operation may be started upon receipt of a stop condition. To prevent this, input
a start condition after 9 clocks (dummy clocks).
Remark It is recommended to perform the above reset using dummy clocks when the system is
initialized after the power supply voltage has been raised.
21
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
6. Acknowledge check
The I2C Bus protocol includes an acknowledge check function as a handshake function to prevent a
communication error. This function allows detection of a communication failure during data communication
between the microprocessor and E2PROM. This function is effective to prevent malfunction, so it is
recommended to perform an acknowledge check on the microprocessor side.
7. Built-in power-on-clear circuit
E2PROMs have a built-in power-on-clear circuit that initializes the E2PROM. Unsuccessful initialization may
cause a malfunction. For the power-on-clear circuit to operate normally, the following conditions must be
satisfied for raising the power supply voltage.
7.1 Raising power supply voltage
Raise the power supply voltage, starting at 0.2 V maximum, so that the voltage reaches the power supply
voltage to be used within the time defined by tRISE as shown in Figure 23.
For example, when the power supply voltage to be used is 5.0 V, tRISE is 200 ms as shown in Figure 24.
The power supply voltage must be raised within 200 ms.
tRISE (Max.)
Power supply voltage (VCC)
VINIT (Max.)
0.2 V
0 V*1
tINIT*2 (Max.)
*1. 0 V means there is no difference in potential between the VCC pin and the
GND pin of the E2PROM.
*2. tINIT is the time required to initialize the E2PROM. No instructions are
accepted during this time.
Figure 23 Raising Power Supply Voltage
22
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
5.0
4.0
Power supply voltage
(VCC
[V]
)
3.0
2.0
50
100 150 200
Rise time (tRISE) Max.
[ms]
For example:
If your E2PROM supply voltage = 5.0 V, raise the power supply
voltage to 5.0 V within 200 ms.
Figure 24 Raising Time of Power Supply Voltage
When initialization is successfully completed via the power-on-clear circuit, the E2PROM enters the standby
status.
If the power-on-clear circuit does not operate, the following are the possible causes.
(1) Because the E2PROM has not been initialized, an instruction formerly input is valid or an instruction
may be inappropriately recognized. In this case, writing may be performed.
(2) The voltage may have dropped due to power off while the E2PROM is being accessed. Even if the
microprocessor is reset due to the low power voltage, the E2PROM may malfunction unless the power-
on-clear operation conditions of E2PROM are satisfied. For the power-on-clear operation conditions of
E2PROM, refer to 7.1 Raising power supply voltage.
If the power-on-clear circuit does not operate, match the phase (reset) so that the internal E2PROM circuit is
normally reset. The statuses of the E2PROM immediately after the power-on-clear circuit operates and
when phase is matched (reset) are the same.
23
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
7.2 Wait for the initialization sequence to end
The E2PROM executes initialization during the time that the supply voltage is increasing to its normal value.
All instructions must wait until after initialization. The relationship between the initialization time (tINIT) and
rise time (tRISE) is shown in Figure 25.
100 m
10 m
E2PROM initialization
time (tINIT) Max.
[s]
1.0 m
100 µ
10 µ
1.0 µ
1.0 µ 10 µ 100 µ 1.0 m 10 m 100 m
Rise time (tRISE
[s]
)
Figure 25 Initialization Time of E2PROM
24
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
8. Data hold time (tHD. DAT = 0 ns)
If SCL and SDA of the E2PROM are changed at the same time, it is necessary to prevent the start/stop
condition from being mistakenly recognized due to the effect of noise. If a start/stop condition is mistakenly
recognized during communication, the E2PROM enters the standby status.
It is recommended that SDA is delayed from the falling edge of SCL by 0.3 µs minimum in the S-
24C04BPHAL. This is to prevent time lag caused by the load of the bus line from generating the stop (or
start) condition.
tHD. DAT = 0.3 µs Min.
SCL
SDA
Figure 26 E2PROM Data Hold Time
9. SDA pin and SCL pin noise suppression time
The S-24C04BPHAL includes a built-in low-pass filter to suppress noise at the SDA and SCL pins. This
means that if the power supply voltage is 5.0 V (at room temperature), noise with a pulse width of 150 ns or
less can be suppressed.
The guaranteed for details, refer to noise suppression time (tI) in Table 9.
300
200
100
Noise suppression time (tI) Max.
[ns]
2
3
4
5
Power supply voltage (VCC)
[V]
Figure 27 Noise Suppression Time for SDA and SCL Pins
25
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
10. Trap: E2PROM operation in case that the stop condition is received during write operation before
receiving the defined data value (less than 8-bit) to SCL pin
When the E2PROM receives the stop condition signal compulsorily, during receiving 1 byte of write data,
“write” operation is aborted.
When the E2PROM receives the stop condition signal after receiving 1 byte or more of data for “page write”,
8-bit of data received normally before receiving the stop condition signal can be written.
11. Trap: E2PROM operation and write data in case that write data is input more than defined page size at
“page write”
When write data is input more than defined page size at page write operation, for example, S-24C04BPHAL
(which can be executed 16-byte page write) is received data more than 17 byte, 8-bit data of the 17th byte
is over written to the first byte in the same page. Data over the capacity of page address cannot be written.
12. Trap: Severe environments
•
Absolute maximum ratings: Do not operate these ICs in excess of the absolute max ratings, as listed
on the data sheet. Exceeding the supply voltage rating can cause latch-up.
•
Operations with moisture on the E2PROM pins may occur malfunction by short-circuit between pins.
Especially, in occasions like picking the E2PROM up from low temperature tank during the evaluation.
Be sure that not remain frost on E2PROM pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
26
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Precautions
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement
of the products including this IC upon patents owned by a third party.
Precautions for WLP package
• The side of device silicon substrate is exposed to the marking side of device package. Since this portion
has lower strength against the mechanical stress than the standard plastic package, chip, crack, etc
should be careful of the handing of a package enough. Moreover, the exposed side of silicon has
electrical potential of device substrate, and needs to be kept out of contact with the external potential.
• In this package, the overcoat of the resin of translucence is carried out on the side of device area. Keep
it mind that it may affect the characteristic of a device when exposed a device in the bottom of a high
light source.
27
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Characteristics (Typical Data)
1. DC Characteristics
1.1 Current consumption (READ) ICC1
Ambient temperature Ta
−
1.2 Current consumption (READ) ICC1
Ambient temperature Ta
−
V
CC = 3.3 V
SCL = 100 kHz
DATA = 0101
V
CC = 5.5 V
SCL = 100 kHz
DATA = 0101
f
f
200
100
0
200
100
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1.3 Current consumption (READ) ICC1
Ambient temperature Ta
−
1.4 Current consumption (READ) ICC1
Power supply voltage VCC
−
V
CC = 1.8 V
SCL = 100 kHz
DATA = 0101
Ta = 25°C
f
f
SCL = 100 kHz
DATA = 0101
40
20
0
100
50
0
−40
0
85
2
3
4
5
6
7
Ta (°C)
VCC (V)
1.5 Current consumption (READ) ICC1
Power supply voltage VCC
−
1.6 Current consumption (READ) ICC1
Clock frequency fSCL
−
Ta = 25°C
V
CC = 5.0 V
f
SCL = 400 kHz
Ta = 25°C
DATA = 0101
200
100
0
200
100
0
2
3
4
5
6
7
100 k 200 k 300 k 400 k
fSCL(Hz)
VCC (V)
28
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
1.7 Current consumption (PROGRAM) ICC2
Ambient temperature Ta
−
1.8 Current consumption (PROGRAM) ICC2
Ambient temperature Ta
−
VCC = 3.3 V
V
CC = 5.5 V
1.0
0.5
0
1.0
0.5
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1.9 Current consumption (PROGRAM) ICC2
Ambient temperature Ta
−
1.10 Current consumption (PROGRAM) ICC2
Power supply voltage VCC
−
V
CC = 2.5 V
Ta = 25°C
1.0
0.5
0
1.0
0.5
0
5
−40
0
85
2
3
4
6
7
VCC (V)
Ta (°C)
1.11 Standby current consumption ISB
Ambient temperature Ta
−
1.12 Input current leakage ILI −
Ambient temperature Ta
V
CC = 5.5 V
V
CC = 5.5 V
SDA, SCL, WP = 0 V
10-7
10-8
10-9
10-10
10-11
1.0
0.5
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
29
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
1.13 Input current leakage ILI −
1.14 Output current leakage ILO
Ambient temperature Ta
−
Ambient temperature Ta
V
CC = 5.5 V
V
CC = 5.5 V
SDA = 0 V
SDA, SCL, WP = 5.5 V
1.0
0.5
0
1.0
0.5
0
−40
85
0
−40
0
85
Ta (°C)
Ta (°C)
1.15 Output current leakage ILO
Ambient temperature Ta
−
1.16 Low-level output voltage VOL
Low-level output current IOL
−
V
CC = 5.5 V
Ta = 25°C
SDA = 5.5 V
1.0
0.5
0
0.2
V
CC = 3.3 V
0.1
0
VCC = 5 V
−40
0
85
1
4
2
3
5
6
IOL (mA)
Ta (°C)
1.17 Low-level output voltage VOL
Ambient temperature Ta
−
1.18 Low-level output voltage VOL
Ambient temperature Ta
−
V
CC = 1.8 V
V
CC = 4.5 V
I
OL = 100 µA
I
OL = 3.2 mA
0.3
0.2
0.1
0.3
0.2
0.1
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
30
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
1.19 Low-level output current IOL
Ambient temperature Ta
−
1.20 Low-level output current IOL
Ambient temperature Ta
−
V
CC = 1.8 V
OL = 0.1 V
V
V
CC = 4.5 V
OL = 0.45 V
V
2.0
1.0
0
20
10
0
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
1.21 High input inversion voltage VIH −
1.22 High input inversion voltage VIH −
Power supply voltage VCC
Ambient temperature Ta
V
CC = 5.0 V
Ta = 25°C
SDA, SCL, WP
SDA, SCL, WP
3.0
2.0
1.0
3.0
2.0
1.0
0
0
−40
0
85
1
2
3
4
5
6
7
VCC (V)
Ta (°C)
1.23 Low input inversion voltage VIL −
1.24 Low input inversion voltage VIL −
Power supply voltage VCC
Ambient temperature Ta
V
CC = 5.0 V
Ta = 25°C
SDA, SCL, WP
SDA, SCL, WP
3.0
2.0
1.0
3.0
2.0
1.0
0
0
−40
0
85
1
2
3
4
5
6
7
VCC (V)
Ta (°C)
31
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
2. AC Characteristics
2.1
Maximum operating frequency fMAX
Power supply voltage VCC
−
2.2 Write time tWR −
Power supply voltage VCC
Ta = 25°C
Ta = 25°C
4
1 M
100 k
10 k
3
2
1
1
2
3
4
5
6
7
1
2
3
4
5
VCC (V)
VCC (V)
2.3 Write time tWR
−
2.4 Write time tWR
−
Ambient temperature Ta
Ambient temperature Ta
V
CC = 4.5 V
V
CC = 2.5 V
6
4
2
6
4
2
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
2.5 SDA output delay time tAA
Ambient temperature Ta
−
2.6 SDA output delay time tAA
Ambient temperature Ta
−
V
CC = 4.5 V
V
CC = 2.7 V
1.5
1.0
0.5
1.5
1.0
0.5
−40
0
85
−40
0
85
Ta (°C)
Ta (°C)
32
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
2.7 SDA output delay time tAA
Ambient temperature Ta
−
V
CC = 1.8 V
3.0
2.0
1.0
−40
0
85
Ta (°C)
33
Seiko Instruments Inc.
2-WIRE CMOS SERIAL E2PROM
S-24C04BPHAL
Rev.2.1_00
Product Name Structure
S-24C04BP HA L - TF
IC direction in tape specification
Operating voltage range
L : Writing 1.7 to 5.5 V, reading 1.6 to 5.5 V
Package code
HA : WLP type A
Product name
S-24C04BP : 4k bit
34
Seiko Instruments Inc.
1.66±0.02
1.21±0.02
0.6max.
0.4±0.02
0.6max.
S
0.15±0.03
ø0.25±0.02
0.06 S
(0.866)
B
5-(ø0.25)
M
A B
A
ø0.05
S
0.1
Pin name
Pin No.
1
1
3
VCC
SDA
WP
2
2
3
4
5
0.5
SCL
GND
5
4
No. HA005-A-P-SD-1.0
WLP-5A-A-PKG Dimensions
HA005-A-P-SD-1.0
TITLE
No.
SCALE
UNIT
Seiko Instruments Inc.
+0.1
-0
4.0±0.1
0.18±0.05
2.0±0.05
ø1.5
ø0.5±0.05
0.65±0.05
4.0±0.1
2.0±0.1
Count mark(R0.3,Depth 0.2)
(Every 10 pockets)
1.1
0.7
2.05
0.9
1.75±0.05
3 1
4 5
Feed direction
No. HA005-A-C-SD-2.0
TITLE
WLP-5A-A-Carrier Tape
HA005-A-C-SD-2.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
No. HA005-A-R-SD-1.0
TITLE
WLP-5A-A-Reel
HA005-A-R-SD-1.0
No.
3,000
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
·
·
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
·
·
·
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
·
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