SGM852 [SGMICRO]
Dual Adjustable Voltage Detector with Reset and Gate Driver Outputs;
| 型号： | SGM852 |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | Dual Adjustable Voltage Detector with Reset and Gate Driver Outputs 栅 |
| 文件： | 总14页 (文件大小：755K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM852
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
GENERAL DESCRIPTION
FEATURES
The SGM852 is a dual adjustable voltage detector with
reset and gate driver outputs. Two adjustable sense
inputs can monitor a wide voltage range through external
resistor dividers. The device has internal sequence timing.
The delay time of two outputs can be programmed by
their respective external capacitors. The gate driver
output is implemented for external N-MOSFET by a
charge pump circuit.
● Operating Voltage Range: 3V to 16V
● Low Dual Adjustable Threshold:
Rising Threshold: 0.6V (TYP)
Falling Threshold: 0.55V (TYP)
● High Threshold Accuracy:
Rising Threshold Accuracy: ±1.5%
Falling Threshold Accuracy: ±2%
● Push-Pull Reset Output
● Gate Driver Output
Two options are available. When both VSEN1 and
VSEN2 voltages exceed the internal fixed rising threshold
voltage in SGM852A, or VSEN1 voltage exceeds the
internal fixed rising threshold and VSEN2 voltage falls
below the internal fixed falling threshold in SGM852B,
both internal comparators output high, the reset output
(nRESET) asserts high after a propagation delay and a
capacitor charge set-time delay. And if either of the
comparators outputs low, nRESET asserts low.
● Capacitor-Adjustable Delay Time
● Available in a Green TDFN-3×3-10L Package
APPLICATIONS
Power Sequencing and Reset Sequencing
Power Switching
Portable Equipment
Computers/Servers
The SGM852 is available in a Green TDFN-3×3-10L
package. It operates over a junction temperature range
of -40℃ to +125℃.
TYPICAL APPLICATION
VCC
RIN
3V to 16V
RS1
RS2
VCC
CD_RST
CIN
CCD_RST
VIN1
VSEN1
GND
CD_GATE
CS1
GATE
SGM852
RS3
RS4
VIN2
VSEN2
nRESET
CN
CS2
CCP
CP
Figure 1. Typical Application Circuit
SG Micro Corp
www.sg-micro.com
SEPTEMBER2022–REV. A
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SGM852A
SGM852B
SGM
852AD
XXXXX
SGM
852BD
XXXXX
TDFN-3×3-10L
TDFN-3×3-10L
SGM852AXTD10G/TR
Tape and Reel, 4000
Tape and Reel, 4000
-40℃ to +125℃
-40℃ to +125℃
SGM852BXTD10G/TR
MARKING INFORMATION
NOTE: XXXXX = Date Code, Trace Code and Vendor Code.
X X X X X
Vendor Code
Trace Code
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
OVERSTRESS CAUTION
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
VCC................................................................... -0.3V to 24V
VSEN1, VSEN2 ................................................ -0.3V to 3.5V
CP, GATE....................................................... -0.3V to 12.6V
All Other Pins....................................................... -0.3V to 6V
Package Thermal Resistance
TDFN-3×3-10L, θJA.................................................... 51℃/W
Junction Temperature.................................................+150℃
Storage Temperature Range.......................-65℃ to +150℃
Lead Temperature (Soldering, 10s)............................+260℃
ESD Susceptibility
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
HBM.............................................................................3000V
CDM ............................................................................1000V
RECOMMENDED OPERATING CONDITIONS
VSEN1, VSEN2 ........................................................0V to 3V
Operating Supply Range, VCC.................................3V to 16V
Operating Junction Temperature Range......-40℃ to +125℃
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, or specifications without prior notice.
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
2
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
PIN CONFIGURATION
(TOP VIEW)
VCC
1
2
3
4
5
10 CD_GATE
VSEN2
GND
9
8
7
6
CD_RST
nRESET
CN
GND
VSEN1
GATE
CP
TDFN-3×3-10L
PIN DESCRIPTION
PIN
1
NAME
VCC
FUNCTION
Supply Voltage.
2
VSEN2
Input Sense Voltage Pin 2.
Ground Pin. GND is connected to the exposed pad and soldered to a large PCB for maximum
power dissipation.
3
GND
4
5
6
7
VSEN1
GATE
CP
Input Sense Voltage Pin 1.
N-MOSFET Gate Driver Output.
Charge Pump Capacitor Pin. Positive Node.
Charge Pump Capacitor Pin. Negative Node.
CN
Active-Low Push-Pull Reset Output Pin. For SGM852A, it goes high when both VSEN1 and
VSEN2 exceed the rising threshold voltage. For SGM852B, it goes high when VSEN1 exceeds
the rising threshold voltage and VSEN2 falls below the falling threshold voltage.
8
9
nRESET
CD_RST
Capacitor to Set Delay Time for nRESET Pin. Connect this pin to GND through an external
capacitor to set the reset delay time. Leave this pin open to set faster delay time.
Capacitor to Set Delay Time for Gate Pin. Connect this pin to GND through an external capacitor
to set the GATE delay time. Leave this pin open to set faster delay time.
10
CD_GATE
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
3
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
ELECTRICAL CHARACTERISTICS
(VCC = 16V, TJ = -40℃ to +125℃, typical values are at TJ = +25℃, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
3
TYP
MAX
UNITS
VCC
Operating Voltage
Supply Current
POR Threshold
POR Hysteresis
SENSE1/SENSE2
Rising Threshold
Falling Threshold
Hysteresis
VCC
ICC
16
66
V
μA
V
Charge pump off
39
2.6
200
VPOR
ΔVPHYS
2.5
2.7
mV
VRTH
VFTH
0.591
0.539
0.6
0.55
50
0.609
0.561
V
V
ΔVRHYS
ISENSE
mV
nA
Input Current
VSENx < 1V
-100
100
nRESET
Logic-High, VCC = 3V, IR = -2mA
Logic-High, VCC = 4V IR = -2mA
Logic-High, VCC = 5V, IR = -2mA
Logic-High, VCC > 5.5V, IR = -2mA
Logic-Low, IR = 2mA
2.6
3.6
3.9
3.9
0
2.87
3.88
4.68
4.54
3
4
VOH
nRESET Output Voltage
5
V
5.5
0.4
VOL
Timing
VSEN1 > 0.6V, VSEN2 > 0.6V for SGM852A
VSEN1 > 0.6V, VSEN2 < 0.55V for SGM852B
VSEN1 > 0.6V, VSEN2 > 0.6V for SGM852A
VSEN1 > 0.6V, VSEN2 < 0.55V for SGM852B
CD_RST Source Current
ICD_RST
0.925
0.925
1
1
1.075
1.075
μA
μA
CD_GATE Source Current
GATE Output Voltage (1)
ICD_GATE
VCC ≤ 5V
-10%
9.0
2 × VCC
10.0
1.234
50
+10%
11.0
VGATE
V
VCC > 5V
CD_RST Trip Rising Threshold
CD_RST Hysteresis
VRTH_RST
VHYS_RST
VRTH_GATE
VHYS_GATE
1.191
1.277
V
mV
V
CD_GATE Trip Rising Threshold
CD_GATE Hysteresis
1.191
1.234
50
1.277
mV
Ω
CD_RST Discharging Resistor
CD_GATE Discharging Resistor
Over-Temperature Protection
Thermal Shutdown
ICD_RST = 10mA
ICD_GATE = 10mA
7
12
12
7
Ω
TSD
155
20
℃
℃
Thermal Shutdown Hysteresis
ΔTSD
NOTE:
1. Note that when VGATE is from 0V to 2 × VCC (or from 0V to 10V), it needs to go through several cycles, during which a large
current will flow from the GATE pin.
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
4
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
TYPICAL PERFORMANCE CHARACTERISTICS
UVLO Threshold vs. Temperature
Quiescent Current vs. Temperature
2.7
2.6
2.5
2.4
2.3
2.2
2.1
60
50
40
30
20
10
0
VSEN1/VSEN2 < 0.6V
Power on
Power off
VIN = 16V
V
IN = 3V
-50
-50
0
-25
0
25
50
75
100 125
-50
-25
0
25
50
75
100 125
Temperature (℃)
Temperature (℃)
VSEN1 Threshold vs. Temperature
VSEN2 Threshold vs. Temperature
0.62
0.61
0.60
0.59
0.58
0.57
0.56
0.55
0.54
0.53
0.52
0.62
0.61
0.60
0.59
0.58
0.57
0.56
0.55
0.54
0.53
0.52
VIN = 16V
VIN = 16V
Rising
Falling
Rising
Falling
-50
-25
0
25
50
75
100
125
-25
0
25
50
75
100 125
Temperature (℃)
Temperature (℃)
VSEN1 and VSEN2 Transient Immunity
8
VSEN1
VSEN2
7
6
5
4
3
2
1
0
100
200
300
400
500
600
Oversient Voltage (mV)
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
5
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 16V, CIN = 100nF, CCP = 47nF, CCD_RST = 1µF, CCD_GATE = 1µF, CGATE = 1nF, VSEN1 = VSEN2 = 0V to 1.2V.
VSEN1 and VSEN2 Power on
VSEN1 and VSEN2 Power off
VSEN1
VSEN1
VSEN2
VSEN2
RST
RST
GATE
GATE
Time (500ms/div)
VSEN2 Power on
Time (10µs/div)
VSEN2 Power off
VSEN1
VSEN1
VSEN2
RST
VSEN2
RST
GATE
GATE
Time (500ms/div)
Time (10µs/div)
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
6
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
FUNCTIONAL BLOCK DIAGRAM
VCC
VDD
Regulator
VDD
VSEN1
VSEN2
+
-
VDD
VDD
+
-
VREF1
nRESET
VDD
VREF2
-
Logic
CD_RST
+
VDD
VDD
VREF2
-
+
CD_GATE
Charge Pump
GATE
GND
CP
CN
Figure 2. SGM852A Block Diagram
VCC
VDD
Regulator
VDD
VDD
VDD
VSEN1
VSEN2
+
-
VDD
-
VREF1
+
nRESET
VREF2
-
Logic
CD_RST
+
VDD
VDD
VREF2
-
+
CD_GATE
Charge Pump
GATE
GND
CP
CN
Figure 3. SGM852B Block Diagram
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
7
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
DETAILED DESCRIPTION
The SGM852 is used to monitor dual-voltage systems
and provides sequential control with two outputs. When
the power input voltage (VCC) exceeds the POR
threshold voltage, VPOR (2.6V, TYP), dual voltages are
monitored through the respective external resistor
dividers into VSEN1 and VSEN2 pin. Once both
VSENx voltages exceed the internal fixed rising
threshold, VRTH (0.6V, TYP), in SGM852A or once
VSEN1 exceeds VRTH and VSEN2 falls below the fixed
falling threshold VFTH, (0.55V, TYP), in SGM852B, both
internal comparators output high, the internal 1µA (TYP)
current source ICD_RST starts charging external capacitor
at CD_RST pin. Once the voltage at CD_RST pin exceeds
VRTH_RST (1.234V, TYP), the nRESET outputs high and
then another 1µA (TYP) current source ICD_GATE starts
charging external capacitor at CD_GATE pin. Once the
voltage at CD_GATE pin exceeds VRTH_GATE (1.234V, TYP),
the GATE pin starts to drive an external N-MOSFET
with a voltage level of 2 × VDD. Accordingly, the
corresponding delay time can be programmed by
choosing the capacitors at CD_RST pin and CD_GATE pin. If
either of the two comparators outputs low, the nRESET
outputs low and charge pump is disabled.
high after a CD_RST-controlled delay time. If either of the
comparators outputs low, the nRESET outputs low.
Power-On Reset (POR)
The device resets all fault latches and starts to monitor
VVSEN1 and VVSEN2 once VCC exceeds 2.6V.
Charge Pump
The charge pump with an internal oscillator is designed
to drive external N-MOSFET with a voltage level of 2 ×
VDD.
Regulators
The input voltage of the SGM852 is range from 3V to
16V. The built-in regulator provides 5V internal VDD if
VCC is above 5V, and it tracks VCC if VCC is below 5V.
Push-Pull Reset Output
The nRESET is a push-pull reset output pin. When both
internal comparators output high, the nRESET asserts
high after CD_RST-controlled delay time. And if either of
the comparators outputs low, nRESET asserts low after
C
D_RST is discharged.
Comparators
GATE Output
The comparators can provide threshold voltage to
monitor VSEN1 and VSEN2 sensing voltage, VVSEN1
and VVSEN2. For SGM852A, both VSEN1 and VSEN2
are connected to the positive input of the corresponding
comparator, while the internal reference is connected to
the negative input of the two comparators. So when
both VSEN1 and VSEN2 exceed VRTH, the nRESET
outputs high after a CD_RST controlled delay time. For
SGM852B, VSEN1 is connected to the positive input of
the comparator with the internal reference connecting
to the negative input of the comparator, while VSEN2 is
connected to the negative input of the comparator with
the internal reference connecting to the positive input of
the comparator. Therefore, for SGM852B, when
When nRESET asserts high, the charge pump is
enabled after CD_GATE-controlled delay time. And then,
GATE provides a voltage of 2 × VDD to drive the
external N-MOSFET. If nRESET asserts low, the
charge pump is disabled after CD_GATE discharged, and
GATE will be discharged to 0V.
Over-Temperature Protection (OTP)
The SGM852 may heat up due to power dissipation, and
then enter into the thermal shutdown state. The thermal
shutdown threshold TSD is +155℃ (TYP). The OTP will
turn off charge pump and timer function during this state.
Accordingly, both nRESET and GATE output low. And
the device will be shut down and remain off until the IC
temperature drops below +135℃ (TYP).
VSEN1 exceeds VRTH and VSEN2 falls below VFTH
,
both comparators output high, and the nRESET outputs
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
8
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
APPLICATION INFORMATION
VS_TH is the system trigger voltage that nRESET pin
asserts high, and ε is maximum acceptable error on
VSENx Transient Immunity
The VSEN1 and VSEN2 pins of the SGM852 have
certain anti-interference ability. Once the transient
duration exceeds the corresponding maximum allowed
time, the nRESET pin will go low.
VS_TH, ISENSE is the leakage current of VSEN1 and
VSEN2 pins. R2 can be calculated by equation (3):
VTH ×R1
R2 =
(3)
VS _ TH - VTH
Adjustable Input Sensing Threshold
The dual sense inputs, VSEN1 and VSEN2, can
monitor system voltage through a resistive divider
network with VRTH in a wide range. As shown in Figure
4, VS is the system voltage. The trigger voltage of
system VS_TH can be calculated by equation (1):
Adjustable Delay (CD_RST, CD_GATE
)
Users should choose external capacitors to set the
charge time from internal 1µA (TYP) current source and
thus set nRESET and GATE pins output delay time.
When the input voltage exceeds the POR threshold
voltage, VSEN1 and VSEN2 pins will start to monitor
system voltages. Once both outputs of the comparators
are high, a 1µA (TYP) current source starts charging
external capacitor at CD_RST pin. Once the voltage at
R
VS _ TH = VTH × 1+
(1)
1
R2
VS
C
D_RST pin exceeds VRTH_RST, the nRESET outputs high
R1
R2
VSENx
and then another 1µA (TYP) current source starts
charging external capacitor at CD_GATE pin. Once the
voltage at CD_GATE pin exceeds VRTH_GATE, the GATE pin
start to drive an external N-MOSFET with 2 × VDD
voltage level by the charge pump circuit. The delay time
can be calculated by equations (4) and (5):
+
-
SGM852
Figure 4. Setting Trigger Voltage of System
1.234V ×CCD_RST
tCD _RST
=
=
(4)
(5)
1μA
The absolute maximum voltages of VSEN1 and VSEN2
are not allowed to exceed 3V. Due to the leakage
currents of them are 100nA, the accuracy of VS_TH
should be taken into consideration. However, low value
resistor will cause more power consumption.
Appropriate selection of resistance value is also very
critical.
1.234V ×CCD_GATE
1μA
tCD _ GATE
where:
CD_RST and tCD_GATE are in seconds
CD_RST and CCD_GATE are in Farads.
t
C
When either output of the comparators is low, the
respective capacitors start to discharge on CD_RST and
CD_GATE pins. Once the voltage level is lower than
1.184V (50mV Hysteresis, TYP), the nRESET and
GATE go low. Figure 5 shows the time sequence.
The appropriate resistance value can be selected
through the following equation based on the amount of
acceptable error.
VS _ TH × ε
R1 =
(2)
ISENSE
SG Micro Corp
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SEPTEMBER 2022
9
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
APPLICATION INFORMATION (continued)
VCC_POR
VCC
VVSEN1 & VVSEN2 > VTH_SEN
VTH_SEN
VVSEN1/VVSEN2 < VTH_SEN
VFTH_SEN
tCD_RST_Falling
VSNSx
CD_RST
VCD_RST = VDD
VTH_RST
VFTH_RST
VRST = VDD
TCD_RST
nRESET
CD_GATE
GATE
VCD_GATE = VDD
tCD_GATE_Falling
VFTH_GATE
VRTH_GATE
VGATE = 2 × VDD
TCD_GATE
NOTE: 1. VDD is only internally used. It tracks VCC if VCC is below 5V, and it is close to 5V if VCC is above 5V.
Figure 5. SGM852A Timing Sequence Diagram
Typical Application Circuits
VIN
IN
Regulator 1
EN
VEN1
VOUT1
OUT
GND
VCC
3V to 16V
1
9
RIN
VCC
CD_RST
CD_GATE
GATE
CN
CIN
CCD_RST
4
10
RS1
VSEN1
GND
RS2
CS1
3
2
8
5
7
6
SGM852A
RS4
VSEN2
nRESET
RS3
CS2
CCP
VIN
IN
Regulator 2
EN
CP
VOUT2
OUT
GND
Figure 6. Power on Sequential Control Application Circuit of SGM852A
SG Micro Corp
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SEPTEMBER 2022
10
Dual Adjustable Voltage Detector
with Reset and Gate Driver Outputs
SGM852
APPLICATION INFORMATION (continued)
VIN
IN
Regulator 1
EN
VEN1
VOUT1
OUT
RIN
GND
VCC
3V to 16V
1
9
VCC
CD_RST
CD_GATE
GATE
CN
CIN
CCD_RST
RS1
4
10
VSEN1
GND
RS2
CS1
CCD_GATE
3
2
8
5
7
6
SGM852A
RS4
VSEN2
nRESET
RS3
CS2
CCP
VIN
IN
Regulator 2
EN
CP
VOUT2
OUT
GND
VIN
CGATE
Figure 7. Drive N-MOSFET to Control Output Connection of SGM852A
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Original (SEPTEMBER 2022) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
SG Micro Corp
www.sg-micro.com
SEPTEMBER 2022
11
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
TDFN-3×3-10L
D
e
N10
D1
k
E
E1
N5
N1
b
L
BOTTOM VIEW
TOP VIEW
2.4
1.7 2.8
A
A1
A2
0.6
SIDE VIEW
0.24
0.5
RECOMMENDED LAND PATTERN (Unit: mm)
Dimensions
In Millimeters
Dimensions
In Inches
Symbol
MIN
MAX
0.800
0.050
MIN
0.028
0.000
MAX
0.031
0.002
A
A1
A2
D
0.700
0.000
0.203 REF
0.008 REF
2.900
2.300
2.900
1.500
3.100
2.600
3.100
1.800
0.114
0.091
0.114
0.059
0.122
0.103
0.122
0.071
D1
E
E1
k
0.200 MIN
0.500 TYP
0.008 MIN
0.020 TYP
b
0.180
0.300
0.300
0.500
0.007
0.012
0.012
0.020
e
L
NOTE: This drawing is subject to change without notice.
SG Micro Corp
TX00060.000
www.sg-micro.com
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
TDFN-3×3-10L
13″
12.4
3.35
3.35
1.13
4.0
8.0
2.0
12.0
Q1
SG Micro Corp
TX10000.000
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PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
7″ (Option)
368
442
386
227
410
280
224
224
370
8
18
5
7″
13″
SG Micro Corp
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TX20000.000
相关型号：
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