SGM823A [SGMICRO]
Microprocessor Supervisory Circuit with Watchdog Timer and Manual Reset;
| 型号： | SGM823A |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | Microprocessor Supervisory Circuit with Watchdog Timer and Manual Reset |
| 文件： | 总13页 (文件大小：690K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM823A
Microprocessor Supervisory Circuit
with Watchdog Timer and Manual Reset
GENERAL DESCRIPTION
FEATURES
The SGM823A is
a
complete microprocessor
● Ultra-Low Supply Current: 0.64μA (TYP)
● Precision Supply-Voltage Monitor
2.19V for SGM823A-Y
supervisory device which combines reset, watchdog
and manual reset functions in a SOT-23-5 package.
System reliability is significantly improved by such
integration compared to the designs with individual
ICs or discrete components. The SGM823A also
features an excellent transient immunity to ignore fast
1.67V for SGM823A-W
1.58V for SGM823A-V
● Guaranteed nRESET Valid at VCC = 1V
● Push-Pull nRESET Output
● Reset Pulse Width: 200ms (TYP)
● Debounced TTL/CMOS-Compatible
● Manual Reset Input
V
CC transients.
This device has an active-low push-pull reset output
(nRESET) that is activated by a logic low on the
manual reset input (nMR), a watchdog expiry event or
due to a low VCC voltage. The nRESET output can still
be in the correct logic state even if VCC is lower than
1V. The SGM823A is offered in three fixed VCC reset
threshold voltages.
● Watchdog Timer with 1.6s (TYP) Timeout
● Fully Specified over Temperature
● Power-Supply Transient Immunity
● Without External Components
● -40℃ to +125℃ Operating Temperature Range
● Available in a Green SOT-23-5 Package
The SGM823A is available in a Green SOT-23-5
package. It operates over an ambient temperature
range of -40℃ to +125℃.
APPLICATIONS
Computers
Portable Equipment
Automotive Equipment
Intelligent Instruments
Critical μP Power Monitoring
TYPICAL APPLICATION
VCC
VCC
Microprocessor
VCC
nRESET
nRESET
SGM823A
nMR
WDI
I/O
Manual
Reset
GND
GND
SG Micro Corp
www.sg-micro.com
JULY 2022–REV. A.2
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
PACKAGE/ORDERING INFORMATION
RESET
THRESHOLD (V)
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
2.19
1.67
1.58
SOT-23-5
SOT-23-5
SOT-23-5
SGM823A-YXN5G/TR
SGM823A-WXN5G/TR
SGM823A-VXN5G/TR
CV5XX
CV4XX
CV3XX
Tape and Reel, 3000
Tape and Reel, 3000
Tape and Reel, 3000
SGM823A
MARKING INFORMATION
NOTE: XX = Date Code.
YYY X X
Date Code - Week
Date Code - Year
Serial Number
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (with Respect to GND)
VCC ................................................................-0.3V to 6.0V
All Other Inputs ...................................-0.3V to VCC + 0.3V
Input Current
OVERSTRESS CAUTION
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
VCC ........................................................................... 20mA
GND ......................................................................... 20mA
Output Current
All Outputs................................................................ 20mA
Package Thermal Resistance
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
SOT-23-5, θJA .......................................................... 251℃/W
Junction Temperature................................................+150℃
Storage Temperature Range....................... -65℃ to +150℃
Lead Temperature (Soldering, 10s)...........................+260℃
ESD Susceptibility
HBM.............................................................................4000V
CDM ............................................................................1000V
RECOMMENDED OPERATING CONDITIONS
Operating Junction Temperature Range.......-40℃ to +125℃
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, or specifications without prior notice.
SG Micro Corp
www.sg-micro.com
JULY 2022
2
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
PIN CONFIGURATION
(TOP VIEW)
nRESET
GND
1
2
5
4
VCC
nMR
WDI
3
SOT-23-5
PIN DESCRIPTION
PIN
NAME
nRESET
GND
I/O
O
–
FUNCTION
Active-Low Reset Output Pin. It delivers a 200ms (TYP) low pulse when activated. nRESET
remains low if VCC is below the reset threshold or nMR is logic low. It goes (or remains) low for
200ms after any of the following events: VCC rises above the reset threshold, a watchdog expiry
triggers a reset, or the nMR input goes from low to high.
1
2
Ground.
Manual Reset Input Pin. nRESET keeps low when nMR is low. When nMR is high, nRESET
becomes high after a 200ms timeout period. It is an active-low reset input with an internal 65kΩ
pull-up resistor. nMR can be driven by a CMOS/TTL logic or by a switch shorting to GND. If not
3
nMR
I
used, leave it open or connect it to VCC
.
Watchdog Input Pin. If the high or low state of WDI exceeds the watchdog timeout period, the
internal watchdog timer is expired and a reset is triggered. The internal watchdog timer is clear
while a reset is asserted. The timer is also cleared if the WDI input is changed (on rising or falling
edges). The watchdog feature is disabled if the WDI is left open or if it is connected to a
three-stated buffer output.
4
5
WDI
VCC
I
I
Supply Voltage Pin.
NOTE: I: input; O: output.
SG Micro Corp
www.sg-micro.com
JULY 2022
3
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
ELECTRICAL CHARACTERISTICS
(VCC = 2.1V to 2.75V for SGM823A-Y, VCC = 1.53V to 2.0V for SGM823A-W/V, TJ = -40℃ to +125℃, typical values are at TJ =
+25℃, unless otherwise noted.)
PARAMETER
Operating Voltage Range (VCC
CONDITIONS
MIN
TYP
MAX
5.5
UNITS
)
1
V
VCC = 3.3V
VCC = 5.5V
0.64
0.77
2.195
2.195
2.195
1.675
1.675
1.675
1.585
1.585
1.585
11
1.60
Supply Current (ISUPPLY
)
μA
1.80
2.155
2.150
2.105
1.640
1.635
1.590
1.550
1.545
1.515
2.235
2.240
2.285
1.710
1.715
1.760
1.620
1.625
1.655
TJ = +25℃
SGM823A-Y
SGM823A-W
SGM823A-V
TJ = -40℃ to +85℃
TJ = -40℃ to +125℃
TJ = +25℃
nRESET Threshold (VnRST
)
V
TJ = -40℃ to +85℃
TJ = -40℃ to +125℃
TJ = +25℃
TJ = -40℃ to +85℃
TJ = -40℃ to +125℃
SGM823A-Y
nRESET Threshold Hysteresis (VHYS
)
SGM823A-W
SGM823A-V
8
mV
8
nRESET Threshold Temperature Coefficient
20
TJ = -40℃ to +85℃
ppm/℃
nRESET Pulse Width (tRP
)
120
200
300
ms
V
CC ≥ 1.8V, ISOURCE = 200µA, reset not asserted
0.8 × VCC
VOH
VCC ≥ 3.15V, ISOURCE = 500µA, reset not asserted 0.8 × VCC
VCC ≥ 4.75V, ISOURCE = 800µA, reset not asserted 0.8 × VCC
VCC ≥ 1.0V, ISINK = 50µA, reset asserted
VCC ≥ 1.2V, ISINK = 100µA, reset asserted
VCC ≥ 2.55V, ISINK = 1.2mA, reset asserted
VCC ≥ 4.25V, ISINK = 3.2mA, reset asserted
VnRST - VCC = 100mV
nRESET Output Voltage
0.3
0.3
0.3
0.4
V
VOL
VCC to Reset Delay (tRD
)
90
μs
s
Watchdog Timeout Period (tWD
)
1.1
1.6
2.4
0.8
0.6
0.5
0.6
WDI Pulse Width (tWP
)
VIL = 0V, VIH = VCC
VCC = 5.5V
90
ns
Low
High
Low
High
VCC = 5.5V
3.5
WDI Input Threshold
V
VnRST(MAX) < VCC < 3.3V
VnRST(MAX) < VCC < 3.3V
WDI = VCC, time average
WDI = 0V, time average
0.7 × VCC
-0.5
0.01
WDI Input Current
nMR Input Voltage
μA
-0.01
VIL
VIH
V
0.7 × VCC
300
nMR Pulse Width (tMR
)
ns
ns
nMR Noise Immunity
(Pulse Width with No Reset)
nMR to nRESET Out Delay (tMD
130
65
)
550
90
ns
nMR Pull-Up Resistance (Internal)
40
kΩ
SG Micro Corp
www.sg-micro.com
JULY 2022
4
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs. Temperature
nRESET Timeout Period vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0.0
240
230
220
210
200
190
180
VCC = 5.5V
VCC = 3.3V
VCC = 1.8V
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
Temperature (℃)
VCC to nRESET Propagation Delay vs. Temperature
VCC Falling, VCC = VnRST - 100mV
Watchdog Timeout Period vs. Temperature
150
130
110
90
2.0
1.9
1.8
1.7
1.6
1.5
1.4
70
50
30
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
Temperature (℃)
Normalized nRESET Threshold Voltage vs. Temperature
1.06
Maximum VCC Transient Duration vs. nRESET Threshold Overdrive
400
350
300
1.04
1.02
1.00
0.98
0.96
0.94
250
Reset Occurs Above Line
200
150
100
50
0
-50 -25
0
25
50
75 100 125 150
0
50 100 150 200 250 300 350 400
Temperature (℃)
nRESET Threshold Overdrive (mV), VnRST - VCC
SG Micro Corp
JULY 2022
www.sg-micro.com
5
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Voltage Output (VOUT) Low vs. ISINK
VCC = 2.9V
Voltage Output (VOUT) High vs. ISOURCE
VCC = 2.9V
0.25
0.20
0.15
0.10
0.05
0.00
2.91
2.90
2.89
2.88
2.87
2.86
0
1
2
3
4
5
6
7
0
0.2
0.4
0.6
0.8
1
ISINK (mA)
ISOURCE (mA)
SG Micro Corp
www.sg-micro.com
JULY 2022
6
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
FUNCTIONAL BLOCK DIAGRAM
VCC
nMR
+
Reset
nRESET
Generator
_
+
1.25V
_
Watchdog
Transition
Detector
Watchdog
Timer
WDI
SGM823A
GND
SG Micro Corp
www.sg-micro.com
JULY 2022
7
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
DETAILED DESCRIPTION
nRESET Output
The reset input of a microprocessor (μP) initiates it to a
known state. The SGM823A supervisory circuit asserts
Watchdog Input
The internal watchdog circuit monitors the μP’s activity
by checking the WDI input. If the μP does not toggle the
WDI within the watchdog tWD (1.6s, TYP) period,
nRESET will send a low pulse to reset the μP. So, the
code should be written such that successive toggles on
WDI occur in periods not longer than the lowest tWD
time to reset the internal watchdog timer and prevent
μP reset when the code is running normally. The
watchdog timer is cleared by either toggling WDI or by
a pulse with a duration as short as 90ns. While the
reset is asserted and nRESET is low, the watchdog
timer is cleared and timer does not count. It starts
counting when the reset is released and nRESET goes
high (Figure 2).
a
reset to the supervised μP to prevent the
code-execution errors that may occur due to power-up,
power-down, brownout conditions or other transients.
The nRESET output is still in the correct logic state
even if VCC is lower than 1V. During power-up, when
VCC exceeds the rising threshold voltage (VnRST + VHYS),
an internal timer keeps nRESET in low state for the
reset timeout period (tRP) before nRESET returns to the
high state (Figure 1).
If VCC drops below the falling threshold voltage (VnRST
)
(a brownout condition occurs), a reset is asserted and
nRESET goes low. In general, nRESET remains low for
the tRP (200ms, TYP) period every time after the last
event. So, if during the low period of nRESET, VCC goes
up and dips below VnRST again, the internal timer will
restart for a new tRP period. The nRESET output can
source and sink current.
To disable the watchdog function, leave the WDI pin
open. If WDI is driven by a 3-state buffer, set it to the
Hi-Z state. In this case the buffer leakage current
should not exceed 10μA. The maximum capacitance
seen on the WDI pin should be less than 200pF to
assure that watchdog remains disabled. The watchdog
input is internally oscillating when it is left open to clear
the watchdog timer and prevent it from generating a
reset. It is driven low during the first 7/8 of the watchdog
timeout period and driven high in the last 1/8 of that.
For example if WDI input is open and the watchdog
timeout is 1.6s, the watchdog timer will automatically
clear every 1.4s and reset will not occur.
VCC
VnRST
VnRST + VHYS
1V
1V
tRP
tRD
nRESET
Figure 1. nRESET Timing Diagram
VCC
VnRST + VHYS
Manual Reset Input
Many μP-based products need manual-reset capability
to let the operator or an external logic reset the μP. For
the SGM823A, applying a logic low to the nMR input,
asserts a reset (nRESET = low). nRESET remains low
while nMR is low, and will stay low for the tRP (200ms,
TYP) period after nMR returns to high state. The nMR
input is internally pulled up by a 65kΩ resistor and can
be left floating if not used. It can be driven by a
CMOS/TTL logic or by a switch shorting to GND. A
normally open momentary switch connected between
nMR and GND pins can be used as a manual reset.
Switch debouncing is not needed. However, if long
cables are used to drive the nMR input or if the
environment is noisy, connect a 0.1μF capacitor
between nMR and GND to immune the additional
noise.
tRP
nRESET
WDI
tWD
tRP
Figure 2. Watchdog Timing Relationship
SG Micro Corp
www.sg-micro.com
JULY 2022
8
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
APPLICATION INFORMATION
Using SGM823A with Microprocessors
with Bidirectional Reset Pins
Watchdog Software Considerations
To have a more effective watchdog in software
monitoring, rather than generating pulses by a code
segment, set and reset the WDI input at different points
of the program code. For example, set it in the main
program and reset it in a periodic timing interrupt. For
example if WDI is toggled within an unwanted infinite
loop, it will continuously reset watchdog as a normal
condition and the processor is not reset.
Some microprocessors can internally force their reset
pins low to assert a reset (bidirectional reset pins). The
low pull-up current of the SGM823A allows using of
them along with the microprocessors with bidirectional
resets like the 68HC11. The microprocessor can force
nRESET low when nRESET is pulled high by the
SGM823A with no issues (Figure 3).
An example of a watchdog flow is shown in Figure 4.
The WDI is set high at the start of the program, and is
set low at the start of every subroutine or loop, then is
set high again when the program returns to the start. If
the processor hangs in any subroutine, the WDI
toggling will not occur and the watchdog will reset the
processor and correct the situation.
VCC
VCC
SGM823A
VCC
VCC
μP
Reset
Generator
nRESET
The nRESET output may also be connected to an
interrupt input of the μP for a corrective action if
preferred.
GND
GND
Note that such watchdog control schemes may not be
optimal if the total power consumption is critical as
discussed in the watchdog input current section.
Figure 3．Interfacing to μP with Bidirectional Resets
Negative-Going VCC Transient Immunity
The SGM823A has the ability to immune short time and
negative VCC transients or even glitches. It does not
need to shut down the entire system. Resets are
applied to the microprocessor during power-up,
power-down and brownout conditions and not when an
insignificant VCC transient occurs.
Start
Set WDI High
Program Code
A 0.1μF ceramic capacitor is recommended between
the VCC and GND pin to reduce the input supply noise.
Subroutine or
Program Loop Set
WDI Low
Watchdog Input Current
The WDI input is internally driven by a buffer and series
resistor from an internal counter chain stage of the
watchdog. Therefore, when WDI is open, the watchdog
timer is automatically cleared before timeout (by an
internal low-high-low pulse).
Return
To get the minimum WDI input current (minimum power
loss), keep WDI low for the majority of the timeout
period and send a high pulse at the first 7/8 of the
timeout period for clearing the watchdog timer.
Figure 4. Watchdog Flow Diagram
SG Micro Corp
www.sg-micro.com
JULY 2022
9
Microprocessor Supervisory Circuit
SGM823A
with Watchdog Timer and Manual Reset
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
JULY 2022 ‒ REV.A.1 to REV.A.2
Page
Updated Application Information section..............................................................................................................................................................9
OCTOBER 2020 ‒ REV.A to REV.A.1
Page
Added 2.19V Reset Threshold.....................................................................................................................................................................1, 2, 4
Changes from Original (JULY 2020) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
SG Micro Corp
www.sg-micro.com
JULY 2022
10
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOT-23-5
1.90
D
e1
2.59
E1
E
0.99
b
e
0.95
0.69
RECOMMENDED LAND PATTERN (Unit: mm)
L
A
A1
c
θ
0.2
A2
Dimensions
In Millimeters
Dimensions
In Inches
Symbol
MIN
MAX
1.250
0.100
1.150
0.500
0.200
3.020
1.700
2.950
MIN
MAX
0.049
0.004
0.045
0.020
0.008
0.119
0.067
0.116
A
A1
A2
b
1.050
0.000
1.050
0.300
0.100
2.820
1.500
2.650
0.041
0.000
0.041
0.012
0.004
0.111
0.059
0.104
c
D
E
E1
e
0.950 BSC
1.900 BSC
0.037 BSC
0.075 BSC
e1
L
0.300
0°
0.600
8°
0.012
0°
0.024
8°
θ
SG Micro Corp
www.sg-micro.com
TX00033.000
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
SOT-23-5
7″
9.5
3.20
3.20
1.40
4.0
4.0
2.0
8.0
Q3
SG Micro Corp
TX10000.000
www.sg-micro.com
PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
7″ (Option)
7″
368
442
227
410
224
224
8
18
SG Micro Corp
www.sg-micro.com
TX20000.000
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