SGM61232 [SGMICRO]
28V, 3A, Buck DC/DC Converter;
| 型号： | SGM61232 |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | 28V, 3A, Buck DC/DC Converter |
| 文件： | 总19页 (文件大小：945K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM61232
28V, 3A, Buck DC/DC Converter
GENERAL DESCRIPTION
FEATURES
The SGM61232 is a current mode controlled non-
synchronous Buck converter with 4V to 28V input range,
3A rated output current and adjustable output voltages
from 0.8V up to 25V. A low RDSON N-MOSFET is
integrated as high-side switch. Pulse-skip mode (PSM)
feature is activated automatically for power-save mode
at light loads to improve efficiency. Because of its low
shutdown current (1.2μA, TYP), this device can be
used in battery operated applications. The internal
current mode controller with slope compensation allows
ceramic capacitors at the output and simplifies
compensation network design. The UVLO level can be
adjusted (increased) by an external resistor divider.
Protection against over-voltage transient is provided to
limit the startup or other transient overshoots. Secure
operation in overload conditions is ensured by
cycle-by-cycle current limit, frequency fold-back and
thermal shutdown protection.
● 4V to 28V Input Voltage Range
● 0.8V Internal Voltage Reference
● 0.8V to 25V Adjustable Output Voltage Range
● Integrated 77mΩ High-side MOSFET Supports up
to 3A Continuous Output Current
● Fixed 540kHz Switching Frequency
● Typical 1.2μA Shutdown Quiescent Current
● High Light Load Efficiency
● Adjustable Soft-Start to Limit Inrush Current
● Programmable UVLO Threshold
● Over-Voltage Transient Protection
● Cycle-by-Cycle Current Limit
● Frequency Fold-Back Protection
● Thermal Shutdown Protection
● Available in a Green SOIC-8 (Exposed Pad)
Package
APPLICATIONS
The SGM61232 is offered in a Green SOIC-8 (Exposed
Pad) package and can operate in the -40℃ to +125℃
ambient temperature range.
Industrial Power Supplies
Distributed Power Systems
CPE Equipment
Set-Top Boxes
LCD Displays
Battery Chargers
TYPICAL APPLICATION
CBOOT
VIN
VIN
BOOT
CIN
REN1
L
VOUT
SW
EN
REN2
D
COUT
SGM61232
ROUT1
COMP
SS
C1
R3
VSENSE
GND
CSS
C2
ROUT2
Figure 1. Typical Application Circuit
SG Micro Corp
JANUARY 2023 – REV. A. 3
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SGM61232
28V, 3A, Buck DC/DC Converter
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SGM
61232XPS8
XXXXX
SOIC-8
(Exposed Pad)
SGM61232
SGM61232XPS8G/TR
Tape and Reel, 4000
-40℃ to +125℃
MARKING INFORMATION
NOTE: XXXXX = Date Code, Trace Code and Vendor Code.
X X X X X
Vendor Code
Trace Code
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
OVERSTRESS CAUTION
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
VIN Voltage........................................................ -0.3V to 30V
EN Voltage........................................................... -0.3V to 6V
VSENSE, COMP Voltages................................... -0.3V to 3V
SS Voltage........................................................... -0.3V to 5V
BOOT-SW Voltage ............................................................6V
SW Voltage........................................................ -0.6V to 30V
SW Voltage 10ns Transient...............................................-5V
Package Thermal Resistance
ESD SENSITIVITY CAUTION
SOIC-8 (Exposed Pad), θJA..................................... 45℃/W
SOIC-8 (Exposed Pad), θJC .................................... 65℃/W
Junction Temperature.................................................+150℃
Storage Temperature Range .......................-65℃ to +150℃
Lead Temperature (Soldering, 10s)............................+260℃
ESD Susceptibility
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failure to observe proper handling and installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
HBM.............................................................................3000V
CDM ............................................................................1000V
RECOMMENDED OPERATING CONDITIONS
Input Voltage Range...............................................4V to 28V
Operating Ambient Temperature Range......-40℃ to +125℃
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, or specifications without prior notice.
SG Micro Corp
www.sg-micro.com
JANUARY 2022
2
SGM61232
28V, 3A, Buck DC/DC Converter
PIN CONFIGURATION
(TOP VIEW)
BOOT
VIN
EN
1
2
3
4
8
7
6
5
SW
GND
GND
COMP
VSENSE
SS
SOIC-8 (Exposed Pad)
PIN DESCRIPTION
PIN
NAME
I/O
DESCRIPTION
Bootstrap Input (for N-MOSFET gate driver supply voltage). Connect it to SW pin with a 0.1μF
ceramic capacitor. The MOSFET will turn off if the BOOT capacitor voltage drops below its
BOOT-UVLO level to get the capacitor voltage refreshed.
1
BOOT
O
2
3
4
5
VIN
EN
P
I
Input Supply Voltage. Connect to a 4V to 28V power source.
Active High Enable Input. Float or pull up to enable, or pull down below 1.25V to disable the
device. VIN UVLO level can be programmed using a resistor divider from VIN.
Soft-Start Input. Connect an external capacitor to SS pin to program the output rise time
during startup.
SS
I
Trans-conductance (gm) Error Amplifier (EA) Inverting Input. It is used as the feedback input
to sense and regulate VOUT. Output voltage is set by a resistor divider from the output.
VSENSE
I
EA Output (internally connected to the PWM comparator input). Place the compensation
network between COMP and GND. The EA output current is injected into this network to
create the control voltage (VC). It will be compared with the compensated sensed current
signal to generate the switching pulses (set duty cycle).
6
COMP
O
7
8
GND
SW
G
P
Ground Pin.
Switching Node of the Converter (source of the internal MOSFET). Connect it to the cathode
of the external power diode (catch diode), the bootstrap capacitor and the inductor.
Exposed
Pad
Exposed Pad. It helps cooling the device junction and must be connected to GND pin for
proper operation.
GND
G
NOTE: I = input, O = output, P = power, G = ground.
SG Micro Corp
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SGM61232
28V, 3A, Buck DC/DC Converter
ELECTRICAL CHARACTERISTICS
(VIN = 4V to 28V, TJ = -40℃ to +125℃, typical values are measured at TJ = +25℃, unless otherwise noted.)
PARAMETER
Supply Voltage (VIN Pin)
Operating Input Voltage
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
VUVLO
ISHDN
IQ
4
28
3.7
2.5
180
V
V
Internal UVLO Threshold
Shutdown Supply Current
Operating Supply Current (Non-switching)
Enable and UVLO (EN Pin)
Enable Threshold
Rising and falling
EN = 0V, VIN = 12V
1.2
μA
μA
VSENSE = 1V, VIN = 12V
120
VEN_th Rising and falling
1.25
-0.8
-3.7
1.35
V
Enable threshold - 50mV
μA
μA
Input Current
IEN
Enable threshold + 50mV
Voltage Reference
Voltage Reference
High-side MOSFET
VREF
0.778
0.800
0.832
V
BOOT-SW = 3V, VIN = 4V
BOOT-SW = 5V, VIN = 12V
85
77
150
140
mΩ
mΩ
On-Resistance
RDSON
Error Amplifier
Error Amplifier Transconductance
Error Amplifier DC Gain
gm
Vggm
GBW
Igm
-2μA < ICOMP < 2μA, VCOMP = 1V
VSENSE = 0.8V
131
1995
2.7
μA/V
V/V
MHz
μA
Error Amplifier Unity Gain Bandwidth
Error Amplifier Source/Sink Current
5pF capacitance from COMP to GND pins
VCOMP = 1V, 100mV input overdrive
±7
Switch Current to COMP Transconductance GMCOMP VIN = 12V
12
A/V
Power-Save Mode
Power-Save Mode Switch Current Threshold
Current Limit
IL_th
340
5.5
mA
A
Current Limit Threshold
Thermal Shutdown
ILIMIT
VIN = 12V, TJ = +25℃
4.6
Thermal Shutdown
TSHDN
165
℃
Soft-Start (SS Pin)
SS Charge Current
ISS
VSS = 0.4V
VSS = 0.4V
2
μA
SS to VSENSE Matching (Difference)
Switching Frequency
10
mV
Switching Frequency
fSW
tON
D
VIN = 12V, TJ = +25℃
400
540
105
96
700
kHz
ns
Minimum Controllable On-Time
Maximum Controllable Duty Cycle
VIN = 12V
%
SG Micro Corp
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SGM61232
28V, 3A, Buck DC/DC Converter
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = +25℃, VIN = 12V and VOUT = 3.3V, unless otherwise noted.
Output Voltage Ripple
Output Voltage Ripple
AC Coupled
AC Coupled
VOUT
VOUT
VIN
VIN
VSW
VSW
VIN = 12V, VOUT = 3.3V, IOUT = 0A
IL
IL
VIN = 12V, VOUT = 3.3V, IOUT = 3A
Time (2ms/div)
Time (2μs/div)
Startup through VIN
Startup through VIN
VIN = 12V, VOUT = 3.3V, IOUT = 0A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VOUT
VOUT
VIN
VIN
VSW
VSW
IL
IL
Time (2ms/div)
Time (2ms/div)
Shutdown through VIN
Shutdown through VIN
VOUT
VIN
VOUT
VIN
VSW
VSW
IL
VIN = 12V, VOUT = 3.3V, IOUT = 0A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
IL
Time (40ms/div)
Time (10ms/div)
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SGM61232
28V, 3A, Buck DC/DC Converter
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TJ = +25℃, VIN = 12V and VOUT = 3.3V, unless otherwise noted.
Startup through EN
Startup through EN
VIN = 12V, VOUT = 3.3V, IOUT = 0A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VOUT
VOUT
VEN
VSW
VEN
VSW
IL
IL
Time (2ms/div)
Time (2ms/div)
Shutdown through EN
Shutdown through EN
VOUT
VOUT
VEN
VEN
VSW
VSW
VIN = 12V, VOUT = 3.3V, IOUT = 3A
IL
VIN = 12V, VOUT = 3.3V, IOUT = 0A
IL
Time (400ms/div)
Pre-biased Startup
Time (40μs/div)
Load Transient Response
VOUT
AC Coupled
VOUT
VEN
VSW
IL
IL
VIN = 12V, VOUT = 3.3V, IOUT = 0A
VIN = 12V, VOUT = 3.3V, IOUT = 300mA to 3A, SR = 2.5A/μs
Time (2ms/div)
Time (100μs/div)
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JANUARY 2022
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SGM61232
28V, 3A, Buck DC/DC Converter
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TJ = +25℃, VIN = 12V and VOUT = 3.3V, unless otherwise noted.
Short-Circuit Entry
Short-Circuit Recovery
VOUT
VOUT
VIN
VIN
VSW
VSW
IL
IL
VIN = 12V, VOUT = 3.3V, IOUT = 3A
VIN = 12V, VOUT = 3.3V, IOUT = 3A
Time (20μs/div)
Time (20ms/div)
Efficiency vs. Load Current
Load Regulation
100
90
80
70
60
50
40
30
20
10
0
1.0
0.5
0.0
-0.5
-1.0
VIN = 5V
IN = 12V
VIN = 28V
VIN = 5V
IN = 12V
VIN = 28V
V
V
VOUT = 3.3V
VOUT = 3.3V
0.001 0.01
0.1
1
10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Current (A)
Output Current (A)
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SGM61232
28V, 3A, Buck DC/DC Converter
FUNCTIONAL BLOCK DIAGRAM
0.8μA
3.7μA
Thermal
Shutdown
EN
+
-
VIN
UVLO, Bias &
Shutdown Logic
1.25V
Shutdown
Boot
UVLO
BOOT
gm = 131μA/V
DC Gain = 1995V/V
BW = 2.7MHz
PSM Mode
-
VSENSE
-
0.8V
+
+
R
S
Q
PWM
+
2μA
Control
SW
Oscillator
& Slope
SS
+
Shutdown
+
10kΩ
Discharge
Logic
GND
Frequency
Fold-back
VSENSE
12A/V Current
Sense
COMP
Figure 2. SGM61232 Block Diagram
SG Micro Corp
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JANUARY 2022
8
SGM61232
28V, 3A, Buck DC/DC Converter
DETAILED DESCRIPTION
Overview
Enable Input and UVLO Adjustment
The SGM61232 is a 28V Buck converter with integrated
N-MOSFET power switch and 3A continuous output
current capability. Using peak current mode control and
operating at fixed PWM frequency, this device provides
good line and load transient responses with reduced
output capacitance and simple compensation.
An internal current source pull-up keeps the EN pin
voltage at high state by default. The device will disable
if the EN voltage is externally pulled low. It will also
disable if VIN pin voltage falls below its under-voltage
lockout threshold. If VIN minimum range is less than
VOUT + 2V, an external VIN UVLO adjustment (resistor
divider in Figure 3) is recommended to increase the
VIN turn-on threshold and add hysteresis to UVLO
comparator. Figure 3 shows how UVLO and hysteresis
are increased using REN1 and REN2. A 3.7μA additional
current is injected to the divider when EN voltage
exceeds VEN = 1.25V to provide hysteresis. Use
Equations 1 and 2 to calculate these resistors. VSTART is
the input start (turn-on) threshold voltage and VSTOP is
the input stop (turn-off) threshold voltage. The selected
The minimum operating input voltage of the device is
4V and its nominal frequency is 540kHz. The output
voltage can be set down to 0.8V (reference voltage).
Typical no-load operating current is 120μA. It reduces
to 1.2μA if the device is disabled. The low RDSON
high-side switch (77mΩ) allows high operating
efficiency.
The EN pin is internally pulled up by a current source
that can keep the device enable if EN is floating. It can
also be used to increase the input UVLO threshold
using a resistor divider.
VSTOP threshold must be higher than 4V.
VSTART − VSTOP
(1)
(2)
REN1
=
3.7μA
The bootstrap diode is integrated and only a small
capacitor between BOOT and SW pins (CBOOT) is
needed for the MOSFET gate driving bias. A separate
UVLO circuit monitors CBOOT voltage and turns the
switch off if this voltage falls below a preset threshold.
VEN
VSTART − VEN
REN2
=
+ 0.8μA
REN1
The SS pin internal current source allows soft-start time
adjustments with a small external capacitor. This
feature provides more flexibility in output filter design.
VIN
EN
REN1
0.8μA
3.7μA
Light load efficiency is enhanced by a special
pulse-skip mode that is activated when the peak
inductor current falls below 340mA (TYP).
+
-
REN2
1.25V
During startup and over-current, the frequency is
reduced (frequency fold-back) to allow easy
maintenance of low inductor current. The thermal
shutdown provides an additional protection in fault
conditions.
Figure 3. VIN UVLO Adjustment
Bootstrap Gate Driving (BOOT)
Minimum Input Voltage (4V) and UVLO
The recommended minimum operating input voltage is
4V, however, the actual UVLO threshold can be less
than this value and the device may operate at voltages
below 4V. The UVLO threshold is not specified. If VIN
falls below UVLO voltage, the device will stop switching.
If the EN pin is left floating or pulled high and VIN
exceeds the UVLO threshold, the device will start up
with a soft-start.
An internal regulator provides the bias voltage for gate
driver using a 0.1μF ceramic capacitor. A ceramic
capacitor with X5R or better grade dielectric is
recommended. The capacitor must have a 10V or
higher voltage rating. The BOOT capacitor is refreshed
when the high-side MOSFET is off and the external
low-side diode conducts.
SG Micro Corp
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JANUARY 2022
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SGM61232
28V, 3A, Buck DC/DC Converter
DETAILED DESCRIPTION (continued)
current is continuously compared with the current limit
threshold and when the HS current reaches to that
threshold, the HS switch is turned off.
SS Pin and Soft-Start Adjustment
It is recommended to add a soft-start capacitor (CSS)
between SS pin and GND to set the soft-start time from
1ms to 10ms for a proper startup. The lower of the SS
pin voltage VSS and VREF is applied to the error amplifier
to regulate the output. The internal ISS = 2μA current
charges CSS and provides a linear voltage ramp on the
SS pin. Use Equation 3 to calculate the soft-start time
(10% to 90% rise). It is recommended that CSS be less
than 27nF.
The natural OCP of the peak current mode control may
not be able to provide a complete protection when an
output short-circuit occurs and an extra protection
mechanism for short-circuit is needed. During an output
short, inductor current may runaway above over-
current limits. Current runaway can saturate the
inductor and the current may even increase higher until
the device is damaged. This is because the inductor
current cannot be reset (volt-second balance) during
the off-time. During the output short, only a small
negative diode forward voltage appears across the
inductor during the off-time. Note that the minimum
on-time is limited, and in each cycle, all input voltage
appears on the inductor during the minimum on-time.
The circuit delays and reaction time makes these
conditions even worse, and in each cycle, the current is
increased to a new higher level. In the SGM61232, this
problem is effectively solved by increasing the off-time
during short-circuit by reducing the switching frequency
(frequency fold-back). As the output voltage drops and
VSENSE voltage falls from 0.8V to 0V, the frequency
will be divided by 1, 2, 4, and 8 depending on the drop
as shown in Table 1.
CSS (nF)× VREF (V)
(3)
tSS (ms) =
ISS (μA)
Error Amplifier (EA)
This device uses a trans-conductance amplifier to
compare the sensed output voltage (VSENSE) and the
internal reference as error amplifier (EA). The gain of
EA amplifier in normal operation is 131μA/V. The output
current is injected into the frequency compensation
network (between COMP and GND pins) to produce
the control signal (VC) for the PWM comparator.
Slope Compensation
Without implementing some slope compensation, the
PWM pulse widths will be unstable and oscillatory at
duty cycles above 50%. To avoid sub-harmonic
oscillations in this device, an internal compensation
ramp is added to the measured switch current before
comparing it with the control signal by the PWM
comparator.
Table 1. Frequency Fold-Back with VOUT Drop
Switching Frequency
540kHz
VSENSE Pin Voltage
VSENSE ≥ 0.6V
Power-Save Mode
540kHz / 2
0.6V > VSENSE ≥ 0.4V
0.4V > VSENSE ≥ 0.2V
0.2V > VSENSE
To reduce light load loss and increase the efficiency,
pulse-skip mode (PSM) feature is included in the
SGM61232. When the peak inductor current is below
340mA (TYP), the COMP pin voltage (VC) will be lower
than 0.5V (TYP). The device will enter power-save
mode in such conditions. In this mode, VC is internally
clamped at 0.5V that inhibits the MOSFET switching.
The device can exit PSM if VC rises above the clamp
level and the peak inductor current exceeds 340mA.
Since the peak inductor current is the sensed
parameter for entering the PSM, the actual load current
(DC) threshold for PSM will depend on the output filter.
540kHz / 4
540kHz / 8
Over-Voltage Transient Protection
When an overload or an output fault condition is
removed, large overshoots may occur on the output.
The SGM61232 includes a protection circuit to reduce
such over-voltage transients. If VSENSE voltage
exceeds 109% of the VREF threshold, the MOSFET is
turned off. When it returns below 107% of the VREF, the
MOSFET is released again.
Thermal Shutdown (TSD)
Over-Current Protection and Frequency
Fold-back
Over-current protection (OCP) is naturally provided by
current mode control. In each cycle, the high-side (HS)
current sensing starts a short time (blanking time) after
the HS switch is turned on. The sensed HS switch
If the junction temperature (TJ) exceeds +165℃, the
TSD protection circuit will stop switching to protect the
device from overheating. The device will automatically
restart with a power up sequence when the die
temperature drops below +140℃.
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10
SGM61232
28V, 3A, Buck DC/DC Converter
APPLICATION INFORMATION
A typical application circuit for the SGM61232 as a Buck converter is shown in Figure 4. It is used for converting a
5.5V to 28V supply voltage to a lower voltage level supply voltage (3.3V) suitable for the system.
Typical Application
C4
R4
0.1μF
0Ω
VIN = 5.5V to 28V
VIN
EN
BOOT
SW
L
VOUT = 3.3V
R1
402kΩ
C2
4.7μF
C3
10nF
C1
4.7μF
6.8μH
IOUT = 3A (MAX)
R2
82.5kΩ
C8
47μF
C9
47μF
SGM61232
D
COMP
SS
R5
18kΩ
C6
2.2nF
VSENSE
C5
C7
22pF
10nF
R3
33kΩ
R6
5.76kΩ
GND
Figure 4. SGM61232 Typical Application Circuit
source. The VIN capacitor ripple current rating must
also be greater than the maximum input current ripple.
The input current ripple can be calculated using
Equation 4 and the maximum value occurs at 50% duty
cycle. Using the design example values, IOUT = 3A,
yields an RMS input ripple current of 1.5A.
Requirements
The design parameters given in Table 2 are used for
this design example.
Table 2. Design Parameters
Design Parameter
Input Voltage
Example Value
12V nominal, 5.5V to 28V
VOUT × V - V
(
)
= IOUT × D× 1-D
IN
OUT
(4)
Start Input Voltage (Rising VIN)
Stop Input Voltage (Falling VIN)
Input Ripple Voltage
7V
ICIN_RMS = IOUT
×
(
)
V × V
IN
IN
5.5V
360mV, 3% of VIN_NOM
3.3V
For this design, a ceramic capacitor with at least 50V
voltage rating is required to support the maximum input
voltage. So, two 4.7µF/50V capacitors in parallel are
selected for VIN to cover all DC bias, thermal and aging
deratings. The input capacitance determines the
regulator input voltage ripple. This ripple can be
calculated from Equation 5. In this example, the total
effective capacitance of the two 4.7µF/50V capacitors
is around 3.7µF at 12V input, and the input voltage
ripple is 300mV.
Output Voltage
Output Ripple Voltage
Output Current Rating
33mV, 1% of VOUT
3A
Transient Response 1.5A to 3A Load
Step
165mV, 5% of VOUT
540kHz
Operating Frequency
Input Capacitors Design
A high-quality ceramic capacitor (X5R or X7R or better
dielectric grade) must be used for input decoupling of
the SGM61232. At least 3μF of effective capacitance
(after deratings) is needed on the VIN input. In some
applications, additional bulk capacitance may also be
required for the VIN input, for example, when the
SGM61232 is more than 5cm away from the input
IOUT ×D× 1-D
(
)
+IOUT×ESRCIN
(5)
∆V =
IN
CIN × fSW
It recommended to place an additional small size 10nF
ceramic capacitor right beside VIN and GND pins
(anode of the diode) for high frequency filtering.
SG Micro Corp
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11
SGM61232
28V, 3A, Buck DC/DC Converter
APPLICATION INFORMATION (continued)
the inductor current can increase up to the switch
Inductor Design
current limit of the device. For this reason, the most
conservative approach is to specify an inductor with a
saturation current rating equal to or greater than the
switch current limit rather than the peak inductor
current.
Equation 6 is conventionally used to calculate the
output inductance of a Buck converter. Generally, a
smaller inductor is preferred to allow larger bandwidth
and smaller size. The ratio of inductor current ripple (∆IL)
to the maximum output current (IOUT) is represented as
KIND factor (∆IL/IOUT). The inductor ripple current is
bypassed and filtered by the output capacitor, and the
inductor DC current is passed to the output. Inductor
ripple is selected based on a few considerations. The
peak inductor current (IOUT + ∆IL/2) must have a safe
margin from the saturation current of the inductor in the
worst-case conditions especially if a hard-saturation
core type inductor (such as ferrite) is chosen. For peak
current mode converter, selecting an inductor with
saturation current above the switch current limit is
sufficient. The ripple current also affects the selection
of the output capacitor. COUT RMS current rating must
be higher than the inductor RMS ripple. Typically, a 20%
to 40% ripple is selected (KIND = 0.2 ~ 0.4). Choosing a
higher KIND value reduces the selected inductance, but
a too high KIND factor may result in insufficient slope
compensation.
External Diode (Catch Diode)
An external power diode between the SW and GND
pins is needed for the SGM61232 to complete the
converter. This diode must tolerate the application’s
absolute maximum ratings. The reverse blocking
voltage must be higher than VIN_MAX and its peak
current must be above the maximum inductor current.
Choose a diode with small forward voltage drop for
higher efficiency. Typically, diodes with higher voltage
and current ratings have higher forward voltages. A
diode with a minimum of 30V reverse voltage is
preferred to allow input voltage transients up to the
rated voltage of the SGM61232.
Output Capacitor Design
Three primary criteria must be considered for design of
the output capacitor (COUT): (1) the converter pole
location, (2) the output voltage ripple, (3) the transient
response to a large change in load current. The
selected value must satisfy all of them. The desired
transient response is usually expressed as maximum
overshoot, maximum undershoot, or maximum
recovery time of VOUT in response to a large load step.
Transient response is usually the more stringent criteria
in low output voltage applications. The output capacitor
must provide the increased load current or absorb the
excess inductor current (when the load current steps
down) until the control loop can re-adjust the current of
the inductor to the new load level. Typically, it requires
two or more cycles for the loop to detect the output
change and respond (change the duty cycle). Another
requirement may also be expressed as desired hold-up
time in which the output capacitor must hold the output
voltage above a certain level for a specified period if the
input power is removed. It may also be expressed as
the maximum output voltage drop or rise when the full
load is connected or disconnected (100% load step).
Equation 10 can be used to calculate the minimum
output capacitance that is needed to supply a current
step (ΔIOUT) for at least 2 cycles until the control loop
responds to the load change with a maximum allowed
output transient of ΔVOUT (overshoot or undershoot).
V
− VOUT
VOUT
VIN_MAX × fSW
IN_MAX
(6)
L =
×
IOUT ×KIND
KIND = 0.3 is a suitable choice when low-ESR ceramic
capacitors are used for output capacitors. KIND = 0.2 is
preferred when a high-ESR output capacitor is used. In
this example, the calculated inductance will be 6μH
with KIND = 0.3, so the nearest larger inductance of
6.8μH is selected. The ripple, RMS and peak inductors
current calculations are summarized in Equations 7, 8
and 9 respectively.
V
− VOUT
VOUT
VIN_MAX × fSW
IN_MAX
(7)
∆IL =
×
L
∆IL2
12
IL_RMS
= +
IO2 UT
(8)
(9)
∆IL
2
IL_PEAK = IOUT
+
The current flowing through the inductor is the inductor
ripple current plus the output current. During power-up,
faults or transient load conditions, the inductor current
can increase above the calculated peak inductor
current level calculated above. In transient conditions,
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SGM61232
28V, 3A, Buck DC/DC Converter
APPLICATION INFORMATION (continued)
2× ΔIOUT
fSW × ΔVOUT
output capacitance value, use Equation 13 to calculate
the maximum acceptable ESR of the output capacitor
to meet the output voltage ripple requirement.
(10)
COUT
>
where:
• ΔIOUT is the change in output current.
VOUT _RIPPLE
1
(13)
ESRCOUT
<
−
ΔIL
8× fSW ×COUT
• ΔVOUT is the allowable change in the output voltage.
Higher nominal capacitance value must be chosen due
to aging, temperature, and DC bias derating of the
output capacitors. In this example, two 47μF/10V X5R
ceramic capacitors with 3mΩ of ESR are used. There is
a limit to the amount of ripple current that a capacitor
can handle without damaging or overheating. The
inductor ripple is bypassed through the output capacitor.
Equation 14 calculates the RMS current that the output
capacitor must support. In this example, it is 229mA.
For example, if the acceptable transient from 1.5A to
3A load step is 5%, by inserting ΔVOUT = 0.05 × 3.3V =
0.165V and ΔIOUT = 1.5A, the minimum required
capacitance will be 33.7μF. Note that the impact of
output capacitor ESR on the transient is not taken into
account in Equation 10. For ceramic capacitors, the
ESR is generally small enough to ignore its impact on
the calculation of ΔVOUT transient.
The output capacitor must also be sized to absorb
energy stored in the inductor when transitioning from a
high to low load current. The energy stored in the
inductor can produce an output voltage overshoot when
the load current decreases rapidly. The excess energy
absorbed in the output capacitor increases the voltage
on the capacitor. The capacitor must be sized to
maintain the desired output voltage during these
transient periods. Equation 11 calculates the minimum
capacitance required to keep the output-voltage
overshoot to a desired value.
VOUT × V
− VOUT
(
)
IN_MAX
(14)
ICOUT _RMS
=
12 × VIN_MAX ×L× fSW
Bootstrap Capacitor Selection
Use a 0.1μF high-quality ceramic capacitor (X7R or
X5R) with 10V or higher voltage rating for the bootstrap
capacitor (C4). It is recommended to add a resistor R4
in series with C4 to slow down switch-on speed of the
HS switch and improve radiated EMI problems. The R4
value depends on the size of the HS switch. For most
applications, it’s approximately 5Ω ~ 10Ω. Too high
values for R4 may cause insufficient C4 charging in high
duty-cycle applications. Slower switch-on will also
increase switch losses and reduce efficiency.
I2
−IO2 UT _L
(11)
OUT _H
COUT > L×
2
V
+ ΔVOUT − V2
(
)
OUT
OUT
where:
UVLO Setting
• IOUT_H is the output current under heavy load.
The under-voltage lockout (UVLO) can be programmed
using an external voltage divider on the EN pin of the
SGM61232. In this design R1 is connected between
VIN and the EN pin and R2 is connected between EN
and GND (see Figure 4). The UVLO has two thresholds,
one for power-up (turn-on) when the input voltage is
rising, and one for power-down or brownout (turn-off)
when the voltage is falling. In this design, the turn-on
(enable to start switching) occurs when VIN rises above
7V (UVLO rising threshold). When the regulator is
working, it will not stop switching (disabled) until the
input falls below 5.5V (UVLO falling threshold).
Equations 1 and 2 are provided to calculate the
resistors. For this example, the nearest standard
resistor values are R1 = 402kΩ and R2 = 82.5kΩ.
• IOUT_L is the output current under light load.
For example, if the acceptable transient from 3A to
1.5A load step is 5%, by inserting ΔVOUT = 0.05 × 3.3V
= 0.165V, the minimum required capacitance will be
41.1μF.
Equation 12 can be used for the output ripple criteria
and finding the minimum output capacitance needed.
VOUT_RIPPLE is the maximum acceptable ripple. In this
example, the allowed ripple is 33mV that results in
minimum capacitance of 6.1μF.
ΔIL
(12)
COUT
>
8× fSW × VOUT _RIPPLE
Note that the impact of output capacitor ESR on the
ripple is not considered in Equation 12. For a specific
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SGM61232
28V, 3A, Buck DC/DC Converter
APPLICATION INFORMATION (continued)
Equations 19 and 20 can be used to find an estimation
Soft-Start Capacitor Selection
for closed-loop crossover frequency (fCO) as a starting
point (choose the lower value).
The soft-start capacitor programs the ramp-up time of
the output voltage during power-up. Due to the limited
voltage slew rate required by the load or limited
available input current, a ramp is needed in many
applications to avoid input voltage sag during startup
(UVLO) or to avoid over-current protection that can
occur during output capacitor charging. Soft-start will
solve all these issues by limiting the output voltage slew
rate.
IOUT
(17)
fP =
2π× VOUT ×COUT
1
(18)
fZ =
2π×ESRCOUT ×COUT
(19)
(20)
fCO
fCO
=
=
fP × fZ
fSW
Equation 3 (with ISS = 2μA and VREF = 0.8V) can be
used to calculate the soft-start capacitor for a required
soft-start time (tSS). In this example, the output
capacitor value is relatively small (2 × 47μF) and the
soft-start time is not critical because it does not require
too much charge for 3.3V output voltage. However, it is
better to set a small arbitrary value, like CSS = 10nF that
results in 4ms startup time.
fP ×
2
For this design, fP = 3.04kHz and fZ = 1.11MHz.
Equation 19 yields 58.21kHz for crossover frequency
and Equation 20 gives 28.65kHz. The lower value
28.65kHz will be chosen as the intended crossover
frequency. Having the crossover frequency, the
compensation network (R3 and C6) can be calculated.
R3 sets the gain of the compensated network at the
crossover frequency and can be calculated by Equation
21.
Feedback Resistors Setting
Use resistor dividers (R5 and R6) to set the output
voltage using Equations 15 and 16.
2π× fCO × VOUT ×COUT
gm × VREF ×GMCOMP
(21)
R3 =
R5 × VREF
(15)
VOUT − VREF
R6 =
C6 sets the location of the compensation zero along
with R3. To place this zero on the converter pole, use
Equation 22.
R5
R6
(16)
VOUT = VREF
×
+1
VOUT ×COUT
IOUT ×R3
Recommended to choose R5 around 10kΩ and
calculate R6 from Equation 15. Use accurate and stable
resistors (1% or better) to enhance output accuracy.
For this example, the selected values are R5 = 18kΩ
and R6 = 5.76kΩ, resulting in a 3.3V output voltage.
(22)
C6 =
From Equations 21 and 22, the standard selected
values are R3 = 33kΩ and C6 = 2.2nF.
A compensation pole can be implemented if desired by
adding capacitor C7 in parallel with the series
combination of R3 and C6. Use the larger value
calculated from Equation 23 and Equation 24 for C7 to
set the compensation pole. The selected value of C7 is
22pF.
Compensation Network Setting
Several techniques are used by engineers to
compensate a DC/DC regulator. The method presented
here uses simple calculations and generally results in
high phase margins. In most conditions, the phase
margin will be between 60 and 90 degrees. In this
method the effects of the slope compensation are
ignored. Because of this approximation, the actual
cross over frequency is usually lower than the
calculated value.
ESRCOUT ×COUT
(23)
C7 =
R3
1
(24)
C7 =
π× fSW ×R3
First, the converter pole (fP) and ESR-zero (fZ) are
calculated from Equations 17 and 18. For COUT, the
worst derated value of 47.6μF should be used.
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SGM61232
28V, 3A, Buck DC/DC Converter
APPLICATION INFORMATION (continued)
Layout Considerations
A PCB layout example is provided in Figure 5 and Figure 6. This layout has been proved to bring good results
although other layout designs may also obtain good performance.
• Bypass the VIN pin to GND pin (where it connects to the anode pin of the power diode) with low-ESR ceramic
capacitors (10μF/X5R or better) and place them as close as possible to the device.
• Connect the diode as close as possible to SW and GND pins.
• Share the same GND connection point with the input and output capacitors.
• Connect the device GND to the PCB ground plane right at the GND pin.
• Minimize the length and the area of the connection route from SW pin to the cathode of the diode and the inductor
to reduce the noise coupling from this area.
• Consider sufficient ground plane area on the top side for proper heat dissipation. Because the SGM61232 has a
fused lead frame, the GND pin acts as a heat conduction path from the die to the PCB for better cooling. Connect
the large internal or back-side ground planes to the top-side ground near the device with thermal vias for better heat
dissipation.
GND
GND
5:VSENSE
6:COMP
7:GND
8:SW
4:SS
3:EN
GND
GND
2:VIN
SW
BOOT
1:BOOT
V
IN
VOUT
GND
Figure 5. Top Layer
Figure 6. Bottom Layer
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SGM61232
28V, 3A, Buck DC/DC Converter
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
JANUARY 2023 ‒ REV.A.2 to REV.A.3
Page
Updated Absolute Maximum Ratings........................................................................................................................................................................2
Updated Electrical Characteristics section................................................................................................................................................................4
Updated Block Diagram ............................................................................................................................................................................................8
Updated Detailed Description .................................................................................................................................................................................10
NOVEMBER 2022 ‒ REV.A.1 to REV.A.2
Page
Updated Electrical Characteristics section................................................................................................................................................................4
JULY 2022 ‒ REV.A to REV.A.1
Page
Added thermal information ........................................................................................................................................................................................2
Changes from Original (JANUARY 2022) to REV.A
Page
Changed from product preview to production data .................................................................................................................................................All
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PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOIC-8 (Exposed Pad)
D
e
3.22
E1
E
E2
2.33 5.56
1.91
b
D1
1.27
0.61
RECOMMENDED LAND PATTERN (Unit: mm)
L
A
A1
c
θ
A2
Dimensions
In Millimeters
Symbol
MIN
MOD
MAX
1.700
0.150
1.650
0.510
0.250
5.100
3.420
4.000
6.200
2.530
A
A1
A2
b
0.000
1.250
0.330
0.170
4.700
3.020
3.800
5.800
2.130
-
-
-
c
-
D
-
D1
E
-
-
E1
E2
e
-
-
1.27 BSC
L
0.400
0°
-
-
1.270
8°
θ
NOTES:
1. Body dimensions do not include mode flash or protrusion.
2. This drawing is subject to change without notice.
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PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
SOIC-8
(Exposed Pad)
13″
12.4
6.40
5.40
2.10
4.0
8.0
2.0
12.0
Q1
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PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
13″
386
280
370
5
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