SC657 [SEMTECH]
Backlight Driver for 5 LEDs with SemPulseTM Interface; 背光驱动器的5个LED与SemPulseTM接口
| 型号： | SC657 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Backlight Driver for 5 LEDs with SemPulseTM Interface |
| 文件： | 总22页 (文件大小：463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC657
Backlight Driver for 5 LEDs
with SemPulseTM Interface
POWER MANAGEMENT
Features
Description
Input supply voltage range — 2.9V to 5.5V
Very high efficiency charge pump driver system with
three modes — ꢀx, ꢀ.5x and 2x
Five programmable current sinks — 0mA to 25mA
Up to three LED grouping options
Fade-in/fade-out feature for main LED bank
Charge pump frequency — 250kHz
SemPulse single wire interface
Backlight current accuracy — ꢀ.5% typical
Backlight current matching — 0.5% typical
LED float detection
The SC657 is a high efficiency charge pump LED driver
using Semtech’s proprietary charge pump technology.
Performance is optimized for use in single-cell Li-ion
battery applications.
The charge pump provides backlight current utilizing five
matched current sinks. The load and supply conditions
determine whether the charge pump operates in ꢀx, ꢀ.5x,
or 2x mode. An optional fading feature that gradually
adjusts the backlight current is provided to simplify
control software.
Automatic sleep mode (LEDs off) — IQ = 60µA (typ.)
Shutdown current — 0.ꢀµA (typical)
Ultra-thin package — 2 x 2 x 0.6 (mm)
Fully WEEE and RoHS compliant
The SC657 uses the proprietary SemPulseTM single wire
interface to control all functions of the device, including
backlight currents. The single wire interface minimizes
microcontroller and interface pin counts. The five LEDs
can be grouped in up to three separate banks that can be
independently controlled.
Applications
Cellular phones, smart phones, and PDAs
LCD modules
Portable media players
Digital cameras
Personal navigation devices
Display/keypad backlighting and LED indicators
The SC657 enters sleep mode when all the LED drivers are
disabled. In this mode, the quiescent current is reduced
while the device continues to monitor the SemPulse
interface.
With a 2 x 2 (mm) package and four small capacitors, the
SC657 provides a complete LED driver solution with a
minimal PCB footprint.
Typical Application Circuit
VBAT = 2.9 to 5.5V
IN
OUT
COUT
CIN
2.2µF
2.2µF
SC657
BL1
BL2
BL3
BL4
BL5
SemPulse
Interface
SPIF
GND
C1+ C1- C2+ C2-
C1
2.2µF
C2
2.2µF
US Patents: 6,504,422; 6,794,926
ꢀ
April 3, 2009
© 2009 Semtech Corporation
SC657
Pin Configuration
Ordering Information
Device
Package
SC657ULTRT(ꢀ)(2)
MLPQ-UT-ꢀ4 2×2
Evaluation Board
SC657EVB
Notes:
14
13
12
11
(ꢀ) Available in tape and reel only. A reel contains 3,000 devices.
(2) Lead-free package only. Device is WEEE and RoHS compliant.
TOP VIEW
10
9
BL3
BL4
BL5
C2+
C1+
C1-
1
2
3
8
7
4
5
6
MLPQ-UT-14; 2x2, 14 LEAD
θJA = 127°C/W
Marking Information
…AF
yw
AF = Marking code for SC657
yw = Date Code
2
SC657
Absolute Maximum Ratings
Recommended Operating Conditions
IN, OUT (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0
Cꢀ+, C2+ (V) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VOUT + 0.3)
Pin Voltage — All Other Pins (V) . . . . . . . . -0.3to(VIN+0.3)
OUT Short Circuit Duration . . . . . . . . . . . . . . . . Continuous
ESD Protection Level(ꢀ) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ambient Temperature Range (°C). . . . . . . . -40 ≤ TA ≤ +85
Input Voltage (V) . . . . . . . . . . . . . . . . . . . . . . . 2.9 ≤ VIN ≤ 5.5
Output Voltage (V) . . . . . . . . . . . . . . . . . . . . . 2.5 ≤ VOUT ≤ 5.25
Voltage Difference between any two LEDs (V). . ∆VF < ꢀ.0(2)
Thermal Information
Thermal Resistance, Junction to Ambient(3) (°C/W) . . ꢀ27
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . .+ꢀ50
Storage Temperature Range (°C) . . . . . . . . . . . -65 to +ꢀ50
Peak IR Reflow Temperature (ꢀ0s to 30s) (°C) . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(ꢀ) Tested according to JEDEC standard JESD22-Aꢀꢀ4
(2) ∆VF(max) = ꢀ.0V when VIN = 2.9V, higher VIN supports higher ∆VF(max)
(3) Calculated from package in still air, mounted to 3 x 4.5 (in), 4 layer FR4 PCB per JESD5ꢀ standards.
Electrical Characteristics
Unless otherwise noted, TA = +25°C for Typ, -40°C to +85°C for Min and Max, TJ(MAX) = ꢀ25°C, VIN = 3.7 V, CIN= Cꢀ= C2= COUT = 2.2µF (ESR = 0.03Ω)(ꢀ)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Shutdown Current
IQ(OFF)
0.ꢀ
2
µA
(2)
All outputs disabled, SPIF = VIN
60
ꢀ.6
4.8
5.9
ꢀ00
µA
mA
mA
Charge pump enabled, ꢀx Mode, all LEDs on,
IBLn = 0.5mA
Total Quiescent Current
IQ
Charge pump in ꢀx mode, 2.9V <VIN < 4.2V, all LEDs
on, IBLn = 25mA
Charge pump in ꢀ.5x, 2x mode, 2.9V <VIN < 4.2V, all
LEDs on, IBLn = 25mA
VIN > 2.9V, sum of all active LED currents,
VOUT(MAX) = 4.2V
Maximum Total Output Current
IOUT(MAX)
ꢀ25
Backlight Current Setting
Backlight Current Matching
Backlight Current Accuracy
IBLn
IBL-BL
Nominal setting for BLꢀ thru BL5
IBLn = ꢀ2mA(3)
0
-3.5
-8
25
+3.5
+8
mA
%
0.5
ꢀ.5
IBL_ACC
IBLn = ꢀ2mA
%
3
SC657
Electrical Characteristics (continued)
Parameter
Symbol
VTRANSꢀx
VHYSTꢀx
Conditions
Min
Typ
3.25
250
Max
Units
ꢀx Mode to ꢀ.5x Mode
Falling Transition Input Voltage
IOUT = 50mA, IBLn = ꢀ0mA, VOUT = 3.2V
IOUT = 50mA, IBLn = ꢀ0mA, VOUT = 3.2V
IOUT = 50mA, IBLn = ꢀ0mA, VOUT = 4.0V(4)
V
mV
V
ꢀ.5x Mode to ꢀx Mode Hysteresis
ꢀ.5x Mode to 2x Mode
Falling Transition Input Voltage
VTRANSꢀ.5x
3.ꢀ3
Current Sink Off-State
Leakage Current
IBLn(off)
fPUMP
VIN = VBLn = 4.2V
0.ꢀ
ꢀ
µA
Charge Pump Frequency
VIN = 3.2V
OUT pin shorted to GND
VOUT > 2.5V
250
60
kHz
Output Short Circuit
Current Limit
IOUT(SC)
mA
300
2.7
VUVLO-OFF
VUVLO-HYS
Increasing VIN
V
Under Voltage Lockout
Over-Voltage Protection
Hysteresis
800
mV
OUT pin open circuit, VOUT = VOVP
,
VOVP
5.7
6.0
V
rising threshold
Over-Temperature
OT Hysteresis
TOT
Rising temperature
ꢀ60
20
°C
°C
TOT-HYS
4
SC657
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
SemPulse Interface
Input High Threshold
Input Low Threshold
Input High Current
Input Low Current
Start up Time(5)
VIH
VIL
IIH
VIN = 5.5V
ꢀ.6
V
VIN = 2.9V
VIN = 5.5V
0.4
+ꢀ
+ꢀ
V
-ꢀ
-ꢀ
µA
µA
ms
µs
µs
IIL
VIN = 5.5V
tSU
tHI
tLO
Only required when leaving shutdown mode
ꢀ
Bit Pulse Duration(6)
Duration Between Pulses(6)
0.75
0.75
250
250
Software limit — SPIF must be held high for this
amount of time to latch the data
Hold Time - Address(6)
Hold Time - Data(6)
Bus Reset Time (6)
tHOLDA
tHOLDD
tBR
550
550
ꢀ2
5000
µs
µs
Software limit — SPIF must be held high for this
amount of time to latch the address
Software Limit — SPIF must be held high for this
amount of time to force a bus system reset
ms
ms
Software Limit — SPIF must be held low for this
amount of time to disable device
Shutdown Time (7)
Notes:
tSD
ꢀ0
(ꢀ) Capacitors are MLCC of X5R type. Production tested with higher value capacitors than the application requires
(2) SPIF is high for more than ꢀ0ms to place serial bus in standby mode
(3) Current matching is defined as ꢁIBL(MAX) - IBL(MIN] / ꢁIBL(MAX) + IBL(MIN)].
(4) Test voltage is VOUT = 4.2V — a relatively extreme LED voltage — to force a transition during test. Typically VF = 3.2V for white LEDs.
(5) The SemPulse start-up time is the minimum time that the SPIF pin must be held high to enable the part before starting communication.
(6) The source driver used to provide the SemPulse Output must meet these limits.
(7) The SemPulse shutdown time is the minimum time that the SPIF pin must be pulled low to shut the part down.
5
SC657
Typical Characteristics
All data taken with TA = +25 °C, VIN = 3.7V, CIN = Cꢀ = C2 = COUT = 2.2µF (ESR = 0.03Ω) unless otherwise noted.
Backlight Efficiency (5 LEDs) — 25mA Each
CIN = COUT =4.7µF, VOUT = 3.62V
Backlight Matching (5 LEDs) — 25mA Each
CIN = COUT = 4.7µF
3
2
1
100
90
80
70
60
50
0
-1
-2
-3
4.2
3.6
3.3
3
3.9
2.7
4.2
3.6
3.3
3
2.7
3.9
VIN (V)
VIN (V)
Backlight Efficiency (5 LEDs) — 12mA Each
Backlight Matching (5 LEDs) — 12mA Each
VOUT = 3.45V
3
2
1
100
90
80
70
60
50
0
-1
-2
-3
4.2
3.9
3.6
3.3
3
2.7
3.6
3.3
3
4.2
3.9
2.7
VIN (V)
VIN (V)
Backlight Efficiency (5 LEDs) — 4.5mA Each
Backlight Matching (5 LEDs) — 4.5mA Each
VOUT = 3.27V
3
2
100
90
1
80
70
60
50
0
-1
-2
-3
4.2
3.6
3.3
3
2.7
3.9
4.2
3.9
3.6
3.3
3
2.7
VIN (V)
VIN(V)
6
SC657
Typical Characteristics (continued)
Output Short Circuit Current Limit
Backlight Accuracy (5 LEDs) — 12mA Each
8
6
4
VOUT (ꢀV/div)
2
0
ACC Max %
0
-2
ACC Min %
IOUT (50mA/div)
-4
0
-6
-8
1ms�div
2.7
4.2
3.3
3
3.9
3.6
VIN (V)
Ripple — 1.5x Mode
Ripple — 1x Mode
CIN = COUT = 4.7µF, VIN = 2.9V, 5 LEDs, — ꢀ5mA each
CIN = COUT = 4.7µF, 5 LEDs, — ꢀ5mA each
VIN (ꢀ00mV/div)
VIN (ꢀ00mV/div)
VOUT (ꢀ00mV/div)
IBL (ꢀ0mA/div)
VOUT (ꢀ00mV/div)
IBL (ꢀ0mA/div)
20µs�div
20µs�div
Ripple — 2x Mode
Output Open Circuit Protection
CIN = COUT = 4.7µF, VIN = 2.9V, 5 LEDs — ꢀ5mA each
VBL (500mV/div)
VIN (ꢀ00mV/div)
VOUT (ꢀ00mV/div)
IBL (ꢀ0mA/div)
VOUT (ꢀV/div)
IBL (ꢀ0mA/div)
0
20µs�div
20µs�div
7
SC657
Pin Descriptions
Pin #
Pin Name
Pin Function
ꢀ
BL3
Current sink output for main backlight LED 3 — leave this pin open if unused
2
3
4
BL4
BL5
NC
Current sink output for main backlight LED 4 — leave this pin open if unused
Current sink output for main backlight LED 5 — leave this pin open if unused
No connection
SemPulse single wire interface pin — used to enable/disable the device and to configure all regis-
ters (refer to Register Map and SemPulse Interface sections)
5
SPIF
6
7
GND
C2-
Ground pin
Negative connection to bucket capacitor 2
Negative connection to bucket capacitor ꢀ
Positive connection to bucket capacitor ꢀ
Positive connection to bucket capacitor 2
Charge pump output — all LED anode pins should be connected to this pin
Battery voltage input
8
Cꢀ-
9
Cꢀ+
C2+
OUT
IN
ꢀ0
ꢀꢀ
ꢀ2
ꢀ3
BLꢀ
Current sink output for main backlight LED ꢀ — leave this pin open if unused
ꢀ4
BL2
Current sink output for main backlight LED 2 — leave this pin open if unused
8
SC657
Block Diagram
C1+
9
C1-
8
C2+
10
C2-
7
Fractional Charge Pump
(1x, 1.5x, 2x)
IN 12
11
OUT
SemPulse
Digital
Interface
and Logic
Control
Oscillator
13
14
1
BL1
BL2
BL3
BL4
BL5
NC
5
SPIF
Current
Setting
DAC
2
GND
6
3
4
9
SC657
Applications Information
minimize noise and support the output current require-
ments of up to 90mA. For output currents higher than
90mA, a nominal value of 4.7µF is recommended for COUT
and CIN. Capacitors with X7R or X5R ceramic dielectric are
strongly recommended for their low ESR and superior
temperature and voltage characteristics. Y5V capacitors
should not be used as their temperature coefficients make
them unsuitable for this application.
General Description
This design is optimized for handheld applications sup-
plied from a single Li-ion cell and includes the following
key features:
• A high efficiency fractional charge pump that
supplies power to all LEDs
• Five matched current sinks that control LED
backlighting current, providing 0mA to 25mA
per LED
It is important to ensure the minimum capacitance value
of each capacitor does not drop below ꢀµF. This may
require the use of 2.2µF capacitors to be sure that the
degradation of capacitance due to DC voltage does not
cause the capacitance to go below ꢀµF.
• LEDs can be grouped in up to three indepen-
dently controlled banks
High Current Fractional Charge Pump
The backlight outputs are supported by a high efficiency,
high current fractional charge pump output. The charge
pump multiplies the input voltage by ꢀx, ꢀ.5x, or 2x. The
charge pump switches at a fixed frequency of 250kHz in
ꢀ.5x and 2x modes and is disabled in ꢀx mode to save
power and improve efficiency.
LED Backlight Current Sinks
The backlight current is set via the SemPulse interface. The
current is regulated to a value between 0mA and 25mA.
The step size varies depending upon the current setting.
Between 0mA and 5mA, the step size is 0.5mA. The step
size increases to ꢀmA for settings between 5mA and
2ꢀmA. Steps are 2mA between 2ꢀmA and 25mA. The varia-
tion in step size allows finer adjustment for dimming func-
tions in the low current setting range and coarse
adjustment at higher current settings where small current
changes are not visibly noticeable in LED brightness. A
zero setting is also included to allow the current sink to be
disabled by writing to either the enable bit or the current
setting register for maximum flexibility.
The mode selection circuit automatically selects the mode
as ꢀx, ꢀ.5x, or 2x based on circuit conditions such as LED
voltage, input voltage, and load current. The ꢀx mode is
the most efficient of the three modes, followed by ꢀ.5x
and 2x modes. Circuit conditions such as low input voltage,
high output current, or high LED voltage place a higher
demand on the charge pump output. A higher numerical
mode (ꢀ.5x or 2x) may be needed momentarily to main-
tain regulation at the OUT pin during intervals of high
demand. The charge pump responds to momentary high
demands, setting the charge pump to the optimum mode
to deliver the output voltage and load current while opti-
mizing efficiency. Hysteresis is provided to prevent mode
toggling.
All backlight current sinks have matched currents, even
when there is a variation in the forward voltages (∆VF ) of
the LEDs. A ∆VF difference of ꢀ.0V is supported when the
input voltage is at 2.9V. Higher ∆VF LED mis-match is sup-
ported when VIN is higher than 2.9V. All current sink
outputs are compared and the lowest output is used for
setting the voltage regulation at the OUT pin. This is done
to ensure that sufficient bias exists for all LEDs.
The charge pump requires two bucket capacitors for
proper operation. One capacitor must be connected
between the Cꢀ+ and Cꢀ- pins and the other must be con-
nected between the C2+ and C2- pins as shown in the
Typical Application Circuit diagram. These capacitors
should be equal in value, with a minimum capacitance of
ꢀµF to support the charge pump current requirements.
The device also requires at least ꢀµF of capacitance on the
IN pin and at least ꢀµF of capacitance on the OUT pin to
The backlight LEDs default to the off state upon power-up.
For backlight applications using less than five LEDs, any
unused output must be left open and the unused LED
must remain disabled. When writing to the backlight
enable register, a zero (0) must be written to the corre-
sponding bit of any unused output.
ꢀ0
SC657
Applications Information (continued)
ongoing fade operation, the fade will be redirected to the
new value from the present state. An ongoing fade opera-
tion may be cancelled by disabling fade which will result
in the backlight current changing immediately to the final
value. If fade is disabled, the current level will change
immediately without the fade delay.
Backlight Quiescent Current
The quiescent current required to operate all backlights is
reduced when the backlight current is set to 4.0mA or less.
This feature results in higher efficiency under light-load
conditions. Further reduction in quiescent current will
result from using fewer than the maximum number of
LEDs.
The state diagram in Figure ꢀ describes the fade opera-
tion. More details can be found in the Register Map
section.
LED Banks
The LEDs can be grouped in up to three independently
controlled LED banks. Using the SemPulse interface, the
five LED drivers can be grouped as described in the
Backlight Grouping Configuration subsection. The banks
can be used to provide up to three different current
options. This can be useful for controlling keypad, display,
and auxiliary backlight operation from one SC657 device.
Immediate
change to new
bright level
No change
FADE=0
Write FADE=0
Write new
bright level
FADE=0
Write
FADE=1
The LED banks provide versatility by allowing backlights
to be controlled independently. For example, applications
that have a main and sub display may also need to supply
an indicator LED. The three bank option allows the SC657
to control each function with different current settings.
Another application involves backlighting two displays
and a keypad, each requiring different brightness settings.
A third scenario requires supplying different brightness
levels to different types of LEDs (such as RGB) to create
display effects. In all applications, the brightness level for
each LED can be set independently.
Immediate
change to
new bright
level
Write
FADE=0
FADE=1
No
change
FADE=1
Write
FADE=1
Write new
bright
level
Fade=0
Fade
begins
Fade
ends
Fade is redirected
toward the new value
from current state
Fade
processing(1)
No
change
Write new
bright level
Backlight Fade-in / Fade-out Function
Write
Fade=1
The SC657 contains bits that control the fade state of the
main bank. When enabled, the fade function causes the
backlight settings to step from their current state to the
next programmed state as soon as the new state is stored
in its register. For example, if the backlight is set at 25mA
and the next setting is the off state, the backlight will step
from 25mA down to 0mA using all settings at the fade rate
specified by the bits in register 04h. The same is true when
turning on or increasing the backlight current — the
backlight current will step from the present level to the
new level at the step rate defined in register 04h. This
process applies to the main display only.
Write
new fade
rate
Continue
fade using
new rate
Note:
(1) When the data in backlight
enable register 00h is not 00h
Figure 1 — State Diagram for Fade Function
Fade-In from Off State
When the initial state of the main backlight current regis-
ter is 00h (the data value for 0mA), fading to an on state is
accomplished by following the steps listed in Table ꢀ.
Following these steps explicitly will ensure that the fade-
in operation will proceed with no interruption at the rate
specified in the Main Fade register (04h). This procedure
must be followed regardless of which backlight grouping
The fade rate may be changed dynamically when a fade
operation is active by writing new values to the fade reg-
ister. When a new backlight level is written during an
ꢀꢀ
SC657
Applications Information (continued)
configuration is being used. Note that it is only necessary
to set the BLEN bits for the main display.
Table 3 — Fading between Different On States
Command
Sequence
Action
Data
Table 1 — Fade-In from Off State
ꢀ. Enable fade
Write to register 04h
Write to register 0ꢀh
0ꢀh, 02h, or 03h
Command
Sequence
Action
Data
00h
2. Set new value of
backlight current
Any value from 05h
through ꢀFh
ꢀ. Disable fade
Write to register 04h
Write to register 0ꢀh
Write to register 04h
Write to register 00h
2. Set Main back-
lights to 0.5mA
Additional Information
04h
For more details about the Fade-in/Fade-out function,
refer to the SC657 Backlight Driver Software User’s Guide
and SemPulse Interface Specification document and to the
associated software drivers available for this device
(contact your sales office for more details).
3. Enable fade
4. Set BLEN bits
0ꢀh, 02h, or 03h
Any value from 0ꢀh
through 3Fh
5. Set new value of
backlight current
Any value from 05h
through ꢀFh
Write to register 0ꢀh
Shutdown Mode
The device is disabled when the SPIF pin is held low for
the shutdown time specified in the electrical characteris-
tics section. All registers are reset to default condition at
shutdown.
Fade-Out from any On State to Off State
Fading the backlight LEDs from any active state to the off
state follows a simple procedure. The sequence of com-
mands for this action is shown in Table 2. Following these
steps explicitly will ensure that the fade-out operation will
proceed with no interruption at the rate specified in the
Main Fade register (04h). This procedure must be followed
regardless of the backlight grouping configuration.
Sleep Mode
When all LEDs are disabled, sleep mode is activated. This
is a reduced current mode that helps minimize overall
current consumption by disabling the clock and the
charge pump while continuing to monitor the serial inter-
face for commands. An additional current savings can be
obtained by putting the serial interface in standby mode
(see SemPulse Interface, Standby Mode).
Table 2 — Fade-Out from any On State to Off State
Command
Sequence
Action
Data
0ꢀh, 02h, or 03h
00h
ꢀ. Enable fade
Write to register 04h
Write to register 0ꢀh
Protection Features
2. Set Main back-
lights to 0mA
The SC657 provides several protection features to safe-
guard the device from catastrophic failures. These features
include:
Fading Between Different On States
• Output Open Circuit Protection
• Over-Temperature Protection
• Charge Pump Output Current Limit
• LED Float Detection
Fading from one backlight level to another (up or down)
also follows a simple procedure. The sequence of com-
mands for this action is shown in Table 3. Following these
steps explicitly will ensure that the fade-in/fade-out oper-
ation will proceed with no interruption at the rate specified
in the Main Fade register (04h). This procedure must be
followed regardless of the backlight grouping
configuration.
Output Open Circuit Protection
Over-Voltage Protection (OVP) at the OUT pin prevents the
charge pump from producing an excessively high output
voltage. In the event of an open circuit between the OUT
pin and all current sinks (no loads connected), the charge
pump runs in open loop and the voltage rises up to the
ꢀ2
SC657
Applications Information (continued)
OVP limit. OVP operation is hysteretic, meaning the charge
pump will momentarily turn off until VOUT is sufficiently
reduced. The maximum OVP threshold is 6.0V, allowing
the use of a ceramic output capacitor rated at 6.3V.
PCB Layout Considerations
Following fundamental layout rules is critical for achieving
the performance specified in the Electrical Characteristics
table. The following guidelines are recommended when
developing a PCB layout:
Over-Temperature Protection
The Over-Temperature (OT) protection circuit prevents the
device from overheating and experiencing a catastrophic
failure. When the junction temperature exceeds ꢀ60°C, the
device goes into thermal shutdown with all outputs dis-
abled until the junction temperature is reduced. All regis-
ter information is retained during thermal shutdown.
Hysteresis of 20°C is provided to ensure that the device
cools sufficiently before re-enabling.
• Place all capacitors (Cꢀ, C2, CIN, and COUT) as
close to the device as possible.
• All charge pump current passes through the IN/
OUT and the bucket capacitor connection pins.
Ensure that all connections to these pins make
the of wide traces so that the resistive drop on
each connection is minimized.
• Make all ground connections to a solid ground
plane as shown in the example layout .
Charge Pump Output Current Limit
The device limits the charge pump current at the OUT pin.
If the OUT pin is shorted to ground, or VOUT is lower than
2.5V, the typical output current limit is 60mA. The output
current is limited to 300mA when over loaded resistively
with VOUT greater than 2.5V.
LED Float Detection
Float detect is a fault detection feature of the LED back-
light outputs. If an output is programmed to be enabled
and an open circuit fault occurs at any backlight output,
that output will be disabled to prevent a sustained output
OVP condition from occurring due to the resulting open
loop. Float detect ensures device protection but does not
ensure optimum performance. Unused LED outputs must
be disabled to prevent an open circuit fault from
occurring.
Figure 2 — Suggested Layout
Thermal Management
Although the SC657 can provide up to ꢀ25mA output
current, the maximum thermal temperature and the
thermal resistance (θJA) of the package and layout may
limit the output current. Thermal resistance can be
lowered by following the recommended layout guidelines
in PCB Layout Considerations, as illustrated in Figure 2.
ꢀ3
SC657
SemPulseTM Interface
Introduction
register bits per register. Just like with the address write,
the data write is only accepted if the bus is held high for
tHOLDD when the pulse train is completed. If the proper
hold time is not received, the interface will keep counting
pulses until the hold time is detected. If the total exceeds
63 pulses, the write will be ignored and the bus will reset
after the next valid hold time is detected. After the bus
has been held high for tHOLDD, the bus will expect the next
pulse set to be an address write. Note that this is the same
effect as the bus reset that occurs when tHOLDA exceeds its
maximum specification. For this reason, there is no
maximum limit on tHOLDD — the bus simply waits for the
next valid address to be transmitted.
SemPulse is a write-only single wire interface. It provides
the capability to access up to 32 registers that control
device functionality. Two sets of pulse trains are transmit-
ted via the SPIF pin. The first pulse set is used to set the
desired address. After the bus is held high for the address
hold period, the next pulse set is used to write the data
value. After the data pulses are transmitted, the bus is
held high again for the data hold period to signify the data
write is complete. At this point the device latches the data
into the address that was selected by the first set of pulses.
See the SemPulse Timing Diagrams for descriptions of all
timing parameters.
Multiple Writes
Chip Enable/Disable
It is important to note that this single-wire interface
requires the address to be paired with its corresponding
data. If it is desired to write multiple times to the same
address, the address must always be re-transmitted prior
to the corresponding data. If it is only transmitted one
time and followed by multiple data transmissions, every
other block of data will be treated like a new address. The
result will be invalid data writes to incorrect addresses.
Note that multiple writes only need to be separated by
the minimum tHOLDD for the slave to interpret them cor-
rectly. As long as tHOLDA between the address pulse set and
the data pulse set is less than its maximum specification
but greater than its minimum, multiple pairs of address
and data pulse counts can be made with no detrimental
effects.
The device is enabled when the SemPulse interface pin
(SPIF) is pulled high for greater than tSU. If the SPIF pin is
pulled low again for more than tSD, the device will be
disabled.
Address Writes
The first set of pulses can range between 0 and 3ꢀ (or ꢀ to
32 rising edges) to set the desired address. After the
pulses are transmitted, the SPIF pin must be held high for
tHOLDA to signal to the slave device that the address write is
finished. If the pulse count is between 0 and 3ꢀ and the
line is held high for tHOLDA, the address is latched as the
destination for the next data write. If the SPIF pin is not
held high for tHOLDA, the slave device will continue to count
pulses. Note that if tHOLDA exceeds its maximum specifica-
tion, the bus will reset. This means that the communication
is ignored and the bus resumes monitoring the pin,
expecting the next pulse set to be an address. If the total
exceeds 3ꢀ pulses, SPIF must be held high until the bus
reset time tBR is exceeded before commencing
communication.
Standby Mode
Once data transfer is completed, the SPIF line must be
returned to the high state for at least ꢀ0ms to return to the
standby mode. In this mode, the SPIF line remains idle
while monitoring for the next command. This mode
allows the device to minimize current consumption
between commands. Once the device has returned to
standby mode, the bus is automatically reset to expect the
address pulses as the next data block. This safeguard is
intended to reset the bus to a known state (waiting for the
beginning of a write sequence) if the delay exceeds the
reset threshold.
Data Writes
After the bus has been held high for the minimum address
hold period, the next set of pulses are used to write the
data value. The total number of pulses can range from 0
to 63 (or ꢀ to 64 rising edges) since there are a total of 6
ꢀ4
SC657
SemPulseTM Interface (continued)
SemPulse Timing Diagrams
The SemPulse single wire interface is used to enable or disable the device and configure all registers (see Figure 3). The
timing parameters refer to the digital I/O electrical specifications.
Address is set
Up to 32 rising edges
(0 to 31 pulses)
Up to 64 rising edges
(0 to 63 pulses)
Data is written
SPIF
t = tSU
t = tHOLDA
t = tHOLDD
tHI
tLO
Figure 3 — Uniform Timing Diagram for SemPulse Communication
Timing Example 1
In this example (see Figure 4), the slave chip receives two sets of pulses to set the address and data, and the pulses expe-
rience interrupts that cause the pulse width to be nonuniform. Note that as long as the maximum high and low times
are satisfied and the hold times are within specification, the data transfer is completed regardless of the number of
interrupts that delay the transmission.
Address is set to
register 02h
Data written is
000011
SPIF
tLO
t = tSU
tHI
t = tHOLDA
t = tHOLDD
t < tHImax
t < tLOmax
Figure 4 — SemPulse Data Write with Non-Uniform Pulse Widths
Timing Example 2
In this example (see Figure 5), the slave chip receives two sets of pulses to set the address and data, but an interrupt
occurs during a pulse that causes it to exceed the minimum address hold time. The write is meant to be the value 03h
in register 05h, but instead it is interpreted as the value 02h written to register 02h. The extended pulse that is delayed
by the interrupt triggers a false address detection, causing the next pulse set to be interpreted as the data set. To avoid
any problems with timing, make sure that all pulse widths comply with their timing requirements as outlined in this
datasheet.
Address is set to register
03h (address and data are
now out of order)
Address is set to
register 02h
Data written is
000010
SPIF
Interrupt
duration
t > tHImax
t = tHOLDA
t = tHOLDD
Figure 5 — Faulty SemPulse Data Write Due to Extended Interrupt Duration
ꢀ5
SC657
Register Map(1)
Reset
Value
Address
D5
D4
D3
D2
D1
D0
Description
0(2)
0(2)
0(2)
BLEN5
MBL4
SBL4
BLEN4
MBL3
SBL3
TBL3
0(2)
BLEN3
MBL2
SBL2
TBL2
0(2)
BLEN2
MBLꢀ
SBLꢀ
BLENꢀ
MBL0
SBL0
00h
00h
00h
00h
00h
00h
Backlight Enable
Main Backlight Current
Sub Backlight Current
Third Backlight Current
Main Fade
00h
0ꢀh
02h
03h
0(2)
0(2)
TBL4
0(2)
TBLꢀ
TBL0
04h
05h
MFADEꢀ
MBꢀ
MFADE0
MB0
0(2)
0(2)
0(2)
MB2
Backlight Grouping Configuration
Notes:
(ꢀ) all registers are write-only.
(2) 0 = always write a 0 to these bits
Definition of Registers and Bits
BL Enable Control Register (00h)
This register enables each individual LED.
Bit D5
This bit is unused and is always a zero, so the maximum
pulse count for this register is 3ꢀ.
BLEN5 — BLEN1 [D4:D0]
These active high bits enable the five backlight drivers.
Each LED can be controlled independently.
ꢀ6
SC657
Register and Bit Definitions (continued)
Table 4 — Main Backlight Current Settings
Main Backlight Current Control Register (01h)
This register is used to set the currents for the backlight
current sinks assigned to the Main Backlight Group. This
group can also be used to control red LEDs for limited RGB
control. These current sinks need to be enabled in the
Backlight Enable Control register to be active.
MBL4 MBL3 MBL2 MBLꢀ MBL0
Backlight Current (mA)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
See note ꢀ
See note ꢀ
See note ꢀ
0.5
ꢀ.0
ꢀ.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
6.0
7.0
8.0
9.0
ꢀ0
Bit D5
This bit is unused and is always a zero, so the maximum
pulse count for this register is 3ꢀ.
MBL4 — MBL0 [D4:D0]
These bits are used to set the current for the main back-
light current sinks. All enabled main backlight current
sinks will sink the same current, as shown in Table 4.
ꢀꢀ
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
2ꢀ
23
25
(ꢀ) Reserved for future use
ꢀ7
SC657
Register and Bit Definitions (continued)
Table 5 — Sub Backlight Current Settings
Sub Backlight Current Control Register (02h)
This register is used to set the currents for the backlight
current sinks assigned to the Sub Backlight Group. This
group can also be used to control green LEDs for limited
RGB control. These current sinks need to be enabled in the
Backlight Enable Control register to be active.
SBL4 SBL3 SBL2 SBLꢀ SBL0
Backlight Current (mA)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
See note ꢀ
See note ꢀ
See note ꢀ
0.5
ꢀ.0
ꢀ.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
6.0
7.0
8.0
9.0
ꢀ0
Bit D5
This bit is unused and is always a zero, so the maximum
pulse count for this register is 3ꢀ.
SBL4 — SBL0 [D4:D0]
These bits are used to set the current for the sub backlight
current sinks. All enabled sub backlight current sinks will
sink the same current, as shown in Table 5.
ꢀꢀ
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
2ꢀ
23
25
(ꢀ) Reserved for future use
ꢀ8
SC657
Register and Bit Definitions (continued)
Table 6 — Third Backlight Current Control Bits
Third Backlight Current Control Register (03h)
This register is used to set the currents for the backlight
current sinks assigned to the Third Backlight Group. This
group can also be used to control blue LEDs for limited
RGB control. These current sinks need to be enabled in the
Backlight Enable Control register to be active.
TBL4 TBL3 TBL2 TBLꢀ TBL0
Backlight Current (mA)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
0
0
ꢀ
ꢀ
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
0
ꢀ
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
ꢀ
0
See note ꢀ
See note ꢀ
See note ꢀ
0.5
ꢀ.0
ꢀ.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
6.0
7.0
8.0
9.0
ꢀ0
Bit D5
This bit is unused and is always a zero, so the maximum
pulse count for this register is 3ꢀ.
TBL4 — TBL0 [D4:D0]
These bits are used to set the current for the third back-
light current sinks. All enabled third backlight current
sinks will sink the same current, as shown in Table 6.
ꢀꢀ
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
2ꢀ
23
25
(ꢀ) Reserved for future use
ꢀ9
SC657
Register and Bit Definitions (continued)
MB2, MB1 and MB0 [D2:D0]
Main Fade Control (04h)
These bits are used to set the number of LED drivers dedi-
cated to each backlight group. This allows the device to
drive up to three different sets of LEDs with different
current settings. Note that any driver assigned to any LED
group can still be disabled independently if not needed.
The code set by these bits determines how the LED drivers
are assigned among the three LED groups according to
the assignments listed in Table 8. Default state for each of
these three bits is “0”(all LEDs assigned to main display).
This register sets the fade status and rate for the main
backlight group.
Bits [D5:D2]
These bits are unused and are always zeros, so the
maximum pulse count for this register is 3.
MFADE1, MFADE0[D1:D0]
These bits are used to enable and set the rise/fall rate
between two backlight currents as follows in Table 7.
Table 8 — Backlight Grouping Configuration
Table 7 — Main Display Fade Control Bits
Main
Display
LED
Sub
Display
LED
Third
Display
LED
Fade Feature Rise�Fall Rate
MFADE1
MFADE0
MB2 MB1 MB0
(ms�step)
Drivers
Drivers
Drivers
0
0
ꢀ
ꢀ
0
ꢀ
0
ꢀ
OFF
0
0
0
0
0
ꢀ
0
ꢀ
0
BLꢀ-BL5
BLꢀ-BL3
BLꢀ-BL2
8
BL4-BL5
BL3-BL4
ꢀ6
32
BL5
BL4
BLꢀ-BL2,
BL5
0
ꢀ
ꢀ
BL3
The number of steps used to change the backlight current
will be equal to the change in binary count of bits
MBLꢁ4:0].
ꢀ
ꢀ
ꢀ
0
0
ꢀ
0
ꢀ
X
BLꢀ-BL3
BLꢀ-BL4
BLꢀ-BL5
BL4-BL5
BL5
When a new backlight current is set, the backlight current
will change from its current value to a new value set by
bits MBLꢁ4:0] at the rate determined by MFADEꢀ and
MFADE0 bits. The total fade time is determined by the
number of steps between old and new backlight values,
in Table 4, multiplied by the rate of fade in ms/step.
Backlight Grouping Configuration (05h)
This register assigns the LEDs to the back light bank
configurations.
Bits [D5:D3]
These bits are unused and are always zeros, so the
maximum pulse count for this register is 7.
20
SC657
Outline Drawing — MLPQ-UT-14 2x2
B
A
D
DIMENSIONS
INCHES
MIN NOM MAX MIN NOM MAX
MILLIMETERS
DIM
-
-
A
A1
A2
b
.020
.000
0.50
0.00
0.60
0.05
.024
.002
-
-
PIN 1
INDICATOR
(LASER MARK)
(.006)
.008
(0.152)
0.20
E
.006
.010
.081
.081
0.15
1.95
1.95
0.25
2.05
2.05
D
.079
2.00
.077
.077
E
.079
2.00
e
.016 BSC
.012
0.40 BSC
0.30
L
L1
N
.010
.014
.014
.018
0.25
0.35
0.35
0.45
.016
0.40
14
14
aaa
.003
.004
0.08
bbb
0.10
A2
C
A
SEATING
PLANE
aaa
C
A1
LxN
e/2
bxN
bbb
C
A
B
E/2
e
0.15
1
0.20
N
L1
D/2
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2ꢀ
SC657
Land Pattern — MLPQ-UT-14 2x2
R
X
DIMENSIONS
INCHES
DIM
MILLIMETERS
(.079)
.055
.016
.004
.008
.024
.102
(2.00)
1.40
0.40
0.10
0.20
0.60
2.60
C
G
P
R
X
Y
Z
Z
(C)
G
P
Y
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3. SQUARE PACKAGE - DIMENSIONS APPLY IN BOTH " X " AND " Y " DIRECTIONS.
4. PIN 1 PAD CAN BE SHORTER THAN THE ACTUAL PACKAGE LEAD TO AVOID
SOLDER BRIDGING BETWEEN PINS 1 & 14.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 930ꢀ2
Phone: (805) 498-2ꢀꢀꢀ Fax: (805) 498-3804
www.semtech.com
22
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