SC2422 [SEMTECH]
BIPHASE CURRENT MODE CONTROLLER; 双相电流模式控制器
| 型号： | SC2422 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | BIPHASE CURRENT MODE CONTROLLER |
| 文件： | 总10页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
FEATURES
The SC2422A biphase, current mode controller is de-
signed to work with Semtech smart synchronous
drivers, such as the SC1205, SC1305 or the SC1405 to
provide the DC/DC converter solution for the most
demanding Micro-processor applications. Input current
rather than output current sensing is used to guarantee
precision phase to phase current matching using a
single sense resistor on the input power line. Accurate
current sharing and pulse by pulse current limit are
implemented without the power loss and transient re-
sponse degradation associated with output current
sense methods. Two phase operation allows significant
reduction in input/output ripple while enhancing tran-
sient response.
•
Precision, pulse by pulse phase current match-
ing
•
•
•
Active drooping allows for best transient response
Input Sensing Current mode control
Programmable DAC step size/offset allows
Compliance with VRM9.0, VRM8.3 or VRM8.4
Externally programmable soft-start
5V or 12V input for next generation processors
0% minimum duty cycle improves transient re-
sponse
Externally Programmable UVLO with hysteresis
Cycle by cycle current limiting
Programmable Internal Oscillator to 1 MHz
VID IIIII Inhibit (No CPU)
•
•
•
•
•
•
•
The DAC step size and range are programmable with
external components thus allowing compliance with
new and emerging VID ranges.
APPLICATIONS
•
•
•
Intel Advanced Microprocessors
AMD AthlonTM power supplies
A novel approach implements active droop, minimizing
output capacitor requirements during load transients.
This avoids the pitfalls of the passive droop implemen-
tation. This feature also allows easy implementation of
N+1 redundancy and current sharing among modules.
Servers/Workstations, high density power supplies
ORDERING INFORMATION
DEVICE(1)
SC2422ACS.TR
SC2422A.EVB
PACKAGE
TEMP. RANGE (TJ)
Programmable Under Voltage Lockout assures proper
start-up and shutdown by synchronizing the controller
to the driver supply. Wide PWM frequency range allows
use of low profile, surface mount components.
SO-16
0 - 125°C
Evaluation Board
Note:
(1) Only available in tape and reel packaging. A reel con-
tains 1000 devices.
TYPICAL APPLICATION SCHEMATIC
INPUT
Rsens
VIN
1
3
4
7
6
5
IN
DRVH
PHASE
DRVL
1
16
15
14
13
12
11
10
9
VID4
VID3
VID2
VID1
VID0
ERROUT
FB
VCC
BGOUT
OC+
VCC
VDD
2
3
4
5
6
7
8
SC1305
OUT1
OUT2
OC-
VIN
1
3
4
7
6
5
IN
DRVH
PHASE
DRVL
UVLO
GND
VCC
VDD
Rf
RREF
Rref
SC2422A
SC1305
Ri
Vout
1
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Maximum
15
Units
V
Input DC Rail Voltage to GND
PGND to GND
VIN
+1
V
Operating Temperature Range
Junction Temperature
TA
TJ
-20 to 125
0 to 125
20
°C
°C
Thermal Resistance Junction to Case
°C/W
θJC
Thermal Resistance Junction to Ambient
60
°C/W
θJA
Storage Temperature Range
TSTG
TLEAD
-65 to +150
300
°C
°C
Lead Temperature (Soldering) 10 sec
ELECTRICAL CHARACTERISTICS
Unless specified: VCC = +5V, TAMB = 25°C, RREF = 11.5kΩ. See Typical Application Circuit
Parameter
Conditions
Min
Typ
Max
Units
Chip_Supply
IC Supply Voltage
IC Supply Current
Reference Section
Bandgap Output
Source Impedance
4.5
5
9
14
V
V
CC = 5.0 ~ 12.0V
mA
C
BG = 4.7nF
1.5
3
V
kΩ
Supply Rejection
VID Step
V
CC = 5.0V ~ 12.0V
2
mV/V
mV
25
RI = 6.49kΩ, RREF = 11.5kΩ
Voltage Accuracy
Temperature Stability
Voltage Accuracy
Oscillator Section
Frequency Range
Frequency Accuracy
-1
1
%
%
%
0°C < TAMB < 70°C
0°C < TAMB < 70°C
5
+/-1
400
450
1000
550
kHz
kHz
500
+/-5
VIN = 12.0V, RREF = 13kΩ
or VIN = 5.0V, RREF =11.5kΩ
Temperature Stability
Voltage Error Amplifier
Input Offset Voltage
Input Offset Current
Open Loop Gain
0°C < TAMB < 70°C
%
+/-5
0.1
90
80
2.5
2
mV
µA
1V < VERROUT < 4V
CC = 5 - 12V
VERROUT = 1V
ERROUT = 4V
dB
PSRR
V
dB
Output Sink Current
Output Source Current
Unity Gain Bandwidth
Slew Rate
mA
mA
MHz
V/uS
V
IO < 100µA
IO < 100µA
5
10
2
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
ELECTRICAL CHARACTERISTICS (Cont)
Unless specified: VCC = +5V, TAMB = 25°C, RREF = 11.5kΩ.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Current Sense Amplifier
Amplifier Gain
(VOC- - VOC+ ) < 100mV
(VOC- - VOC+ ) < 100mV
26
4
dB
Input Offset Voltage,
Input Referred
mV
CMRR
V
ICM = 9 ~ 14V @ DC
80
80
dB
dB
PSRR
VCC = 9 ~ 14V @ DC
Input Common Mode Range
V
CC +/-
0.3
Max Differential Signal/
Current Limit Threshold
V
OC- - VOC+
100
mV
ns
I-Limit Delay
Current limit activation to OUT 1 & OUT
2 switching off
60
Protection
UVLO Ramp-up Threshold
UVLO Ramp-down Threshold
1.475
1.375
V
V
R
R
SOURCE UVLO pin = 20kΩ
SOURCE UVLO pin = 20kΩ
Outputs (OUT 1, OUT 2)
Max Duty Cycle
Per phase, FOSC = 500kHz
47
%
%
V
Duty Match
F
OSC = 500kHz
-.5
.8
.5
Typical Output Voltage Swing
2.5
RL = 10kΩ
.2
3.3
2
V
V
RL = 100kΩ
VID Logic Threshold
0.8
VID Logic Pin Bias Current
VIN = 0
12
µA
Note:
1. If the VID pins are driven high by an external source (in contrast to being left open), then all VIDs input will need
to be externally pulled high. If VIDs are left open, no external pull-up is required.
2. This device is ESD sensitive. Use of standard ESD handling precautions is required.
3
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
PIN DESCRIPTION
sense resistor.
Pin 1: VID4 , MSB
Pin 12: OUT2 PWM output for phase 2. Drives exter-
nal Power MOSFET driver.
Pin 2: VID3
Pin 13: OUT1 PWM output for phase 1. Drives exter-
nal Power MOSFET driver.
Pin 3: VID2
Pin 4: VID 1
Pin 14: OC+ Input current sense positive input. This
pin is connected to MOSFET side of the current sense
resistor.
Pin 5: VID0 , LSB
Pin 6: ERROUT Error-amplifier output.
Pin 7: FB Error-amplifier inverting input.
Pin 15: BGOUT Soft start and reference. Bypass to
ground (GSEN) with a .022µF - 0.1µF capacitor to im-
plement soft start in conjunction with internal 3KΩ re-
sistor. To ensure output voltage accuracy, the maxi-
mum current source/sink from this pin should be lim-
ited to 0.5 uA.
Pin 8: RREF Frequency setting resistor pin. Also pro-
grams the DAC current step size. (see application in-
formation for programming the frequency)
Pin 16: VCC Chip positive supply.
Pin 9: GND Chip ground.
Pin 10: UVLO Programmable Under Voltage Lock-
Out. This pin may be connected to the MOSFET driver
supply through a voltage divider to inhibit the SC2422A
until the drivers are on. The UVLO comparator trip
point is 1.5V.
Pin 11: OC- Input current sense, negative input. This
pin is connected to the input supply side of the current
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
Top View
(16-Pin SOIC)
4
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
OUTPUT VOLTAGE (VRM 9.0)
Unless specified: 0 = GND; 1 = High (or Floating).
TA = 25°C, VCC = 5V, 2-Phase operation
VCCCORE
VID4
VID3
VID2
VID1
VID0
(VDC)
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Output Off
1.1
1.125
1.15
1.175
1.2
1.225
1.250
1.275
1.3
1.325
1.35
1.375
1.4
1.425
1.45
1.475
1.5
1.525
1.55
1.575
1.6
1.625
1.65
1.675
1.7
1.725
1.75
1.775
1.8
1.825
1.85
5
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Figure 1:
SC2422A SCHEMATIC WITH +5V INPUT FOR THE AMD ATHLONTM PROCESSOR
B S T
G N D
B S T
G N D
8
3
8
3
8 2 0 u f , 1 6 V
8 2 0 u f , 1 6 V
8 2 0 u f , 1 6 V
1 u , 1 6 V
*
6
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
ramp voltage equals the error amplifier output signal.
The current mode control is inherently immune to input
voltage changes because the ramp amplitude reflects
the input voltage changes.
Applications Information
The SC2422A is an Input Current Mode Controller de-
signed for High Current, High performance two phase
DC/DC converters. The Current mode control is imple-
mented by generating the PWM ramp from the Input
Current, rather than the output current. This has the
advantage of eliminating the output current sense re-
sistors, and the power loss associated with output cur-
rent sensing. Eliminating the output current sense re-
sistors has the added advantage of improving the tran-
sient response by reducing the output impedance.
Since the input current sense resistor is the same for
both phases, the inherent inaccuracy due to mismatch
between output current sense resistors is avoided.
Also, since the comparator threshold is the same for
both phases, accurate current matching is achieved
between phases. This implements a pulse by pulse
current matching with a faster response to changes in
output current by monitoring the input current for each
phase.
The output voltage is programmed via a 5-bit DAC in
32 steps. A novel technique allows programmable
DAC step size and output offset, allowing the SC2422A
based DC/DC converters to work in VRM9.0, VRM 8.3,
VRM8.4, VRM8.5 or future specified voltage ranges.
Programming the SC2422A
Figure 2 below, is the connection schematic for the In-
ternal Error Amplifier.
Theory of Operation
Bandgap
1.5V
3K
Pulse by Pulse Current Matching
BGOUT (P15)
E/A
Vid0
+
ERROUT(P6)
Io
DAC
The operation of the Input Current Mode, ICM, is as
follows:
-
Ccomp
Rcomp
Vid4
VOUT
FB(P7)
The SC2422A Oscillator generates the OUT1 and
OUT2 logic output drives. OUT1 and OUT2 are non-
overlapping and sequentially command an external,
power MOSFET driver to turn on the Top MOSFETs.
When the Top MOSFET is enhanced (each phase),
the input voltage is impressed across the MOSFET
and the output Inductor. The AC current in the inductor
is:
Ri
Rf
Ros
Figure 2: Error amplifier connections
The external components, RI, ROS and RF set the DAC
step size, output voltage offset and droop, accordingly.
A resistor from RREF (pin 8) to ground programs the
frequency as well as the DAC current step size.
(VIN VOUT ) x D
(VIN − VOUT ) x TON
−
IL =
=
L
FxL
Programming the Switching Frequency
Where F is the frequency (per phase) and L is the out-
put inductor. D is the duty cycle and is approximately
equal to VO/VIN. The approximation arises from the
fact that the Duty cycle extends slightly to compensate
for losses in the current path. These losses include
RDS_ON of the MOSFET, the Equivalent Series Re-
sistance of the Inductors and the PCB trace resis-
tances.
The oscillator frequency can be selected first by setting
the value of RREF resistor (pin 8) to ground.
13kΩ * 500kHz
fOSC
=
RREF
VIN = 12V
The switching frequency per phase is 1/2 of the above
oscillator frequency.
The inductor current flows in the input current sense
resistor, generating a PWM ramp, same as in all cur-
rent mode controllers. The ramp is compared with an
amplified, level shifted and filtered version of the output
voltage at the PWM comparator. The comparator then
outputs a gate drive pulse that terminates when the
7
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
the output voltage specification. As the load is in-
Programming the DAC Step Size
creased, the output “droops” towards the lower limit.
This makes optimum use of the output voltage error
band, yielding minimum output capacitor size and cost.
Active drooping, does not compromise the converter
response time as does passive droop techniques. The
active droop also allows for an accurate Inter-Module
current sharing scheme, where multiple DC/DC con-
verters are required to share the current required by a
DC bus. As one module supplies more current, that
modules output voltage ”droops”, allowing other mod-
ules to provide the balance of the required current.Any
changes in the output voltage is instantaneously re-
flected to the error amplifier, which has a high Slew
Rate and wide Gain-Bandwidth product to recover the
output voltage to its nominal level with minimal delay.
The SC2422A allows programming the output voltage
and the DAC step size by selecting external resistors.
The DAC current step size, for one MSB is:
VBG
IDAC _MSB
=
RREF
where RREF is the resistor from RREF pin to Ground.
The DAC MSB voltage step size is calculated as fol-
lows:
VDAC_MSB = IDAC_MSB * RI
VDAC _ MSB
VDAC _ LSB
=
=
32
The droop is adjusted by setting the feedback resistor,
Rf. While the optimum value of RF may be derived ex-
perimentally, the following equation can provide the
droop at a given output current:
or
VDAC _LSB
VBG
RREF
RI
32
GCA * RI * RS * IOUT
VDROOP
=
Note that changing RREF affects both frequency and
DAC step size. RI must be proportionally adjusted to
keep the same step size at different frequencies. The
advantage of this method is that all new VID specifica-
tions can be accommodated by modifying external
components while maintaining the required precision
without the need for converter redesign.
2RF
The Gain of the current amplifier is set to 20 (26dB),
while RS is the input sense resistor.
The effective inductance of the sense resistor must be
minimized to achieve accurate correlation between the
above equation and actual droop achieved. This is be-
cause the inductive spike, which may also be caused
by layout inductance's, will alter the PWM comparator
trip point. The value of RF may have to be adjusted to
compensate for such parasitic effects.
Programming the DAC Offset Voltage
Kirchoff’s current law can be applied to the error ampli-
fier’s Inverting node (see figure 2) to calculate ROS, the
DAC offset setting resistor. The output Offset at zero
DAC current (VID=00000), is set as follows:
Since Rf also sets the DC gain of the system, changing
the value of Rf affects the offset voltage, which is set
via Ros. The value of Ros can be modified to achieve
exact offset after the droop resistor has been chosen.It
must be noted that the Current Amplifier gain is quite
precise, with greater than 80dB of Common Mode Re-
jection Ratio (CMRR). Thus the droop’s accuracy is
limited primarily by external components tolerances
and the external parasitic effects.
VBG
ROS
=
VO − VBG VEO − VBG
+
RI
RF
Where VEO is the error amplifier output voltage and as
a first approximation is equal to 1.75V.
Where VBG = Precision Reference Voltage = 1.50V.
The value of ROS can be fine trimmed using a poten-
tiometer connected from the FB pin to ground.
Loop Gain Considerations
The Modulator gain in Input Current Mode control is
equal to:
Programming the Dynamic (Active) Droop
VIN
KMOD
=
VRAMP
The SC2422A employs a novel approach to active
drooping for optimum transient response. The output
voltage is regulated as a function of output current. At
zero current the output is regulated to the upper limit of
V
− VO
IN
VRAMP = 0.3V + RSENSE X TOSC X GCA
X
L
8
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
Where:
Considerations in Input Current Mode DC/DC Con-
verters”. This application note is available by con-
tacting the factory.
RS = Input current sense resistor
TOSC = Oscillator period
GCA = Current Amplifier Gain
Remote Sensing Capability
0.3V is the ramp added for slope compensation when
the output current is near zero.
The SC2422 has a single ground for error amplifier
and DAC reference and for the internal biasing of the
chip. Since the chip uses approximately 10ma of qui-
escent current, the ground pin may be connected to a
remote location without fear of ground loops. When
used as a microprocessor power supply, connecting
the ground pin directly to the ground plane may result
in undesirable voltage drops in the plane at high out-
put current. This is not entirely predictable since the
error amplifier is correcting for the DC error with ref-
erence with the ground plane and not the processor
“feedback ground”. Thus any voltage difference be-
tween the two ground will result in a DC error. This
error will obviously consume valuable static error
band tolerance. To avoid this DC error, the SC2422
ground pin (pin 9) can be connected to a copper
“Island”, to which Rref (frequency setting resistor)
and Ros (offset setting resistor) will also be con-
nected. This “Island” in turn will only be connected to
the “Processor Feedback” ground via a trace. While
the trace may be long, it should not be routed through
or near the switching sections or noisy components.
This method of remote sensing will alleviate the need
for a differential amplifier to sense the output voltage/
output return pair and the design effort and costs as-
sociated with it.
The DC loop gain is the product of the modulator gain
and the error amplifier gain and is calculated as follows:
V
* RF
IN
GLOOP
=
VRAMP * RI
Refer to Application note AN00-1 for detailed treatment
of frequency compensation component selection as well
as programming the SC2422A. The application note is
available on the Semtech website or by contacting the
factory.
Programming the Under Voltage Lockout
The SC2422A may be operated from any supply in +5V
to +12V range. A pin has been dedicated to externally
selecting the voltage at which the SC2422A outputs are
active. A good typical turn-on threshold value is 4.5V for
a +5V input supply and 9V for a +12V supply. A voltage
divider connected to the UVLO pin selects this threshold.
The UVLO comparator trip point is approximately
1.475V. Sufficient hysterisis is provided to ensure
proper DC/DC converter shutdown.
The UVLO setting should consider external MOSFET
driver’s UVLO threshold. Ideally, the external MOSFET
driver should turn on before the SC2422 controller and
turn off before the controller. This assures the converter
output will rise and fall slowly using the soft start feature
and that the output voltage will not go negative at turn-
off.
SC2422A Evaluation Board
The SC2422A based DC/DC converter utilizes the
SC1205 High Speed MOSFET drivers to achieve
VRM 9.0 output Voltage Specifications. SC2422A
Evaluation Board Schematic (Figure 1) shows the
circuit for a 40A, BiPhase DC/DC converter. The
Evaluation board is available by contacting the fac-
tory or Semtech website at WWW.Semtech.com.
PCB layout
Care must be excercised when laying out the PC board
for SC2422 or other input current mode DC/DC convert-
ers. SInce the current is delivered and sensed in pulse
packets, the inductance of the current carrying traces
and thus their length must be minimized. Ceramic by-
pass capacitors must be located near the sense resistor.
For a detailed treatment and circuit parasitic models,
consult application note:
AN00-7:“Component Selection and PC Board layout
9
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
BIPHASE CURRENT MODE
CONTROLLER
SC2422A
PRELIMINARY - August 7, 2000
OUTLINE DRAWING SO-16
Jedec MS-012AC
LAND PATTERN SO-16
ECN00-1242
10
© 2000 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
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