LV5858M [SANYO]
Step-down Switching Regulator; 降压型开关稳压器
| 型号： | LV5858M |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Step-down Switching Regulator |
| 文件： | 总9页 (文件大小：250K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1977
Bi-CMOS IC
Step-down Switching Regulator
LV5858M
Overview
LV5858M is a 3A and 1ch step-down switching regulator. 0.1Ω FET is incorporated on the upper side to achieve
high-efficiency operation for large output current. Current mode control type, with superior load current response and easy
phase compensation ON/OFF pin, allowing the standby mode with the current drain of 60μA or less Pulse-by-pulse
over-current protection and overheat protection available for protection of load devices Soft start pin to be provided with a
capacitance for soft start.
Functions
• Wide input dynamic range ( 8 to 42V)
• Thermal shutdown
• High efficiency (V = 24V, V = 5V, I = 3A, 88%)
• Current mode control type
• Standby mode: 60μA
• Reference voltage: 0.708V
• Fixed frequency: 385kHz
• Load-independent soft start circuit
IN
O
OUT
• Built-in pulse-by-pulse OCP circuit. It is detected by using ON resistance of an external MOS.
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
max
Conditions
Ratings
Unit
V
Supply voltage
V
45
45
IN
Allowable pin
voltage
V
, SW
V
V
V
V
V
IN
CBOOT
52
Between CBOOT and SW
EN
6.0
max
6.0
V
IN
V
DD
SS, FB, COMP, RT
V
V
DD
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Ta≤85°C Mounted on a specified board *
0.95
W
-40 to 85
°C
°C
°C
Tstg
-55 to 150
150
Junction temperature
Tj max
Continued on next page.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment. The products mentioned herein
shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life,
aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system,
safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives
in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any
guarantee thereof. If you should intend to use our products for new introduction or other application different
from current conditions on the usage of automotive device, communication device, office equipment, industrial
equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the
intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely
responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
91411 SY 20110825-S00007 No.A1977-1/9
LV5858M
Continued from preceding page.
* Specified board: 36.0mm × 44.0mm ×1.6mm, glass epoxy, 2 layer substrate.
Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time.
Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,
high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.
Recommended Operating Conditions at Ta = 25°C
Parameter
Supply voltage range
Error amplifier input voltage
Symbol
Conditions
Ratings
Unit
V
V
V
8 to 42
0 to 1.6
IN
V
FB
Electrical Characteristics at Ta = 25°C, V = 24V
IN
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Reference voltage block
Internal reference voltage
5V power supply
VREF
Including offset of E/A
0.698
4.7
0.708
5.2
0.718
V
V
V
I
=0 to 5mA
OUT
5.7
DD
Triangular waveform oscillator block
Oscillation frequency
f
335
385
1
435
kHz
%
OSC
OSC
Frequency variation
f
DV
FB
V
=8.0 to 42V
IN
Oscillation frequency fold back detection
voltage
V
FB voltage detection after SS ends
0.5
V
OSC
Oscillatory frequency after fold back
f
FB
25
45
60
kHz
OSC
ON/OFF circuit block
IC start-up voltage
V
V
_on
_off
V
=8.0 to 42V
3.4
1.3
4.3
V
V
EN
IN
IC off voltage
1.1
4
EN
Soft start circuit block
Soft start source current
I
I
_SC
EN › 3.5V
5
2
6
1.3
7.8
μA
mA
V
SS
Soft start sink current
_SK
EN ‹ 1V, V =5V
DD
SS
Voltage to end the soft start function
UVLO circuit block
V
_END
0.9
7.0
1.1
SS
UVLO lock release voltage
UVLO hysteresis
V
V
7.4
0.6
V
V
UVLO
_H
UVLO
Error amplifier
Input bias current
I
_IN
100
1800
1.6
nA
μA/V
V
EA
Error amplifier transconductance
Common mode input voltage range
Sink output current
G
1000
0.0
1400
EA
_R
V
EA
I
I
_OSK
FB=1.0V
FB=0V
-100
100
1.3
μA
EA
Source output current
_OSC
μA
EA
Current detection amplifier gain
Over current limiter circuit block
Current limit pead value
GISNS
I
_OFS
VOUT=5V, L=-10μH
4.0
4.5
A
LIM
PWM comparator
Input threshold voltage f
=125kHz)
OSC
Vt max
Vt0
Duty cycle=D max
Duty cycle=0%
1.0
0.4
85
1.1
0.5
90
1.2
0.6
95
V
V
Maximum ON duty
D max
%
Output block
Output stage ON resistance
(the upper side)
R
0.1
Ω
ON
The whole device
Standby current
I
I
S
EN ‹ 1V
60
μA
CC
Mean consumption current
Protection function
A
EN ‹ 4.3V
3.3
mA
CC
Temperature at which the high-temperature
protection function operates
High-temperature protection function
hysteresis
TSD_on
*Design guarantee
*Design guarantee
170
30
°C
°C
TSD_hys
No.A1977-2/9
LV5858M
Package Dimensions
unit : mm (typ)
3403
5.0
Pd max -- Ta
Mounted on a specified board: 44.0 36.0 1.6mm3
1.50
1.25
12
×
×
glass epoxy both side
1.00
0.95
0.75
0.50
0.25
1
2
0.15
0.3
0.8
(0.5)
0
-20
20
40
60
80
0
-40
100
Ambient temperature, Ta --
C
SANYO : MFP12SJ(225mil)
Block Diagram
V
_P
IN
V
_S
IN
5V
REFERENCE
VOLTAGE
TSD
UVLO
REGULATOR
-
S
R
Q
CBOOT
+
V
+
-
CC
OCP Comp
Current
Amp
SW
+
-
CONTROL
Logic
S
Q
SD
SD
R
DMAX=90%
1.0V
0.5V
5V
1.1V
SAW WAVE
OSCILLATOR
+
V
DD
-
+
+
SS
FB
0.7V
+
f
OSC
-
PWM Comp
LDRV
GND
forced
1/10
Err
Amp
COMP
+
-
FFOLD
Comp
shut down(SD)
0.5V
12pin
EN
No.A1977-3/9
LV5858M
Pin Assignment
V
_P
IN
1
12 SW
CBOOT 2
11 EN
GND
3
4
5
6
10 COMP
LDRV
9
8
7
FB
SS
V
DD
GND
V
_S
IN
Top view
Pin Function
Pin
No.
1
Pin name
Function
Equivalent circuit
V
_P
Power supply pin.
Bootstrap capacity connection pin.
IN
2
CBOOT
V
V
_P
IN
This pin becomes a GATE drive power supply of
an external Nch MOSFET.
_S
IN
Connect a bypath capacitor CBOOT and SW.
CBOOT
Pin to connect with switching node.
Connect the source of external upper Nch
MOSFET and the drain of external lower Nch
MOSFET.
12
SW
SW
GND
Ground pin.
3, 6
4
GND
Each reference voltage is based on the voltage of
the ground pin.
An external the lower MOSFET gate drive pin.
LDRV
V
DD
LDRV
GND
Power supply pin for an external the lower
MOS-FET gate drive.
5
V
DD
V
_S
IN
V
DD
GND
Control circuit supply pin.
7
V
_S
IN
This pin is monitored by UVLO function. When
the voltage of this pin become 8V or more by
UVLO function. The IC state and the soft start
function operates.
Continued on next page.
No.A1977-4/9
LV5858M
Continued from preceding page.
Pin
Equivalent circuit
Function
Pin to connect a capacitor for soft start.
Pin name
No.
8
SS
A capacitor for soft start is charged by using the
voltage of about 5μA.
V
DD
This pin ends the soft start period by using the
voltage of about 1.1V and the frequency fold back
function becomes active.
FB
SS
Error amplifier reverse input pin.
9
FB
By operating the converter, the voltage of this pin
becomes 0.7V.
VREF
0.708V
GND
The voltage in which the output voltage is divided
by an external resistance is applied to this pin.
Moreover, when this pin voltage becomes 0.1V or
less after a soft start ends, the oscillatory
frequency becomes 1/3.
0.1V
1.1V
1.3V
Error amplifier output pin.
10
COMP
Connect a phase compensation circuit between
this pin and GND.
V
DD
1.6V
FB
GND
ON/OFF pin.
11
EN
V
_S
IN
EN
GND
PS No.A1977-5/9
LV5858M
Sample Application Circuit
V
=8 to 42V
IN
C1
C2
V
_S
IN
V
_P
IN
CBOOT
C8
L
EN
SS
ON/OFF
V
SW
OUT
Q
LDRV
C6
R3
R2
D1
C9
D2
COMP
C3
C7
R1
FB
V
DD
C4
C5
GND_S
Boot sequence, UVLO, and TSD operation
UVLO 7.4V
6.8V
V
IN
V
=90%
DD
V
DD
1.1V
VREF 0.708V
Permission of fold back
SS
V
OUT
SW
LDRV
TSD
Sequence of overcurrent protection
V
IN
I
LIM
SW
Driving usually
Overcurrent protection operation(Fold back operation)
Overcurrent protection operation
Soft start operate section
Driving usually
I
OUT
SS
0.708V
FB
FB=0.1V
PS No.A1977-6/9
LV5858M
Various settings
Output voltage setting
The setting of output voltage (V
) follows the following expressions (1).
9.1k
OUT
R3
V
OUT
= ( 1 +
) × Vref = ( 1 +
) × 0.708 (typ) [V]
(1)
R2
1.5k
EX) To adjust the output voltage to 5V, it becomes R2=1.5kΩand R3=9.1kΩ.
Soft start setting
The setting of soft start capacitor (C7) follows the following expressions (2).
I
× T
VREF
5µ × T
SS
0.708V
SS
SS
C7 =
=
[µF]
(2)
I
: Charge current value, T : Soft start time
SS SS
EX) To adjust the soft start time to about 1.5ms, it becomes C5=0.1μF.
Boot strap capacitor
Boot strap capacitor (C8) is with a capacitor about 1000 times Ciss of power MOSFET of building into. Ciss of built-in
power MOSFET is 505pF.
Ex) C8=505pF×1000=0.505µF. C8 recommends 0.1 to 1μF.
Selection of input smoothness capacitor
The ripple current flows to the input side capacitor of the DC-DC converter by the thing that IC does the switching.
Duty extends by the flow by there are a lot of output currents of the ripple current that flows to the input side capacitor
just like the input current, and the input voltage low and a lot of ripple currents flow, too. Please select the big one of a
permissible ripple current from the value requested from the calculating formula. It must arrange near Power IC, and
inductance by the pattern must become small when you mount the input side capacitor. Calculating formula (3) from
which the execution value is requested becomes the following.
I
_in = D(1− D) × I
RIP
[Arms]
(3)
OUT
D is Duty Cycle defined by V .
/V
OUT IN
Selection of output smoothness capacitor
Please select the one with small impedance by the high frequency when the ripple voltage of the output is decided by
the impedance of the output smoothness capacitor, and you want to suppress the voltage of the output ripple small.
Moreover, please select it so as not to exceed the permissible ripple current value. Moreover, because the high
frequency noise is removed, using the ceramic capacitor together is effective. Using of the aluminum electrolytic
capacitor or the polymer aluminum electrolytic capacitor and the ceramic capacitor together is recommended.
Calculating formula (4) from which the execution value is requested becomes it as follows.
V
(V -V )
1
OUT IN OUT
L × f
I
_out =
RIP
×
=
[Arms]
(4)
× V
IN
OSC
2 3
How to request smooth chalk coil
L1: Please note generation of heat of the choke coil because of the overload and DC magnetic saturation when the load
is short-circuited.
The inductance value is decided because of voltage (V
) of the output ripple and the impedance of the output
RIP
capacitor of the switching frequency. Calculating formula (5) from which the most small inductance is requested
becomes it as follows.
V
f
V
V
R
C
IN - OUT
OUT ×
V
L min =
×
[µH]
(5)
× V
RIP
OSC
IN
ESR is used by the above expression instead of the impedance of the output capacitor. In many cases, the impedance of
the output capacitor of the switching frequency depends on a reason extremely near R as for this. However, the actual
C
impedance is used in the ceramic capacitor instead of R .
C
Ex) V (max)=40V, V
IN OUT
=12V, V =100mV, R =10mΩ, f =385kHz
RIP
C
OSC
40V - 12V 12V × 10m
L min =
×
≈ 2.2 [µH]
(6)
100mV
385k × 40V
PS No.A1977-7/9
LV5858M
In actual part selection, inductance is selected from the decision of the ripple voltage with the selection of the start
capacitor. Please consider the maximum value, minimum value, the output voltage, and the load change of the input
voltage. The ripple current of inductance is recommended to be confirmed because it often becomes the selection
criterion of the output inductance. Calculating formula (7) from which the ripple current value is requested becomes it
as follows.
V
V
IN - OUT
I
=
× D
[A]
(7)
RIP
f
× L
OSC
D is Duty Cycle defined by V .
/V
OUT IN
Moreover, an important item is a ripple current shown with I . In general, there is no problem if the ripple
/I
element is less than 50%. The inductance loss greatness and minute increases when there are a lot of ripple elements.
RIP OUT
Ex) V =24V, V
=5V, f =385kHz, L=10µH
OSC
IN OUT
24V - 5V
385k × 10µ
I
=
× 0.2 = 0.99 [A] (8)
RIP
Pattern layout note
Input capacitor
The ripple current flows to the input capacitor of the DC-DC converter by the thing that IC does the switching.
Mounting and the pattern must be arranged in the input capacitor near the V _P pin, and inductance by the pattern
IN
must become small.
C2: Please connect it near between the V _P pin and the GND pin of IC.
IN
C1: Please connect the bypass capacitor connected with the V _S pin of IC near between the V _S pin and the GND
IN IN
pin.
(Unusually, please note that intense ringing might be caused in the V pin if the bypass capacitor is connected. The
IN
recommendation becomes 1000pF.)
MOSFET
Q (external FET) drives by using Nch-MOSFET. The SW node generates Q along with ON/OFF, and it changes, and
the high frequency noise is generated between V + and GND. It influences a peripheral pattern and the element at
IN
this time. Please the pattern of the gate and the SW node on a low side must draw around neither LDRV nor the SW pin
of IC, and wire for the pattern fat as much as possible. The wiring for LDRV and the SW pin is recommended to wire
for the pattern between GND patterns to prevent the noise from influencing it.
When low side FET is turned on, it becomes the current pathway of inductor (L) →V
(load) →PGND→. It
OUT
becomes possible to suppress the generation of the noise by doing the thing and the pattern wiring that reduces the area
of this current pathway fat, and it becomes malfunction prevention. Therefore, please arrange Q, C2, and C3 in
neighborhood.
Small signal system: FB, COMP, EN, CBOOT, V , SS
DD
Please connect parts connected with the small signal system with short wiring as much as possible in IC neighborhood,
and make GND of parts common with the GND pattern of IC. Please do not wire the under of the wiring for the
inductor and the SW node and neighborhood for the FB pattern. Please there must be a possibility of causing the
malfunction, and avoid and wire for the pattern.
PS No.A1977-8/9
LV5858M
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of September, 2011. Specifications and information herein are subject
to change without notice.
PS No.A1977-9/9
相关型号：
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