K6T4016C3C-RF550 [SAMSUNG]

Standard SRAM, 256KX16, 55ns, CMOS, PDSO44, 0.400 INCH, REVERSE, TSOP2-44;


型号：	K6T4016C3C-RF550
厂家：	SAMSUNG
描述：	Standard SRAM, 256KX16, 55ns, CMOS, PDSO44, 0.400 INCH, REVERSE, TSOP2-44 静态存储器光电二极管内存集成电路
文件：	总9页 (文件大小：145K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CMOS SRAM

K6T4016C3C Family

Document Title

256Kx16 bit Low Power CMOS Static RAM

Revision History

Revision No.

History

Draft Data

Remark

0.0

Initial draft

December 17, 1998

April 17, 1999

Preliminary

Finalize

1.0

Finalize

The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and

products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

256Kx16 bit Low Power CMOS Static RAM

FEATURES

GENERAL DESCRIPTION

· Process Technology: TFT

The K6T4016C3C families are fabricated by SAMSUNG¢s

advanced CMOS process technology. The families support

various operating temperature ranges and small package

types for user flexibility of system design. The families also

support low data retention voltage for battery back-up opera-

tion with low data retention current.

· Organization: 256Kx16

· Power Supply Voltage : 4.5~5.5V

· Low Data Retention Voltage: 2V(Min)

· Three state output and TTL Compatible

· Package Type: 44-TSOP2-400F/R

PRODUCT FAMILY

Power Dissipation

Product Family

Operating Temperature Vcc Range

Speed(ns)

PKG Type

Standby

(ISB1, Max)

Operating

(ICC2, Max)

K6T4016C3C-B

K6T4016C3C-F

Commercial(0~70°C)

Industrial(-40~85°C)

20mA

50mA

4.5~5.5V

55¹⁾/70

90mA

44-TSOP2-F/R

1. The parameter is measured with 50pF test load.

FUNCTIONAL BLOCK DIAGRAM

PIN DESCRIPTION

I/O16

I/O15

I/O14

I/O13

Vss

Vcc

I/O12

I/O11

I/O10

I/O9

N.C

Clk gen.

Precharge circuit.

A13

A14

Vcc

Vss

I/OI

I/O2

I/O3

I/O4

Vcc

Vss

I/O5

I/O6

I/O7

I/O8

A17

A16

A15

A14

A13

I/OI

I/O2

I/O3

I/O4

Vcc

Vss

I/O5

I/O6

I/O7

I/O8

A17

A16

A15

A14

A13

I/O16

I/O15

I/O14

I/O13

Vss

Memory array

1024 rows

256´ 16 columns

A15

A16

A17

Row

select

44-TSOP2

Forward

44-TSOP2

Reverse

Vcc

I/O12

I/O11

I/O10

I/O9

N.C

A10

A11

Data

cont

I/O Circuit

Column select

I/O1~I/O8

A10

A11

A12

Data

cont

I/O9~I/O16

Data

cont

Name

Function

Chip Select Input

Output Enable Input

Write Enable Input

Address Inputs

Name

Vcc

Vss

Function

Power

A8 A9 A10 A5 A6 A7 A4 A12

Ground

Upper Byte(I/O9~16)

Lower Byte (I/O1~8)

No Connection

A0~A17

Control

logic

I/O1~I/O16 Data Inputs/Outputs

N.C

SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

PRODUCT LIST

Commercial Temperature Product(0~70°C)

Industrial Temperature Products(-40~85°C)

Part Name

Function

Part Name

Function

K6T4016C3C-TB55

K6T4016C3C-TB70

K6T4016C3C-RB55

44-TSOP2-F, 55ns, LL-pwr

44-TSOP2-F, 70ns, LL-pwr

44-TSOP2-R, 55ns, LL-pwr

44-TSOP2-R, 70ns, LL-pwr

K6T4016C3C-TF55

K6T4016C3C-TF70

K6T4016C3C-RF55

K6T4016C3C-RF70

44-TSOP2-F, 55ns, LL-pwr

44-TSOP2-F, 70ns, LL-pwr

44-TSOP2-R, 55ns, LL-pwr

44-TSOP2-R, 70ns, LL-pwr

FUNCTIONAL DESCRIPTION

X¹⁾

I/O1~8

High-Z

Dout

I/O9~16

High-Z

Dout

Mode

Power

Deselected

Standby

Active

Output Disabled

Lower Byte Read

Upper Byte Read

Word Read

X¹⁾

High-Z

Dout

X¹⁾

Din

High-Z

Din

Lower Byte Write

Upper Byte Write

Word Write

High-Z

Din

1. X means don¢t care. (Must be in low or high state)

ABSOLUTE MAXIMUM RATINGS¹⁾

Item

Symbol

Ratings

-0.5 to 7.0

-0.5 to7.0

1.0

Unit

Remark

Voltage on any pin relative to Vss

Voltage on Vcc supply relative to Vss

Power Dissipation

VIN,VOUT

VCC

Storage temperature

TSTG

-65 to 150

0 to 70

°C

K6T4016C3C-B

K6T4016C3C-F

Operating Temperature

-40 to 85

1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be

restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

RECOMMENDED DC OPERATING CONDITIONS¹⁾

Item

Symbol

Vcc

Min

4.5

Typ

Max

Unit

Supply voltage

Ground

5.0

5.5

Vss

Vcc+0.5²⁾

0.8

Input high voltage

Input low voltage

VIH

2.2

-0.5³⁾

VIL

Note:

1. Commercial Product : TA=0 to 70°C, otherwise specified

Industrial Product : TA=-40 to 85°C, otherwise specified

2. Overshoot : VCC+3.0V in case of pulse width £ 30ns

3. Undershoot : -3.0V in case of pulse width £ 30ns

4. Overshoot and undershoot are sampled, not 100% tested.

CAPACITANCE¹⁾(f=1MHz, TA=25°C)

Item

Input capacitance

Symbol

CIN

Test Condition

VIN=0V

Min

Max

Unit

Input/Output capacitance

CIO

VIO=0V

1. Capacitance is sampled, not 100% tested

DC AND OPERATING CHARACTERISTICS

Symbol

ILI

Min

-1

Typ

Max Unit

Item

Test Conditions

Input leakage current

Output leakage current

Operating power supply

VIN=Vss to Vcc

ILO

CS=VIH or OE=VIH or WE=VIL, VIO=Vss to Vcc

IIO=0mA, CS=VIL, VIN=VIL or VIH, Read

ICC

Cycle time=1ms, 100% duty, IIO=0mA, CS£0.2V, VIN£0.2V

or VIN³ Vcc-0.2V

ICC1

Average operating current

Cycle time=Min, 100% duty, IIO=0mA, CS=VIL, VIN=VIH or VIL

IOL=2.1mA

ICC2

VOL

VOH

ISB

0.4

Output low voltage

2.4

Output high voltage

Standby Current (TTL)

Standby Current(CMOS)

IOH=-1.0mA

CS=VIH, Other inputs=VIL or VIH

CS³ Vcc-0.2V, Other inputs=0~Vcc

20¹⁾

ISB1

1. Industrial Product = 50mA

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

AC OPERATING CONDITIONS

TEST CONDITIONS (Test Load and Test Input/Output Reference)

Input pulse level : 0.8 to 2.4V

Input rising and falling time : 5ns

Input and output reference voltage : 1.5V

Output load (See right) : CL=100pF+1TTL

50pF+1TTL¹⁾

1. Including scope and jig capacitance

1. for 55ns product

AC CHARACTERISTICS(K6T4016C3C Family : Vcc=4.5~5.5V, Commercial product : TA=0 to 70°C, Industrial product : TA=-40 to 85°C)

Speed Bins

Parameter List

Symbol

Units

55ns

70ns

Min

Max

Min

Max

Read cycle time

tRC

tAA

Address access time

Chip select to output

tCO

tOE

Output enable to valid output

Chip select to low-Z output

Output enable to low-Z output

LB, UB enable to low-Z output

Chip disable to high-Z output

OE disable to high-Z output

Output hold from address change

LB, UB valid to data output

UB, LB disable to high-Z output

Write cycle time

tLZ

tOLZ

tBLZ

tHZ

Read

tOHZ

tOH

tBA

tBHZ

tWC

tCW

tAS

Chip select to end of write

Address set-up time

Address valid to end of write

Write pulse width

tAW

tWP

tWR

tWHZ

tDW

tDH

Write

Write recovery time

Write to output high-Z

Data to write time overlap

Data hold from write time

End write to output low-Z

LB, UB valid to end of write

tOW

tBW

DATA RETENTION CHARACTERISTICS

Item

Vcc for data retention

Data retention current

Data retention set-up time

Recovery time

Symbol

VDR

Test Condition

CS³ Vcc-0.2V

Min

Typ

Max

Unit

2.0

5.5

15¹⁾

IDR

Vcc=3.0V

tSDR

See data retention waveform

tRDR

1. Industrial Product : 20mA

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

TIMMING DIAGRAMS

TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH, UB or/and LB=VIL)

tRC

Address

tAA

tOH

Data Valid

Data Out

Previous Data Valid

TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)

tRC

Address

tOH

tAA

tCO

tHZ

tBA

UB, LB

tBHZ

tOHZ

tOE

tOLZ

tBLZ

tLZ

Data out

High-Z

Data Valid

NOTES (READ CYCLE)

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage

levels.

2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device

interconnection.

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

TIMING WAVEFORM OF WRITE CYCLE(1) (WE Controlled)

tWC

Address

tCW(2)

tWR(4)

tAW

tBW

UB, LB

tWP(1)

tAS(3)

tDW

tDH

High-Z

Data in

Data Valid

tWHZ

tOW

Data Undefined

Data out

TIMING WAVEFORM OF WRITE CYCLE(2) (CS Controlled)

tWC

Address

tAS(3)

tCW(2)

tWR(4)

tAW

tBW

UB, LB

tWP(1)

tDW

tDH

Data Valid

Data in

Data out

High-Z

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

TIMING WAVEFORM OF WRITE CYCLE(3) (UB, LB Controlled)

tWC

Address

tCW(2)

tWR(4)

tAW

tBW

UB, LB

tAS(3)

tWP(1)

tDH

tDW

Data Valid

Data in

High-Z

Data out

High-Z

NOTES (WRITE CYCLE)

1. A write occurs during the overlap(tWP) of low CS and low WE. A write begins when CS goes low and WE goes low with asserting UB

or LB for single byte operation or simultaneously asserting UB and LB for double byte operation. A write ends at the earliest transi-

tion when CS goes high and WE goes high. The tWP is measured from the beginning of write to the end of write.

2. tCW is measured from the CS going low to end of write.

3. tAS is measured from the address valid to the beginning of write.

4. tWR is measured from the end or write to the address change. tWR applied in case a write ends as CS or WE going high.

DATA RETENTION WAVE FORM

CS controlled

Data Retention Mode

tSDR

tRDR

VCC

4.5V

2.2V

VDR

CS³ VCC - 0.2V

GND

Revision 1.0

April 1999

CMOS SRAM

K6T4016C3C Family

Units: millimeter(inch)

PACKAGE DIMENSIONS

44 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F)

0~8°

0.25

0.010

(

)

#44

#23

0.45 ~0.75

0.018 ~ 0.030

11.76±0.20

0.463±0.008

0.50

0.020

(

)

#22

1.00±0.10

0.039±0.004

18.81

0.741

1.20

0.047

MAX.

18.41±0.10

0.725±0.004

0.10

0.004

MAX

0.35±0.10

0.014±0.004

0.80

0.0315

0.805

0.032

(

)

0~8°

44 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400R)

0.25

0.010

(

)

#22

0.45 ~0.75

0.018 ~ 0.030

11.76±0.20

0.463±0.008

0.50

)

(

0.020

#44

#23

1.00±0.10

0.039±0.004

18.81

0.741

1.20

0.047

MAX.

18.41±0.10

0.725±0.004

0.10

0.004

MAX

0.35±0.10

0.014±0.004

0.80

0.0315

0.805

0.032

(

)

Revision 1.0

April 1999

K6T4016C3C-RF550 [SAMSUNG]

相关型号：

K6T4016C3C-RF70

K6T4016C3C-TB55

K6T4016C3C-TB550

K6T4016C3C-TB70

K6T4016C3C-TB700

K6T4016C3C-TF55

K6T4016C3C-TF70

K6T4016C3C-TF700

K6T4016C3C-TF70T

K6T4016S3C-RF100

K6T4016S3C-RF12

K6T4016S3C-RF120