BU99901GUZ-W_12_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

WLCSP EEPROM

BU99901GUZ-W (32Kbit)

●General Description

BU99901GUZ-W series is a serial EEPROM of I²C BUS interface method.

●Features

Completely conforming to the world standard I²C BUS.

All controls available by 2 ports of serial clock (SCL) and serial data (SDA)

Other devices than EEPROM can be connected to the same port, saving microcontroller port.

1.7V to 3.6V single power source action most suitable for battery use.

FAST MODE :400kHz at 1.7V to 3.6V

Page write mode useful for initial value write at factory shipment.

Auto erase and auto end function at data rewrite.

Low current consumption

¾

At write operation (3.3V)

At read operation (3.6V)

At standby operation (3.6V)

: 0.6mA (Typ.)

: 0.1µA (Typ.)

Write mistake prevention function

¾

Write (write protect) function added

Write mistake prevention function at low voltage

Compact package

¾

W(Typ.) x D(Typ.) x H(Max.)

: 1.76mm x 1.05mm x 0.35mm

Data rewrite up to 100,000 times

Data kept for 40 years

Noise filter built in SCL / SDA terminal

Shipment data all address FFh

●Page write

Product number

Number of pages

BU99901GUZ-W

32Byte

●Absolute Maximum Ratings (Ta=25℃)

Remarks

Parameter

symbol

Ratings

Unit

V

Impressed voltage

V_CC

Pd

-0.3 to +6.5

When using at Ta=25℃ or higher 2.2mW to be reduced per 1℃.

Permissible dissipation

Storage temperature range

Action temperature range

Terminal voltage

220

mW

℃

Tstg

Topr

－

-65 to +125

-40 to +85

-0.3 to Vcc+1.0 ^*1

℃

V

*1

The Max value of Terminal Voltage is not over 6.5V.

●Memory cell characteristics (Ta=25℃, Vcc=1.7V to 3.6V)

Limits

Typ.

Parameter

Unit

Min.

Max.

Number of data rewrite times ^*1

Data hold years ^*1

100,000

－

Times

Years

40

－

*1 Not 100% TESTED

●Recommended Operating Ratings

Parameter

Symbol

Rating

Unit

V

Write(Ta=-40℃ to 85℃)

Write(Ta=-40℃ to 70℃)

Read(Ta=-40℃ to 85℃)

2.7 to 3.3

1.8 to 3.3

1.7 to 3.6

0 to Vcc

Supply Voltage

Input Voltage

Vcc

V_IN

V

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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BU99901GUZ-W (32Kbit)

●Electrical characteristics (Unless otherwise specified Ta=-40℃ to 85℃､V_CC=1.7V to 3.6V)

Limits

Parameter

Symbol

Unit

Condition

Min

0.7Vcc

-0.3

0.8Vcc

-0.3

0.9Vcc

-0.3

－

Typ.

－

Max.

Vcc+1.0

0.3Vcc

Vcc+1.0

0.2Vcc

Vcc+1.0

0.1Vcc

0.4

"H" Input Voltage1

"L" Input Voltage1

"H" Input Voltage2

"L" Input Voltage2

"H" Input Voltage3

"L" Input Voltage3

"L" Output Voltage1

"L" Output Voltage2

Input Leakage Current

Pull Up Resistance

Output Leakage Current

V_IH1

V_IL1

V_IH2

V_IL2

V_IH3

V_IL3

V_OL1

V_OL2

I_LI

V

2.5V≦Vcc≦3.6V

－

2.5V≦Vcc≦3.6V

1.8V≦Vcc＜2.5V

1.7V≦Vcc＜1.8V

－

I_OL=3.0mA , 2.5V≦Vcc≦3.6V (SDA)

I_OL=0.7mA , 1.7V≦Vcc＜2.5V (SDA)

－

0.2

-1

1

µA V_IN=0 to Vcc (WP, TEST)

I_LI2

6

14

kΩ (SCL,SDA)

I_LO

-1

1

µA V_OUT=0 to Vcc (SDA)

Vcc=3.3V , f_SCL=400kHz, tWR=5ms

Byte Write, Page Write

Vcc=3.6V , f_SCL=400kHz

Random read, Current read, Sequential read

I_CC1

－

4.1

Current consumption

at action

mA

I_CC2

I_SB

－

1.7

2.0

Standby Current

µA Vcc=3.6V, SDA ,SCL=Vcc, WP=GND

●Action timing characteristics (Unless otherwise specified Ta=-40℃ to 85℃､V_CC=1.7V to 3.6V)

FAST-MODE

2.5V≦Vcc≦3.6V

STANDARD-MODE

1.7V≦Vcc≦3.6V

Min. Max.

Parameter

Symbol

Unit

Min.

Typ.

－

Max.

Typ.

－

SCL Frequency

fSCL

tHIGH

tLOW

tR

－

0.6

1.2

－

400

－

0.3

－

0.9

－

5

－

4.0

4.7

－

100

－

1.0

0.3

－

3.5

－

5

kHz

µs

ns

µs

ms

Data clock "High" time

Data clock "Low" time

*1

SDA, SCL rise time

SDA, SCL fall time

*1

tF

－

Start condition hold time

Start condition setup time

Input data hold time

tHD:STA

tSU:STA

tHD:DAT

tSU:DAT

tPD

0.6

0

4.0

4.7

0

Input data setup time

100

0.1

0.6

1.2

－

250

0.2

4.7

－

Output data delay time

Output data hold time

tDH

Stop condition data setup time

Bus release time before transfer start

Internal write cycle time

tSU:STO

tBUF

tWR

Noise removal valid period

(SDA,SCL terminal)

tI

－

0.1

－

0.1

µs

WP hold time

WP setup time

tHD:WP

tSU:WP

0

－

0

－

ns

µs

0.1

1.0

0.1

1.0

WP valid time

tHIGH:WP

*1 Not 100% tested

●FAST-MODE and STANDARD-MODE

FAST-MODE and STANDARD-MODE are of same actions, and mode is changed. They are distinguished by action speeds.

100kHz action is called STANDARD-MODE, and 400kHz action is called FAST-MODE. This action frequency is the

maximum action frequency, so 100kHz clock may be used in FAST-MODE. When power source voltage goes down, action

at high speed is not carried out, therefore, at Vcc=2.5V to 5.5V, 400kHz, namely, action is made in FASTMODE. (Action is

made also in STANDARD-MODE) Vcc=1.8V to 2.5V is only action in 100kHz STANDARD-MODE.

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●Sync Data Input / Output Timing

tR

tF

tHIGH

SCL

DATA(1)

(Input)

DATA(n)

tSU :DAT

tLOW

tHD :STA

tBUF

tHD :DAT

SDA

WP

D1

D0 ACK

ACK

SDA

WR

t

tPD

tDH

Stop condition

SDA

(Output)

HD WP

ｔ

：

tSU WP

：

○Input read at the rise edge of SCL

○Data output in sync with the fall of SCL

Figure 1-(a). Sync data input / output timing

Figure 1-(d). WP timing at write execution

SCL

SDA

SCL

SDA

DATA(n)

DATA(1)

D1 D0 ACK

tSU:STA

tHD:STA

tSU:STO

ACK

tWR

tHIGH:WP

WP

START BIT

STOP BIT

○At write execution, in the area from the D0 taken clock rise of the first

DATA(1), to tWR, set WP=“LOW”.

Figure 1-(b). Start - stop bit timing

○By setting WP “HIGH” in the area, write can be cancelled.

When it is set WP=“HIGH” during tWR, write is forcibly ended, and data of

address under access is not guaranteed, therefore write it once again.

Figure 1-(e). WP timing at write cancels

SCL

SDA

D0

ACK

WRITE DATA(n)

tWR

STOP

START

CONDITION

Figure 1-(c). Write cycle timing

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BU99901GUZ-W (32Kbit)

●Block Diagram

Vcc

32Kbit EEPROM array

8bit

12bit

Adddress

decoder

Data

register

Slave - word

address register

12bit

WP

START

Control circuit

STOP

TEST

SCL

SDA

ACK

High voltage

generating circuit

Power source

voltage detection

GND

TEST terminal, please connect GND

●Pin Configuration

(BOTTOM VIEW)

B2

B

A

B3

B1

V_CC

TEST

GND

A3

A1

A2

WP

SDA

SCL

3

2

1

●Pin Descriptions

Land No.

B3

Terminal name Input / output

Unit

V_CC

GND

TEST

WP

－

Power Supply

B2

－

Reference voltage of all input / output

TEST terminal, Connect GND

Write protect terminal

B1

Input

A3

A2

SCL

SDA

Serial clock input

A1

Input /output Slave and word address, Serial data input serial data output

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●Typical Performance Curves

(The following values are Typ. ones.)

Figure 2. H input voltage V_IH1,2

Figure 3. L input voltage V_IL

(SCL,SDA,WP)

Figure 4. L output voltage V_OL-I_OL

(V_CC=1.7V)

Figure 5. L output voltage

(V_CC=2.5V)

V_OL-I_OL

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●Typical Performance Curves‐Continued

Figure 7. Output leak current

Figure 6. Input leak current I_LI(SCL,WP)

Figure 8. Current consumption at WRITE operation Icc1

(fSCL=400kHz)

Figure 9. Current consumption at READ operation Icc2

(fSCL=400kHz)

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●Typical Performance Curves‐Continued

Figure 10. Current consumption at WRITE operation Icc1

Figure 11. Current consumption at READ operation Icc2

(fSCL=100kHz)

Figure 13. SCL frequency fSCL

Figure 12. Standby current ISB

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●Typical Performance Curves‐Continued

Figure 15. Data clock Low Period tLOW

Figure 14. Data clock High Period tHIGH

Figure 17. Start Condition Setup Time t_{SU STA}

:

Figure 16. Start Condition Hold Time t_{HD STA}

:

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●Typical Performance Curves‐Continued

Figure 19. Input Data Hold Time tHD:DAT(LOW)

Figure 18. Input Data Hold Time tHD:DAT(HIGH)

Figure 21. Input Data Setup Time tSU:DAT(LOW)

Figure 20. Input Data Setup Time tSU:DAT(HIGH)

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●Typical Performance Curves‐Continued

Figure 23. Data output delay time tPD1

Figure 22. Data output delay time tPD0

Figure 24. BUS open time before transmission tBUF

Figure 25. Internal writing cycle time tWR

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●Typical Performance Curves‐Continued

Figure 27. Noise reduction efection time tI(SCL L)

Figure 26. Noise reduction efection time tI(SCL H)

Figure 29. Noise reduction efection time tI(SDA L)

Figure 28. Noise reduction efection time tI(SDA H)

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●Typical Performance Curves‐Continued

Figure 31. WP efective time tHIGH:WP

Figure 30. WP setup time tSU:WP

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BU99901GUZ-W (32Kbit)

●I²C BUS communication

○I²C BUS data communication

I²C BUS data communication starts by start condition input, and ends by stop condition input. Data is always 8bit long,

and acknowledge is always required after each byte.

I²C BUS carries out data transmission with plural devices connected by 2 communication lines of serial data (SDA) and

serial clock (SCL).

Among devices, there are “master” that generates clock and control communication start and end, and “slave” that is

controlled by addresses peculiar to devices.

EEPROM becomes “slave”. And the device that outputs data to bus during data communication is called “transmitter”,

and the device that receives data is called “receiver”.

SDA

1-7

8

9

8

9

8

9

SCL

S

P

START ADDRESS R/W

condition

ACK

DATA

ACK

DATA

ACK

STOP

condition

Figure 32. Data transfer timing

○Start condition (start bit recognition)

・Before executing each command, start condition (start bit) where SDA goes from 'HIGH' down to 'LOW' when SCL

is 'HIGH' is necessary.

・This IC always detects whether SDA and SCL are in start condition (start bit) or not, therefore, unless this condition is

satisfied, any command is executed.

○Stop condition (stop bit recognition)

・Each command can be ended by SDA rising from 'LOW' to 'HIGH' when stop condition (stop bit), namely, SCL is 'HIGH'

○Acknowledge (ACK) signal

・This acknowledge (ACK) signal is a software rule to show whether data transfer has been made normally or not. In

master and slave, the device (µ-COM at slave address input of write command, read command, and this IC at data

output of read command) at the transmitter (sending) side releases the bus after output of 8bit data.

・The device (this IC at slave address input of write command, read command, and µ-COM at data output of read

command) at the receiver (receiving) side sets SDA 'LOW' during 9 clock cycles, and outputs acknowledge signal (ACK

signal) showing that it has received the 8bit data.

・This IC, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ACK signal) 'LOW'.

・Each write action outputs acknowledge signal) (ACK signal) 'LOW', at receiving 8bit data (word address and write data).

・Each read action outputs 8bit data (read data), and detects acknowledge signal (ACK signal) 'LOW'.

・When acknowledge signal (ACK signal) is detected, and stop condition is not sent from the master (µ-COM) side, this

IC continues data output. When acknowledge signal (ACK signal) is not detected, this IC stops data transfer, and

recognizes stop condition (stop bit), and ends read action. And this IC gets in standby status.

○Device addressing

・Output slave address after start condition from master.

・The significant 4 bits of slave address are used for recognizing a device type.

The device code of this IC is fixed to '1010'.

・The most insignificant bit (エラー! 編集中のフィールドコードからは、オブジェクトを作成できません。---エラー! 編

集中のフィールドコードからは、オブジェクトを作成できません。) of slave address is used for designating write or

read action, and is as shown below.

Setting エラー! 編集中のフィールドコードからは、オブジェクトを作成できません。 to 0 --- write (setting 0 to word

address setting of random read)

Setting エラー! 編集中のフィールドコードからは、オブジェクトを作成できません。 to 1 --- read

Type

Slave address

0

集中のフィールドコードからは、オブジェクトを作成できません。

1

0

エラー! 編

BU99901GUZ-W

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●Write Command

○Write cycle

・Arbitrary data is written to EEPROM. When to write only 1 byte, byte write normally used, and when to write continuous

data of 2 bytes or more, simultaneous write is possible by page write cycle. The maximum number of write bytes is

specified per device of each capacity.

Up to 32 arbitrary bytes can be written.

S

T

A

R

T

W

R

I

T

E

S

T

O

P

SLAVE

ADDRESS

1st WORD

ADDRESS

2nd WORD

ADDRESS

DATA

SDA

LINE

＊

WA

11

WA

0

1

0

1

0

D7

D0

A

C

K

A

C

K

A

C

K

R

/

W

A

C

K

Figure 33. Byte write cycle

S

T

A

R

T

W

R

I

T

E

S

T

O

P

SLAVE

ADDRESS

1st W ORD

ADDRESS(n)

2nd W ORD

ADDRESS(n)

DATA(n)

DATA(n+31)

SDA

LINE

＊

W A

11

W A

1

0

1

0

D7

D0

0

A

C

K

R

/

W K

A

C

A

C

K

A

C

K

A

C

K

Figure 34. Page write cycle

・Data is written to the address designated by word address (n-th address).

・By issuing stop bit after 8bit data input, write to memory cell inside starts.

・When internal write is started, command is not accepted for tWR (5ms at maximum).

・By page write cycle, the following can be written in bulk: Up to 32 bytes.

(Refer to "Internal address increment in Page 15.)

・As for page write command of BU99901GUZ-W, after page select bit(PS) of slave address is designated arbitrarily, by

continuing data input of 2 bytes or more, the address of insignificant 4 bits is incremented internally, and data up to

16 bytes can be written.

・As for page write cycle of BU99901GUZ-W , after the significant 7 bits of word address, are designated arbitrarily, by

continuing data input of 2 bytes or more, the address of insignificant 5 bits is incremented internally, and data up to 32

bytes can be written.

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BU99901GUZ-W (32Kbit)

○Notes on write cycle continuous input

At STOP (stop bit)

write starts.

S

T

A

R

T

W

R

I

T

E

S

T

A

R

T

S

T

O

P

SLAVE

ADDRESS

WORD

ADDRESS (n)

DATA (n)

DATA (n+31)

SDA

LINE

WA

1

0

1

0

P2 P0

P1

D7

D0

1 0 1 0

7

0

R A

/ C

W K

A

C

K

A

C

K

A

C

K

Next command

tWR (maximum :5ms)

Command is not accepted for this period.

Figure 35. Page write cycle

○Internal address increment

Page write mode

○Notes on page write cycle

List of numbers of page write

WA11 ----- WA5 WA4 WA3 WA2 WA1 WA0

0

-----

0

1

0

1

0

Number of pages

32Byte

increment

Product number BU99901GUZ-W

The above numbers are maximum bytes for respective types.

Any bytes below these can be written.

0

-----

0

1

0

1

0

1

0

1

0

1

0

IEh

In the case of BU99901GUZ-W, 1 page = 32bytes,

but the page write cycle write time is 5ms at maximum

for 32byte bulk write.

It does not stand 5ms at maximum × 32byte = 160ms(Max.).

Significant bit is fixed.

No digit up

For example, when it is started from address 1Eh,

therefore, increment is made as below,

1Eh→1Fh→00h→01h･･･, which please note.

* 1Eh･･･16 in hexadecimal,

therefore, 00011110 becomes a binary number.

○Write protect (WP) terminal

・Write protect (WP) function

When WP terminal is set Vcc (H level), data rewrite of all address is prohibited. When it is set GND (L level),

data rewrite of all address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level.

Do not use it open.

At extremely low voltage at power ON/OFF, by setting the WP terminal 'H', mistake write can be prevented.

During tWR, set the WP terminal always to 'L'. If it is set 'H', write is forcibly terminated

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BU99901GUZ-W (32Kbit)

●Read Command

○Read cycle

Data of EEPROM is read. In read cycle, there are random read cycle and current read cycle.

Random read cycle is a command to read data by designating address, and is used generally.

Current read cycle is a command to read data of internal address register without designating address, and is used when

to verify just after write cycle. In both the read cycles, sequential read cycle is available, and the next address data can

be read in succession.

S

T

A

R

T

W

R

I

T

E

S

T

A

R

T

R

E

A

D

S

T

O

P

It is necessary to input 'H'

to the last ACK.

SLAVE

ADDRESS

1st WORD

ADDRESS(n)

2nd WORD

ADDRESS(n)

SLAVE

ADDRESS

DATA(n)

SDA

LINE

WA

＊

＊WA

11

1

0

1 0

0

1

0

1

0

A1A0

D7

D0

A2

0

R

/

A

C

A

C

K

A

C

K

R

A

C

A

C

K

/

W K

Figure 36. Random read cycle

S

R

E

A

D

S

T

O

T

A

R

T

It is necessary to input 'H'

to the last ACK.

SLAVE

ADDRESS

DATA(n)

P

SDA

LINE

1

0

1

0

D7

D0

A

C

K

R

/

W

A

C

K

Figure 37. Current read cycle

S

T

A

R

T

R

E

A

D

S

T

O

P

SLAVE

ADDRESS

DATA(n)

DATA(n+x)

SDA

LINE

0

0 0

1

0

1

0

D7

D0

D7

D0

R

/

W

A

C

K

A

C

K

A

C

K

A

C

K

Figure 38. Sequential read cycle (in the case of current read cycle)

・In random read cycle, data of designated word address can be read.

・When the command just before current read cycle is random read cycle, current read cycle (each including sequential

read cycle), data of incremented last read address (n)-th address, i.e., data of the (n+1)-th address is output.

・When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (µ-COM) side, the next

address data can be read in succession.

・Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal is started at SCL

signal 'H'.

・When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.

Therefore, read command cycle cannot be ended. When to end read command cycle, be sure input stop condition to

input 'H' to ACK signal after D0, and to start SDA at SCL signal 'H'.

・Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is started at SCL

signal 'H'.

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BU99901GUZ-W (32Kbit)

●Software reset

Software reset is executed when to avoid malfunction after power on, and to reset during command input. Software reset

has several kinds, and 3 kids of them are shown in the figure below. (Refer to Figure 39(a), Figure 39(b), Figure 39(c).) In

dummy clock input area, release the SDA bus ('H' by pull up). In dummy clock area, ACK output and read data '0' (both 'L'

level) may be output from EEPROM, therefore, if 'H' is input forcibly, output may conflict and over current may flow, leading

to instantaneous power failure of system power source or influence upon devices.

Dummy clock×14

13

Start×2

SCL

SDA

Normal command

2

14

1

Figure 39-(a). The case of 14 Dummy clock + START + START+ command input

Start

Dummy clock×9

2

Start

SCL

SDA

Normal command

1

8

9

Figure 39-(b). The case of START+9 Dummy clock + START + command input

Start×9

SCL

SDA

1

2

3

7

8

9

Normal command

Figure 39-(c). START × 9 + command input

* Start command from START input.

●Acknowledge polling

During internal write, all input commands are ignored, therefore ACK is not sent back. During internal automatic write

execution after write cycle input, next command (slave address) is sent, and if the first ACK signal sends back 'L', then it

means end of write action, while if it sends back 'H', it means now in writing. By use of acknowledge polling, next command

can be executed without waiting for tWR = 5ms.

When to write continuously, エラー! 編集中のフィールドコードからは、オブジェクトを作成できません。= 0, when to

carry out current read cycle after write, slave address エラー! 編集中のフィールドコードからは、オブジェクトを作成で

きません。= 1 is sent, and if ACK signal sends back 'L', then execute word address input and data so forth.

During internal write,

First write command

ACK = HIGH is sent back.

S

T

A

R

T

S

T

A

R

T

S

T

A

R

T

A

C

K

H

Slave

address

A

C

K

H

S

T

O

P

Slave

Write command

…

address

t_WR

Second write command

S

T

A

R

T

S

T

A

R

T

A

C

K

L

A

S

T

O

P

A

C

K

L

Slave

Word

Slave

C

K

L

C

…

Data

K

H

address

t_WR

After completion of internal

write, ACK=LOW is sent back,

so input next word address and

data in succession.

Figure 40. Case to continuously write by acknowledge polling

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BU99901GUZ-W (32Kbit)

●WP valid timing (write cancel)

WP is usually fixed to 'H' or 'L', but when WP is used to cancel write cycle and so forth, pay attention to the following WP

valid timing. During write cycle execution, in cancel valid area, by setting WP='H', write cycle can be cancelled. In both byte

write cycle and page write cycle, the area from the first start condition of command to the rise of clock to taken in D0 of

data(in page write cycle, the first byte data) is cancel invalid area.

WP input in this area becomes Don't care. Set the setup time to rise of D0 taken 100ns or more. The area from the rise of

SCL to take in D0 to the end of internal automatic write (tWR) is cancel valid area. And, when it is set WP='H' during tWR,

write is ended forcibly, data of address under access is not guaranteed, therefore, write it once again.(Refer to Figure 41.)

After execution of forced end by WP standby status gets in, so there is no need to wait for tWR (5ms at maximum).

・Rise of D0 taken clock

SCL

SDA

SCL

SDA

・Rise of SDA

D1

D0

ACK

D0

Enlarged view

S

A

C

K

L

A

C

K

L

S

T

O

P

tWR

T

A

R

T

Slave

Word

SDA

WP

C

K

L

C

K

L

Data

D7 D6 D5

D2 D1 D0

D4 D3

address

WP cancel invalid area

Write forced end

Data not guaranteed

WP cancel valid area

Data is not written.

Figure 41. WP valid timing

●Command cancel by start condition and stop condition

During command input, by continuously inputting start condition and stop condition, command can be cancelled.

(Refer to Figure 42.)

However, in ACK output area and during data read, SDA bus may output 'L', and in this case, start condition and stop

condition cannot be input, so reset is not available. Therefore, execute software reset. And when command is cancelled by

start, stop condition, during random read cycle, sequential read cycle, or current read cycle, internal setting address is not

determined, therefore, it is not possible to carry out current read cycle in succession. When to carry out read cycle in

succession, carry out random read cycle.

SCL

SDA

1

0

1

0

Start condition

Stop condition

Figure 42. Case of cancel by start, stop condition during slave address input

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BU99901GUZ-W (32Kbit)

●Cautions on microcontroller connection

○Rs

In I²C BUS, it is recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of

tri state to SDA port, insert a series resistance Rs between the pull up resistance Rpu and the SDA terminal of EEPROM.

This is controls over current that occurs when PMOS of the microcontroller and NMOS of EEPROM are turned ON

simultaneously. Rs also plays the role of protection of SDA terminal against surge. Therefore, even when SDA port is

open drain input/output, Rs can be used.

ACK

SCL

R^S

SDA

'H' output of microcontroller

'L' output of EEPROM

EEPROM

Over current flows to SDA line by 'H' output of microcontroller

and 'L' output of EEPROM.

Microcontroller

Figure 43. I/O circuit diagram

Figure 44. Input/output collision timing

○Maximum value of Rs

The maximum value of Rs is determined by following relations.

(1) SDA rise time to be determined by the capacity (CBUS) of bus line of Rpu and SDA shoulder be tR or below.

And AC timing should be satisfied even when SDA rise time is late.

A

(2) The bus electric potential ○ to be determined by Rpu and Rs the moment when EEPROM outputs 'L' to SDA bus

should sufficiently secure the input 'L' level (V_IL) of microcontroller including recommended noise margin 0.1Vcc.

VCC

(V

CC

V

)×R

OL S

－

≦

V

IL

+

V

+0.1V

OL

CC

A

RPU=10ｋΩ

RPU+RS

R^S

IOL

VOL

V

0.1V

－

CC

－

IL

OL

R

×

R

PU

∴

≦

S

－

1.1V

V

IL

CC

ꢀ

Example When VCC=3V, VIL=0.3VCC, VOL=0.4V, RPU=10kΩ,

）

Bus line

capacity CBUS

VIL

EEPROM

Microcontroller

0.3×3 0.4 0.1×3

－

10×10³

from(2),

R

×

≦

S

－

1.1×3 0.3×3

Figure 45. I/O circuit diagram

［

］

0.835 kΩ

○Maximum value of Rs

The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source

line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the

following relation must be satisfied. Determine the allowable current in consideration of impedance of power source line

in set and so forth. Set the over current to EEPROM 10mA or below.

CC

V

≦

≧

I

R_PU=10Ω

S

R

'L' output

R_S

CC

V

S

∴ R

I

Over current I

CC

Example）When V =3V, I=10mA

'H' output

3

S

R

≧

10×10^-3

EEPROM

Microcontroller

300［Ω］

Figure 46. I/O circuit diagram

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BU99901GUZ-W (32Kbit)

●I²C BUS input / output circuit

○Input (SCL, SDA)

Figure 47. Input pin circuit diagram

○Input/Output (SDA)

VDD

Figure 48. Input /output pin circuit diagram

●Notes on power ON

At power on, in IC internal circuit and set, Vcc rises through unstable low voltage area, and IC inside is not completely reset,

and malfunction may occur. To prevent this, functions of POR circuit and LVCC circuit are equipped. To assure the action,

observe the following condition at power on.

1. Set SDA = 'H' and SCL ='L' or 'H'

2. Start power source so as to satisfy the recommended conditions of tR, tOFF, and Vbot for operating POR circuit.

tR

Recommended conditions of tR,tOFF,Vbot

VCC

tR

tOFF

Vbot

10ms or below

10ms or longer

0.3V or below

0.2V or below

tOFF

Vbot

100ms or below 10ms or longer

0

Figure 49. Rise waveform diagram

3. Set SDA and SCL so as not to become 'Hi-Z'.

When the above conditions 1 and 2 cannot be observed, take the following countermeasures.

a) In the case when the above conditions 1 cannot be observed. When SDA becomes 'L' at power on.

→Control SCL and SDA as shown below, to make SCL and SDA, 'H' and 'H'.

VCC

tLOW

SCL

SDA

After Vcc becomes stable

After Vcc becomes stab le

tDH tSU:DAT

tSU:DAT

Figure 51. When SCL='H' and SDA='L'

Figure 50. When SCL='H' and SDA='L'

b) In the case when the above condition 2 cannot be observed.

→After power source becomes stable, execute software reset(Page17).

c) In the case when the above conditions 1 and 2 cannot be observed.

→Carry out a), and then carry out b).

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BU99901GUZ-W (32Kbit)

●Low voltage malfunction prevention function

LVCC circuit prevents data rewrite action at low power, and prevents wrong write.

At LVCC voltage (Typ. =1.2V) or below, it prevent data rewrite.

●Vcc noise countermeasures

○Bypass capacitor

When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is

recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that moment, attach it as close to IC as

possible. And, it is also recommended to attach a bypass capacitor between board Vcc and GND.

●Notes for use

(1) Described numeric values and data are design representative values, and the values are not guaranteed.

(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further

sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in

consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI.

(3) Absolute maximum ratings

If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, LSI

may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear

exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that

conditions exceeding the absolute maximum ratings should not be impressed to LSI.

(4) GND electric potential

Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is lower than that of

GND terminal.

(5) Terminal design

In consideration of permissible loss in actual use condition, carry out heat design with sufficient margin.

(6) Terminal to terminal shortcircuit and wrong packaging

When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may

destruct LSI. And in the case of shortcircuit between LSI terminals and terminals and power source, terminal and GND

owing to foreign matter, LSI may be destructed.

(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently.

Status of this document

The Japanese version of this document is formal specification. A customer may use this translation version only for a reference

to help reading the formal version.

If there are any differences in translation version of this document formal version takes priority.

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BU99901GUZ-W (32Kbit)

●Ordering Information

B U 9 9 9 0 1 G U Z - W

E 2

Package

Packaging and forming specification

E2: Embossed tape and reel

Part Number

GUZ: VCSP30L1(BU99901GUZ-W)

●Physical Dimension Tape and Reel Information

VCSP30L1(BU99901GUZ-W)

1PIN MARK

1.76±0.05

S

0.06 S

φ

6- 0.25±0.05

0.05

A B

A

B

A

1

2

3

0.38±0.05

P=0.5×2

(Unit : mm)

Tape

Embossed carrier tape (heat sealing method)

3000pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

●Marking Diagram

VCSP30L1(BU99901GUZ-W)

(TOP VIEW)

1PIN MARK

Part Number Marking

LOT Number

9 9 0 1

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BU99901GUZ-W (32Kbit)

●Revision History

Date

Revision

001

Changes

4.Sep.2012

New Release

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Notice

●General Precaution

1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.

ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any

ROHM’s Products against warning, caution or note contained in this document.

2) All information contained in this document is current as of the issuing date and subject to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales

representative.

●Precaution on using ROHM Products

1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

2) ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3) Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4) The Products are not subject to radiation-proof design.

5) Please verify and confirm characteristics of the final or mounted products in using the Products.

6) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8) Confirm that operation temperature is within the specified range described in the product specification.

9) ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Notice - Rev.003

Daattaasshheeeett

●Precaution for Mounting / Circuit board design

1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

●Precautions Regarding Application Examples and External Circuits

1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2) You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

●Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

●Precaution for Storage / Transportation

1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3) Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4) Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

●Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

●Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

●Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

●Precaution Regarding Intellectual Property Rights

1) All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

2) No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the information contained in this document.

Notice - Rev.003

Daattaasshheeeett

●Other Precaution

1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

2) This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

3) The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

4) In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

5) The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - Rev.003


型号：	BU99901GUZ-W_12
厂家：	ROHM
描述：	Serial EEPROM Series Standard EEPROM WLCSP EEPROM 串行EEPROM系列标准EEPROM WLCSP封装的EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总26页 (文件大小：711K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BU99901GUZ-W_12 [ROHM]

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