BU2090FS-TL [ROHM]

SIPO Based Peripheral Driver, 0.025A, PDSO16, SSOP-16;
BU2090FS-TL
型号: BU2090FS-TL
厂家: ROHM    ROHM
描述:

SIPO Based Peripheral Driver, 0.025A, PDSO16, SSOP-16

外围驱动器 驱动程序和接口 接口集成电路 光电二极管
文件: 总12页 (文件大小:141K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
12-bit, serial IN, parallel OUT driver  
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
The BU2090, BU2090F, BU2090FS, BU2092, BU2092F, and BU2092FV are 12-bit serial input, parallel output  
drivers.  
For the BU2090 / F / FS, data input is shifted to the 12-bit internal shift register on the rising edge of a clock pulse.  
On the falling edge of the pulse, if the DATA pin is HIGH, the data in the shift register is output in parallel to Q0 to  
Q11.  
For the BU2092 / F / FV, shift data read at the rising edge of CLOCK is output in parallel to Q0 to Q11 at the rising  
edge of LCK. These ICs also have an OE pin, which when HIGH, forces data to be output, regardless of the shift  
data state.  
Applications  
Radio cassette players, telephones, compact audio systems, car stereos, and others  
Features  
1) Low power dissipation.  
5) Diverse variety of packages.  
BU2090 / F / FS: DIP16, SOP16, SSOP-A16  
BU2092 / F / FV: DIP18, SOP18, SSOP-A18  
(plastic molds)  
2) Operating voltages ranging from 2.7 to 5.5V.  
3) Output is Nch open drain.  
4) High output withstand voltage of + 25V.  
6) High drive capability; direct lighting of green LED  
possible.  
1
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Absolute maximum ratings (Ta = 25°C)  
(BU2090 / F / FS, BU2092 / F / FV)  
Parameter  
Symbol  
Limits  
Unit  
Power supply voltage  
VDD  
– 0.3 ~ + 7.0  
V
1
1000 (DIP), 300 (SOP), 500 (SSOP)  
1050 (DIP), 450 (SOP), 400 (SSOP)  
BU2090 / F / FS  
Power  
dissipation  
Pd  
mW  
1
BU2092 / F / FV  
BU2090 / F / FS  
BU2092 / F / FV  
3
500 (SOP) 2, 650 (SSOP)  
Power  
dissipation  
Pd  
mW  
4
500 (SOP) 2, 650 (SSOP)  
Operating temperature  
Storage temperature  
Input voltage  
Topr  
Tstg  
VIN  
– 25 ~ + 75  
– 55 ~ + 125  
°C  
°C  
V
VSS – 0.3 ~ VDD + 0.3  
VSS ~ 25.0  
Output voltage  
VO  
V
1 Unmounted  
2 When mounted on a glass epoxy board of 50mm × 50mm × 1.6mm  
3 When mounted on a glass epoxy board of 90mm × 50mm × 1.6mm  
4 When mounted on a glass epoxy board of 70mm × 70mm × 1.6mm  
Recommended operating conditions  
Parameter  
Symbol  
VDD  
Limits  
Unit  
V
Power supply voltage  
2.7 ~ 5.5  
2
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Block diagram  
BU2090 / F / FS  
BU2092 / F  
1
2
VSS  
18  
Control circuit  
12-bit shift register  
12-bit storage register  
VDD  
OE  
16  
15  
14  
13  
VDD  
Q11  
Q10  
Q9  
1
2
3
4
VSS  
DATA  
CLOCK  
Q0  
Control circuit  
12-bit shift register  
Latch  
DATA  
17  
16  
15  
14  
3
4
5
CLOCK  
LCK  
Q0  
Q11  
Q10  
Q9  
1
Output buffer  
(open drain)  
Output buffer  
(open drain)  
12  
11  
Q8  
5
6
Q1  
6
7
13  
12  
Q1  
Q8  
Q7  
Q7  
Q2  
Q2  
10  
9
Q6  
7
8
Q3  
8
9
Q3  
11  
10  
Q6  
Q5  
Q5  
Q4  
Q4  
BU2092FV  
1
2
VSS  
20  
Control circuit  
12-bit shift register  
VDD  
OE  
DATA  
19  
18  
17  
16  
3
4
5
CLOCK  
LCK  
Q0  
Q11  
Q10  
Q9  
12-bit storage register  
Output buffer (open drain)  
6
7
15  
14  
Q1  
Q8  
Q7  
Q2  
8
9
Q3  
13  
12  
N.C.  
N.C.  
Q6  
Q4  
11  
10  
Q5  
3
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Pin descriptions  
Pin No.  
BU2090 / F / FS BU2092 / F BU2092 / FV  
Pin name  
Function  
1
2
1
2
1
2
VSS  
DATA  
CLOCK  
LCK  
Q0  
GND  
Serial data input  
3
3
3
Data shift clock input  
Data latch clock input  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Not connected  
4
4
4
5
5
5
6
6
Q1  
6
7
7
Q2  
7
8
8
Q3  
8
9
9
Q4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Q5  
10  
11  
12  
13  
14  
15  
16  
Q6  
N.C.  
N.C.  
Q7  
Not connected  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Parallel data output  
Output Enable  
Q8  
Q9  
Q10  
Q11  
OE  
VDD  
Power supply  
4
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Electrical characteristics (Ta = 25°C)  
DC characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V)  
Parameter  
Symbol  
Min.  
3.5  
2.5  
Typ.  
Max.  
Unit  
V
VDD  
5
Conditions  
Input high level voltage  
VIH  
3
1.5  
5
Input low level voltage  
Output low level voltage  
VIL  
V
V
0.4  
3
2.0  
5
IOL = 20mA  
VOL  
1.0  
3
IOL = 5mA  
IOZH  
IOZL  
10.0  
– 5.0  
5.0  
µA  
µA  
5
VO = 25.0V  
"H" output disable current  
"L" output disable current  
5
VO = 0V  
5
VIN = VSS or VDD  
OUTPUT: OPEN  
Current dissipation  
IDD  
µA  
3.0  
3
BU2090 / F / FS switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V)  
Parameter  
Symbol  
tW  
Min.  
500  
1000  
200  
300  
200  
400  
50  
Typ.  
Max.  
Unit  
ns  
VDD  
5
Conditions  
Minimum clock pulse width  
3
5
Data shift setup time  
Data shift hold time  
Data latch setup time  
Data latch hold time  
Data latch "L" setup time  
tSU  
ns  
ns  
ns  
ns  
ns  
ns  
3
5
tH  
3
5
tLSUH  
tLHH  
tLSUL  
tLHL  
100  
250  
500  
200  
400  
250  
500  
3
5
3
5
3
5
Data latch "L" hold time  
3
Not designed for radiation resistance.  
BU2090 / F / FS switching characteristics measurement conditions  
t
W
tW  
VDD  
90%  
90%  
90%  
CLOCK  
DATA  
10%  
10%  
10%  
10%  
GND (VSS)  
tLSUH  
tLHH  
tSU  
tH  
tLSUL  
tLHL  
VDD  
90%  
90%  
90%  
90%  
10%  
10%  
GND (VSS)  
Fig.1  
5
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
BU2092 / F / FV switching characteristics (unless otherwise noted, Ta = 25°C, VSS = 0V)  
Parameter  
Symbol  
Min.  
Typ.  
55  
90  
50  
115  
45  
70  
35  
80  
Max.  
Unit  
ns  
VDD  
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
Conditions  
RL = 5kΩ  
CL = 10pF  
tPLZ (LCK)  
Transmission delay time  
(LCK to OUTPUT QX)  
RL = 5kΩ  
CL = 10pF  
tPZL (LCK)  
tPLZ  
tPZL  
tW  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RL = 5kΩ  
CL = 10pF  
Output disable time  
(OE to OUTPUT QX)  
RL = 5kΩ  
CL = 10pF  
500  
1000  
500  
1000  
200  
400  
200  
400  
200  
400  
Minimum clock pulse width  
Minimum latch pulse width  
tW (LCK)  
Setup time  
tS  
(LCK to CLOCK)  
Setup time  
(DATA to CLOCK)  
tSU  
Hold time  
tH  
(CLOCK to DATA)  
Not designed for radiation resistance.  
BU2092 / F / FV switching characteristics measurement conditions  
tW  
tW  
VDD  
90%  
tH  
90%  
10%  
90%  
90%  
10%  
10%  
GND (VSS)  
CLOCK  
DATA  
LCK  
OE  
tSU  
VDD  
90% 90%  
tS  
GND (VSS)  
tW (LCK)  
VDD  
90%  
50%  
10%  
90%  
50%  
GND (VSS)  
VDD  
tPLZ (LCK)  
tPZL (LCK)  
50%  
50%  
GND (VSS)  
tPLZ  
tPZL  
50%  
50%  
10%  
10%  
Qx  
Fig.2  
6
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Truth table  
BU2092 / F / FV  
INPUT  
FUNCTION  
CLOCK DATA  
LCK  
OE  
H
×
×
×
×
×
×
Output (Q0 to Q11) disabled  
Output (Q0 to Q11) enabled  
L
First cell of the shift register stores the LOW. Other cells, respectively, store  
data from the preceding cells or other prior data. (Output state is HOLD.)  
×
×
×
L
First cell of the shift register stores the HIGH. Other cells, respectively, store  
data from the preceding cells or other prior data. (Storage state and output state are HOLD.)  
×
×
H
×
×
×
×
×
×
No change in shift register.  
×
×
Contents of shift register are stored in storage register.  
No change in shift register.  
Q0 to Q11 output for the BU2090 / F / FS and BU2092 / F / FV is Nch open drain output. When the shift register transfer data is LOW,  
the corresponding output FET is ON (continuous state). When the transfer data is HIGH, the output FET is OFF (discontinuous).  
Input / output circuit  
BU2090 / F / FS  
2, 3  
BU2092 / F  
BU2092FV  
BU2090 / F / FS  
4, 5, 6, 7, 8, 9  
BU2092 / F  
BU2092FV  
5, 6, 7, 8, 9,  
5, 6, 7, 8, 9,  
Pin No.  
Pin No. 2, 3, 4, 17 Pin No. 2, 3, 4, 19 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 12, 13 Pin No. 10, 11, 14, 15  
14, 15 14, 15, 16 16, 17, 18  
VDD  
VDD  
GND (VSS)  
GND (VSS)  
GND (VSS)  
7
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Circuit operation  
The logic of the DATA pin is sent to the 12-bit shift register on the rising edge of the CLOCK pulse. Subsequently, it  
is shifted from Q0 to Q11 for every clock rising edge.  
For the BU2090 / F / FS  
When the DATA pin is LOW on the CLOCK falling edge, the data does not change its output state. It is only shifted in  
the internal shift register. However, when the DATA pin is HIGH, the content of the 12-bit shift register is latched and  
is output to the corresponding Q0 to Q11.  
CLOCK  
DATA  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Q11  
Q10  
Q9  
Q8  
Q7  
Q6  
Q5  
Q4  
Q3  
Q2  
Q1  
Q0  
Note 1)  
indicates unstable output.  
Note 2) Pull-up resistance is connected to the output pin.  
Fig.3 Operation timing chart  
8
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
For the BU2092 / F / FV  
The content of the 12-bit shift register is stored in the 12-bit storage register at the rising edge of LCK, and is output  
to the corresponding Q0 to Q11. When OE is HIGH, regardless of the content of the storage register, the output FET  
turns OFF and enters a HIGH (discontinuous) state.  
CLOCK  
DATA  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
LCK  
OE  
Q11  
Q10  
Q9  
Q8  
Q7  
Q6  
Q5  
Q4  
Q3  
Q2  
Q1  
Q0  
Note 1)  
indicates unstable output.  
Note 2) Pull-up resistance is connected to the output pin.  
Fig.4 Operation timing chart  
9
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Application example  
BU2090 / F / FS  
VDD  
LED power supply  
CLOCK DATA  
GND  
(VSS)  
GND  
(VSS)  
Control  
circuit  
Fig.5  
BU2092 / F / (FV)  
VDD  
LED power supply  
GND  
(VSS)  
DATA  
CLOCK  
LCK  
GND (VSS)  
OE  
Control  
circuit  
Fig.6  
10  
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
Electrical characteristic curves  
1200  
1000  
800  
600  
400  
200  
30  
1200  
1000  
800  
DIP18 (Unmounted  
SSOP-B20  
)
DIP16 (Unmounted)  
VDD = 5V  
25  
VDD = 3V  
20  
(
when mounted on a 90mm × 50mm × 1.6mm  
SSOP16  
(
When mounted on a 70mm × 70mm × 1.6mm glass epoxy board)  
glass epoxy board  
)
(
when mounted on a 50mm × 50mm × 1.6mm  
glass epoxy board  
Unmounted  
15  
10  
5
600 SOP18  
SSOP16  
SOP16  
(
Unmounted  
)
)
(
when mounted on a 50mm × 50mm × 1.6mm  
SOP18  
400  
(
)
glass epoxy board  
)
SOP16 (Unmounted)  
SSOP-B20  
Unmounted  
(
)
200  
0
25  
50  
75  
100  
125  
150  
0
25  
50  
75  
100  
125  
150  
0
0.5  
1.0  
1.5  
2.0  
2.5  
AMBIENT TEMPERATURE: Ta (°C)  
OUTPUT VOLTAGE "LOW" LEVEL: VOL (V)  
AMBIENT TEMPERATURE: Ta (°C)  
Fig.7 BU2090 / F / FS thermal derating  
characteristics  
Fig.9 Output current vs.output low level  
voltage  
Fig.8 BU2092 / F / FV thermal derating  
characteristics  
11  
BU2090 / BU2090F / BU2090FS /  
BU2092 / BU2092F / BU2092FV  
Standard ICs  
External dimensions (Units: mm)  
BU2090  
BU2092  
22.9 ± 0.3  
19.4 ± 0.3  
18  
1
10  
9
16  
1
9
8
7.62  
7.62  
2.54  
0.5 ± 0.1  
0° ~ 15°  
0° ~ 15°  
2.54  
0.5 ± 0.1  
DIP16  
DIP18  
BU2090F  
BU2092F  
11.2 ± 0.2  
10.0 ± 0.2  
18  
10  
16  
1
9
8
1
9
1.27  
0.4 ± 0.1  
0.3Min.  
1.27 0.4 ± 0.1  
0.3Min.  
0.15  
0.15  
SOP16  
SOP18  
BU2090FS  
BU2092FV  
6.6 ± 0.2  
6.5 ± 0.2  
16  
9
8
20  
11  
10  
1
1
0.8  
0.36 ± 0.1  
0.3Min.  
0.22 ± 0.1  
0.3Min.  
0.65  
0.1  
0.15  
SSOP-A16  
SSOP-B20  
12  

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