BR93L46-W_13_技术文档

Datasheet

Serial EEPROM Series Standard EEPROM

Microwire BUS EEPROM(3-Wire)

BR93Lxx-W

●General Description

BR93Lxx-W is serial EEPROM of serial 3-line interface method

●Features

●Packages W(Typ.) x D(Typ.) x H(Max.)

3-line communications of chip select, serial clock, serial data

input / output (the case where input and output are shared)

Actions available at high speed 2MHz clock(2.5V to 5.5V)

Speed write available (write time 5ms max.）

Same package and pin layout from 1Kbit to 16Kbit

1.8V to 5.5V single power source action

Address auto increment function at read action

Write mistake prevention function

SOP8

TSSOP-B8

3.00mm x 6.40mm x 1.20mm

5.00mm x 6.20mm x 1.71mm

¾ Write prohibition at power on

¾ Write prohibition by command code

¾ Write mistake prevention function at low voltage

Program cycle auto delete and auto end function

Program condition display by READY / BUSY

Low current consumption

SOP- J8

4.90mm x 6.00mm x 1.65mm

TSSOP-B8J

3.00mm x 4.90mm x 1.10mm

¾ At write action (at 5V) : 1.2mA (Typ.)

¾ At read action (at 5V) : 0.3mA (Typ.)

¾ At standby action (at 5V) : 0.1μA (Typ.)(CMOS input)

TTL compatible( input / outputs)

Data retention for 40 years

Endurance up to 1,000,000 times

Data at shipment all addresses FFFFh

SSOP-B8

3.00mm x 6.40mm x 1.35mm

MSOP8

2.90mm x 4.00mm x 0.90mm

DIP-T8

9.30mm x 6.50mm x 7.10mm

Figure.1

●BR93Lxx-W

TSSOP-

B8J

Package type

SOP8

SOP-J8 SSOP-B8 TSSOP-B8 MSOP8

DIP-T8

-

Power source

voltage

Capacity Bit format

Type

F

RF FJ RFJ FV RFV FVT RFVT RFVM

RFVJ

1Kbit

2Kbit

4Kbit

8Kbit

16Kbit

64×16

128×16

256×16

512×16

1K×16

BR93L46-W

BR93L56-W

BR93L66-W

BR93L76-W

BR93L86-W

1.8V to 5.5V ● ● ● ● ● ● ●

●

1.8V to 5.5V

● ● ● ● ● ● ●

● ● ● ●

●

○Product structure：Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays

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●Absolute Maximum Ratings (Ta=25℃)

Remarks

Parameter

Symbol

VCC

Limits

Unit

V

Impressed voltage

-0.3 to +6.5

When using at Ta=25℃ or higher, 4.5mW, to be reduced per 1℃.

When using at Ta=25℃ or higher, 3.0mW, to be reduced per 1℃.

When using at Ta=25℃ or higher, 3.3mW, to be reduced per 1℃.

450 (SOP8)

450 (SOP-J8)

300 (SSOP-B8)

330 (TSSOP-B8)

Permissible dissipation

Pd

mW

When using at Ta=25℃ or higher, 3.1mW, to be reduced per 1℃.

When using at Ta=25℃ or higher, 8.0mW, to be reduced per 1℃

310 (MSOP8)

310 (TSSOP-B8J)

800(DIP-T8)

Storage temperature range

Action temperature range

Terminal voltage

Tstg

Topr

‐

-65 to +125

℃

V

-40 to +85

-0.3 to VCC+0.3

●Memory Cell Characteristics(VCC=1.8V to 5.5V)

Limit

Typ.

Parameter

Unit

Condition

Min.

Max.

Endurance ^*1

1,000,000

40

-

Times

Years

Ta=25℃

Data retention ^*1

○Shipment data all address FFFFh

*1：Not 100％ TESTED

●Recommended Operating Ratings

Parameter

Unit

V

Symbol

Limits

Power source voltage

Input voltage

VCC

VIN

1.8 to 5.5

0 to VCC

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●Electrical Characteristics

(Unless otherwise specified, VCC=2.5V to 5.5V, Ta=-40℃ to +85℃)

Limits

Parameter

Symbol

Unit

Condition

4.0V≦VCC≦5.5V

Min.

Typ.

Max.

0.8

“L” input voltage 1

“L” input voltage 2

“H” input voltage 1

“H” input voltage 2

“L” output voltage 1

“L” output voltage 2

“H” output voltage 1

“H” output voltage 2

Input leak current

Output leak current

VIL1

VIL2

VIH1

VIH2

VOL1

VOL2

VOH1

VOH2

ILI

-0.3

-

V

-0.3

0.2 x VCC

VCC +0.3

0.4

VCC≦4.0V

2.0

V

4.0V≦VCC≦5.5V

VCC≦4.0V

0.7 x VCC

V

0

V

IOL=2.1mA, 4.0V≦VCC≦5.5V

IOL=100μA

0

0.2

V

2.4

VCC

1

V

IOH=-0.4mA, 4.0V≦VCC≦5.5V

IOH=-100μA

VCC -0.2

V

-1

-

µA

mA

µA

VIN=0V to VCC

ILO

1

VOUT=0V to VCC, CS=0V

fSK=2MHz, tE/W=5ms (WRITE)

fSK=2MHz (READ)

ICC1

ICC2

ICC3

ISB

3.0

Current consumption

at action

-

1.5

-

4.5

fSK=2MHz, tE/W=5ms (WRAL, ERAL)

CS=0V, DO=OPEN

Standby current

-

2

(Unless otherwise specified, VCC =1.8V to 2.5V, Ta=-40℃ to +85℃)

Limits

Parameter

Symbol

Unit

Condition

Min.

Typ.

Max.

“L” input voltage

“H” input voltage

“L” output voltage

“H” output voltage

Input leak current

Output leak current

VIL

VIH

VOL

VOH

ILI

-0.3

-

0.2 x VCC

V

0.7 x VCC

VCC+0.3

0

0.2

VCC

1

V

IOL=100μA

VCC-0.2

V

IOH=-100μA

-1

-

μA

mA

μA

VIN=0V to VCC

ILO

1

VOUT=0V to VCC, CS=0V

fSK=500kHz, tE/W=5ms (WRITE)

fSK=500kHz (READ)

fSK=500kHz, tE/W=5ms (WRAL, ERAL)

CS=0V, DO=OPEN

ICC1

ICC2

ICC3

ISB

1.5

0.5

2

Current consumption

at action

-

Standby current

-

2

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●Action Timing Characteristics

(Ta=-40℃ to +85℃, VCC=2.5V to 5.5V)

2.5V≦VCC≦5.5V

Parameter

Symbol

Unit

Min.

Typ.

Max.

SK frequency

SK “H” time

SK “L” time

CS “L” time

CS setup time

DI setup time

CS hold time

DI hold time

Data “1” output delay time

Data “0” output delay time

Time from CS to output establishment

Time from CS to High-Z

Write cycle time

f_SK

t_SKH

t_SKL

t_CS

t_CSS

t_DIS

t_CSH

t_DIH

t_PD1

t_PD0

t_SV

-

230

200

50

100

0

100

-

2

-

200

150

5

MHz

ns

ms

-

t_DF

t_E/W

(Ta=-40℃ to +85℃, VCC=1.8V to 2.5V)

1.8V≦VCC≦2.5V

Parameter

Symbol

Unit

Min.

Typ.

Max.

SK frequency

SK “H” time

SK “L” time

CS “L” time

CS setup time

DI setup time

CS hold time

DI hold time

Data “1” output delay time

Data “0” output delay time

Time from CS to output establishment

Time from CS to High-Z

Write cycle time

f_SK

t_SKH

t_SKL

t_CS

t_CSS

t_DIS

t_CSH

t_DIH

t_PD1

t_PD0

t_SV

-

0.8

1

200

100

0

100

-

500

-

0.7

200

5

kHz

us

ns

us

ns

ms

-

t_DF

t_E/W

●Sync Data Input / Output Timing

CS

tCSS

tSKH

tSKL

tCSH

SK

tDIS

tDIH

DI

tPD1

tPD0

DO(READ)

tDF

STATUS VALID

DO(WRITE)

○Data is taken by DI sync with the rise of SK.

○At read action, data is output from DO in sync with the rise of SK.

○The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area

DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z.

○After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode.

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●Block Diagram

Power source voltage detection

Command decode

Control

CS

SK

Clock generation

Write

prohibition

High voltage occurrence

6bit

Address

buffer

Address

decoder

7bit

8bit

7bit

Command

register

1,024 bit

DI

8bit

9bit

10bit

9bit

2,048 bit

4,096 bit

8,192 bit

16,384 bit

EEPROM

10bit

Data

register

R/W

amplifier

16bit

DO

Dummy bit

●Pin Configurations

TOP VIEW

NC

GND

DO

DI

Vcc

NC

GND

Vcc

NC

GND

BR93LXXRF-W:SOP8

BR93LXXRFJ-W:SOP-J8

BR93LXXRFV-W:SSOP-B8

BR93LXXF-W:SOP8

BR93LXX-W:DIP-T8

BR93LXXFJ-W:SOP-J8

BR93LXXRFVT-W:TSSOP-B8

BR93LXXRFVM-W:MSOP8

BR93LXXRFVJ-W:TSSOP-B8J

BR93LXXFV-W:SSOP-B8*

BR93LXXFVT-W:TSSOP-B8*

CS

SK

DI

DO

CS

SK

DI

DO

NC

Vcc

CS

SK

*BR93L46/56/66-W

●Pin Descriptions

Pin name

VCC

GND

CS

I / O

Function

-

Power source

All input / output reference voltage, 0V

Chip select input

Input

Output

-

SK

Serial clock input

DI

Start bit, ope code, address, and serial data input

DO

Serial data output, READY / BUSY internal condition display output

Non connected terminal, Vcc, GND or OPEN

NC

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●Typical Performance Curves

(The following characteristic data are typ. values.)

Figure 2. H input voltage VIH (CS,SK,DI)

Figure 3. L input voltage VIL (CS,SK,DI)

Figure 4. L output voltage VOL-IOL (Vcc=1.8V)

Figure 5. L output voltage VOL-IOL (Vcc=2.5V)

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●Typical Performance Curves‐Continued

Figure 6. L output voltage VOL-IOL

(Vcc=4.0V)

Figure 7. H output voltage VOH-IOH

(Vcc=1.8V)

Figure 9. H output voltage VOH-IOH (Vcc=4.0V)

Figure 8. H output voltage VOH-IOH (Vcc=2.5V)

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●Typical Performance Curves‐Continued

Figure 10. Input leak current ILI (CS,SK,DI)

Figure 11. Output leak current ILO (DO)

Figure 13. Consumption current at READ action

ICC2 (READ, fSK=2MHz)

Figure 12. Current consumption at WRITE action

ICC1 (WRITE, fSK=2MHz)

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●Typical Performance Curves‐Continued

Figure 14. Consumption current at WRAL action

ICC3 (WRAL, fSK=2MHz)

Figure 15. Current consumption at WRITE action

ICC1 (WRITE, fSK=500kHz)

Figure 16. Consumption current at READ action

ICC2 (READ, fSK=500kHz)

Figure 17. Consumption current at WRAL action

ICC3 (WRAL, fSK=500kHz)

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●Typical Performance Curves‐Continued

Figure 18. Consumption current at standby action ISB

Figure 19. SK frequency fSK

Figure 20. SK high time tSKH

Figure 21. SK low time tSKL

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●Typical Performance Curves‐Continued

Figure 22. CS low time tCS

Figure 23. CS hold time tCSH

Figure 24. CS setup time tCSS

Figure 25. DI hold time tDIH

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●Typical Performance Curves‐Continued

Figure 27. Data “0” output delay time tPD0

Figure 26. DI setup time tDIS

Figure 29. Time from CS to output establishment tSV

Figure 28. Output data “1” delay time tPD1

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●Typical Performance Curves‐Continued

Figure 31. Write cycle time tE/W

Figure 30. Time from CS to High-Z tDF

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●Description of Operations

Communications of the Microwire Bus are carried out by SK (serial clock), DI (serial data input),DO (serial data

output) ,and CS (chip select) for device selection.

When to connect one EEPROM to a microcontroller, connect it as shown in Figure 32 (a) or Figure 32 (b). When to use

the input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Figure 31

(b) (Refer to page 19.), and connection by 3 lines is available.

In the case of plural connections, refer to Figure 32 (c).

Micro-

controller

Micro-

controller

CS3

CS1

CS0

SK

Micro-

controller

CS

BR93LXX

CS

BR93LXX

CS

SK

DO

DI

DO

DI

SK

DI

SK

DI

DO

Device 1

Device 2

Device 3

Figure 32-(a) Connection by 4 lines

Figure 32-(b) Connection by 3 lines

Figure 32-(c) Connection example of plural devices

Figure 32. Connection method with microcontroller

Communications of the Microwire Bus are started by the first “1” input after the rise of CS. This input is called a start bit.

After input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners.

“0” input after the rise of CS to the start bit input is all ignored. Therefore, when there is limitation in the bit width of PIO

of the microcontroller, input “0” before the start bit input, to control the bit width.

●Command Mode

Start

bit

1

Ope

code

10

Address

BR93L56/66-W

Command

Data

BR93L46-W

BR93L76/86-W

*1

Read (READ)

A5,A4,A3,A2,A1,A0

A7,A6,A5,A4,A3,A2,A1,A0

* * * * * *

A7,A6,A5,A4,A3,A2,A1,A0

A9,A8,A7,A6,A5,A4,A3,A2,A1,A0

D15 to D0(READ DATA)

Write enable (WEN)

Write (WRITE)

1

00

1

* * * *

1

* * * * * * * *

*2

1

01

A5,A4,A3,A2,A1,A0

A9,A8,A7,A6,A5,A4,A3,A2,A1,A0

D15 to D0(WRITE DATA)

Write all (WRAL)

Write disable (WDS)

Erase (ERASE)

Chip erase (ERAL)

1

00

0

1

0

* * * *

0

1

0

* * * * * *

0

1

0

* * * * * * * *

1

00

1

11

A5,A4,A3,A2,A1,A0

* * * *

A7,A6,A5,A4,A3,A2,A1,A0

* * * * * *

A9,A8,A7,A6,A5,A4,A3,A2,A1,A0

* * * * * * * *

1

00

1

0

1

0

1

0

・ Input the address and the data in MSB first manners.

・ As for *, input either VIH or VIL.

*Start bit

A7 of BR93L56-W becomes Don't Care.

A9 of BR93L76-W becomes Don't Care.

Acceptance of all the commands of this IC starts at recognition of the start bit.

The start bit means the first “1” input after the rise of CS.

*1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and

address data in significant order are sequentially output continuously. (Auto increment function)

*2 When the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written.

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●Timing Chart

1) Read cycle (READ)

～～

CS

*1

BR93L46-W : n=25, m=5

n+1

*2

SK

DI

n

1

2

4

BR93L56-W

BR93L66-W

BR93L76-W

BR93L86-W

: n=27, m=7

: n=29, m=9

～～

A1

A0

Am

1

0

～～

D0

0

D15 D14

D1

D15 D14

DO

～～

High-Z

*1 Start bit

When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as

a start bit, and the following operation is started. This is common to all the commands to described hereafter.

Figure 33. Read cycle

○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in

sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK.

This IC has an address auto increment function valid only at read command. This is the function where after the above

read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto

increment, keep CS at “H”.

2) Write cycle (WRITE)

～～

tCS

n

CS

SK

DI

STATUS

～～

BR93L46-W : n=25, m=5

BR93L56-W

1

2

4

～～

: n=27, m=7

～～

BR93L66-W

BR93L76-W

BR93L86-W

D15 D14

D1

A1

A0

D0

Am

1

0

1

: n=29, m=9

tSV

READY

DO

BUSY

～～

High-Z

tE/W

Figure 34. Write cycle

○In this command, input 16bit data (D15 to D0) are written to designated addresses (Am to A0). The actual write starts by

the fall of CS of D0 taken SK clock.

When STATUS is not detected, (CS=”L” fixed) Max. 5ms in conformity with tE/W, and when STATUS is detected (CS=”H”),

all commands are not accepted for areas where “L” (BUSY) is output from D0, therefore, do not input any command.

3) Write all cycyle (WRAL)

～～

tCS

n

CS

SK

DI

STATUS

～～

1

2

0

5

～～

BR93L46-W : n=25

BR93L56-W

～～

: n=27

BR93L66-W

BR93L76-W

BR93L86-W

D15 D14

D1

D0

1

0

1

～～

: n=29

tSV

BUSY

READY

DO

～～

High-Z

tE/W

Figure 35. Write all cycle

○In this command, input 16bit data is written simultaneously to all adresses. Data is not written continuously per one word

but is written in bulk, the write time is only Max. 5ms in conformity with tE/W.

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4) Write enable (WEN) / disable (WDS) cycle

～～

CS

SK

1

2

0

3

4

5

6

7

8

n

～～

BR93L46-W : n=9

BR93L56-W

: n=11

ENABLE=1

DISABLE=0

1

0

BR93L66-W

BR93L76-W

BR93L86-W

～～

: n=13

DI

1

0

DO

High-Z

Figure 36. Write enable (WEN) / disable (WDS) cycle

○At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is

necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable

command is executed or the power is turned off. However, the read command is valid irrespective of write enable / diable

command. Input to SK after 6 clocks of this command is available by either “H” or “L”, but be sure to input it.

○When the write enable command is executed after power on, write enable status gets in. When the write disable

command is executed then, the IC gets in write disable status as same as at power on, and then the write command is

canceled thereafter in software manner. However, the read command is executable. In write enable status, even when the

write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the write

disable command after completion of write.

5) Erase cycle timing (ERASE)

～～

STATUS

tCS

n

CS

SK

DI

～～

BR93L46-W : n=9, m=5

BR93L56-W

1

2

4

: n=11, m=7

～～

BR93L66-W

BR93L76-W

BR93L86-W

～～

: n=13, m=9

A1

A3

A2

A0

Am

1

～～

tSV

BUSY

READY

DO

～～

High-Z

tE/W

Figure 37. Erase cycle timing

○In this command, data of the designated address is made into “1”. The data of the designated address becomes “FFFFh”.

Actual ERASE starts at the fall of CS after the fall of A0 taken SK clock.

In ERASE, status can be detected in the same manner as in WRITE command.

6) Chip erase cycle timing (ERAL)

～～

tCS

～～

CS

SK

DI

STATUS

～～

BR93L46-W : n=9

BR93L56-W

n

1

2

4

～～

: n=11

BR93L66-W

BR93L76-W

BR93L86-W

: n=13

0

1

0

1

～～

tSV

READY

DO

BUSY

～～

High-Z

tE/W

Figure 38. Chip erase cycle timing

○In this command, data of all addresses is erased. Data of all addresses becomes ”FFFFh”.

Actual ERASE starts at the fall of CS after the falll of the n-th clock from the start bit input.

In ERAL, status can be detected in the same manner as in WRITE command.

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●Application

1) Method to cancel each command

○READ

(In the case of BR93L46-W)

Start bit

1bit

Ope code

2bit

Address^*1

6bit

Data

16bit

Cancel is available in all areas in read mode.

＊1 Address is 8 bits in BR93L56-W, BR93L-66W

Address is 10 bits in BR93L76-W, BR93L86-W

・Method to cancel：cancel by CS=“L”

Figure 39. READ cancel available timing

・25 Rise of clock *2

○WRITE, WRAL

SK

DI

25

D0

24

D1

Enlarged figure

*1

(In the case of BR93L46-W)

Start bit

1bit

Ope code

2bit

Address

6bit

a

Data

16bit

tE/W

b

2

a：From start bit to 25 clock rise^＊

*1 Address is 8 bits in BR93L56-W, BR93L66-W

Address is 10 bits in BR93L76-W BR93L86-W

*2 27 clocks in BR93L56-W, BR93L66-W

29 clocks in BR93L76-W BR93L86-W

Cancel by CS=“L”

2

b：25 clock rise and after^＊

Cancellation is not available by any means. If Vcc is made OFF in this area,

designated address data is not guaranteed, therefore write once again.

And when SK clock is input continuously, cancellation is not available.

29 Rise of clock *2

SK

DI

28

29

D0

30

31

D1

a

b

c

Enlarged figure

*1

(In the case of BR93L86-W)

1bit

2bit

10bit

16bit

b

a

c

a：From start bit to 29 clock rise

Cancel by CS=“L”

b：29 clock rise and after

Cancellation is not available by any means. If Vcc is made OFF in this area,

designated address data is not guaranteed, therefore write once again.

Note 1) If Vcc is made OFF in this area, designated address data is

not guaranteed, therefore write once again.

c：30 clock rise and after

Note 2) If CS is started at the same timing as that of the SK rise,

write execution/cancel becomes unstable, therefore, it is

recommended to fail in SK=”L” area.

Cancel by CS=“L”

However, when write is started in b area (CS is ended), cancellation is not

available by any means.

And when SK clock is output continuously is not available.

As for SK rise, recommend timing of tCSS/tCSH or higher.

Figure 40. WRITE, WRAL cancel available timing

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2

9 Rise of clock^＊

○ERASE, ERAL

8

9

SK

DI

A1

A0

Enlarged figure

Address ^*1

6bit

1/2

tE/W

Start bit

1bit

Ope code

2bit

(In the case of BR93L46-W)

a

b

2

a：From start bit to 9 clock rise^＊

＊1 Address is 8 bits in BR93L56-W, BR93L66-W

Address is 10 bits in BR93L76-W

Cancel by CS=“L”

2

b：9 clock rise and after^＊

＊2 11 clocks in BR93L56-W, BR93L66-W

13 clocks in BR93L76-W

Cancellation is not available by any means. If Vcc is made OFF in this area,

designated address data is not guaranteed, therefore write once again.

And when SK clock is input continuously, cancellation is not available.

13 Rise of clock *2

12 13

15

14

SK

DI

D1

a

b

c

Enlarged figure

Start bit

1bit

Ope code

2bit

Address ^*1

10bit

tE/W

c

(In the case of BR93L86-W)

b

a

a：From start bit to 13 clock rise

Cancel by CS=“L”

b：13 clock rise and after

Cancellation is not available by any means. If Vcc is made OFF in this area,

designated address data is not guaranteed, therefore write once again.

Note 1) If Vcc is made OFF in this area, designated address data is

not guaranteed, therefore write once again.

c：14 clock rise and after

Note 2) If CS is started at the same timing as that of the SK rise,

write execution/cancel becomes unstable, therefore, it is

recommended to fail in SK=”L” area.

Cancel by CS=“L”

However, when write is started in b area (CS is ended), cancellation is not

available by any means.

And when SK clock is output continuously is not available.

As for SK rise, recommend timing of tCSS/tCSH or higher.

Figure 41. ERASE, ERAL cancel available timing

2) At standby

○Standby current

When CS is “L”, SK input is “L”, DI input is “H”, and even with middle electric potential, current does not increase.

○Timing

As shown in Figure 42, when SK at standby is “H”, if CS is started, DI status may be read at the rise edge.

At standby and at power ON/OFF, when to start CS, set SK input or DI input to “L” status. (Refer to Figure 42)

If CS is started when SK=”L” or DI=”L”, a start

bit is recognized correctly.

CS=SK=DI=”H”

Wrong recognition as a start bit

CS

SK

DI

CS

SK

DI

Start bit input

Figure 42. Wrong action timing

Figure 43. Normal action timing

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3) Equivalent circuit

Output circuit

Input citcuit

RESET int.

CSint.

CS

DO

OEint.

Figure 45. Input circuit (CS)

Figure 44. Output circuit (DO)

Input circuit

CS int.

DI

SK

Figure 46. Input circuit (DI)

Figure 47. Input circuit (SK)

4) I/O peripheral circuit

4-1) Pull down CS.

By making CS=“L” at power ON/OFF, mistake in operation and mistake write are prevented.

○Pull down resistance Rpd of CS pin

To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an

appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC.

VOHM

Rpd ≧

・・・①

・・・②

IOHM

VOHM ≧ VIHE

Microcontroller

VOHM

EEPROM

VIHE

Example) When V_CC=5V, VIHE=2V, VOHM=2.4V, IOHM=2mA,

from the equation ①,

2.4

Rpd ≧

2×10^-3

“H” output

“L” input

IOHM

Rpd

∴

Rpd ≧ 1.2 [kΩ]

With the value of Rpd to satisfy the above equation, VOHM becomes

2.4V or higher, and VIHE (=2.0V), the equation ② is also satisfied.

Figure 48. CS pull down resistance

・VIHE

: EEPROM VIH specifications

・VOHM : Microcontroller VOH specifications

・IOHM : Microcontroller IOH specifications

4-2) DO is available in both pull up and pull down.

Do output become “High-Z” in other READY / BUSY output timing than after data output at read command and write

command. When malfunction occurs at “High-Z” input of the microcontroller port connected to DO, it is necessary to

pull down and pull up DO. When there is no influence upon the microcontroller actions, DO may be OPEN.

If DO is OPEN, and at timing to output status READY, at timing of CS=“H”, SK=“H”, DI=“H”, EEPROM recognizes this

as a start bit, resets READY output, and DO=”High-Z”, therefore, READY signal cannot be detected. To avoid such

output, pull up DO pin for improvement.

CS

SK

DI

CS

SK

DI

“H”

Enlarged

D0

High-Z

CS=SK=DI=”H”

When DO=OPEN

READY

High-Z

DO

BUSY

Improvement by DO pull up

CS=SK=DI=”H”

When DO=pull up

READY

Figure 49. READY output timing at DO=OPEN

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○Pull up resistance Rpu and pull down resistance Rpd of DO pin

As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller

VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC.

Vcc－VOLE

Rpu ≧

・・・③

・・・④

Microcontroller

VILM

EEPROM

IOLE

VOLE ≦ VILM

Rpu

IOLE

VOLE

Example) When V_CC=5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V,

from the equation ③,

“L” input

5－0.4

Rpu ≧

2.1×10^-3

“L” output

∴

Rpu ≧ 2.2 [kΩ]

With the value of Rpu to satisfy the above equation, VOLE becomes 0.4V

or below, and with VILM(=0.8V), the equation ④ is also satisfied.

Figure 50. DO pull up resistance

・VOLE

・IOLE

・VILM

: EEPROM VOL specifications

: EEPROM IOL specifications

: Microcontroller VIL specifications

VOHE

Rpd ≧

・・・⑤

・・・⑥

EEPROM

IOHE

VOHE ≧ VIHM

Microcontroller

VIHM

Example) When V_CC=5V, VOHE=Vcc－0.2V, IOHE=0.1mA,

VIHM=Vcc×0.7V from the equation ⑤,

VOHE

IOHE

“H” input

“H” output

Rpd

5－0.2

Rpd ≧

0.1×10^-3

∴

Rpd ≧ 48 [kΩ]

With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V

or below, and with VIHM (=3.5V), the equation ⑥ is also satisfied.

Figure 51. DO pull down resistance

・VOHE : EEPROM VOH specifications

・IOHE

・VIHM

: EEPROM IOH specifications

: Microcontroller VIH specifications

5) READY / BUSY status display (DO terminal)

(common to BR93L46-W,BR93L56-W, BR93L66-W, BR93L76-W, BR93L86-W)

This display outputs the internal status signal. When CS is started after tCS (Min.200ns)

from CS fall after write command input, “H” or “L” is output.

R/B display＝“L” (BUSY) = write under execution

（DO status）

After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically.

And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted.

R/B display = “H” (READY) = command wait status

^{（DO status）}Even after tE/W (max.5ms) from write of the memory cell, the following command is accepted.

Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore, DI=“L” in the area

CS=“H”. (Especially, in the case of shared input port, attention is required.)

*Do not input any command while status signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted.

Therefore, status READY output is cancelled, and malfunction and mistake write may be made.

STATUS

CS

SK

DI

CLOCK

WRITE

INSTRUCTION

tSV

High-Z

DO

READY

BUSY

Figure 52. R/B status output timing chart

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6) When to directly connect DI and DO

This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,

meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control

Microcontroller

EEPROM

line.

DI/O PORT

DI

R

DO

Figure 53. DI, DO control line common connection

○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input.

Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the

same time in the following points.

(1) 1 clock cycle to take in A0 address data at read command

Dummy bit “0” is output to DO terminal.

→When address data A0 = “1” input, through current route occurs.

EEPROM CS input

“H”

EEPROM SK input

A1

A0

EEPROM DI input

Collision of DI input and DO output

D15 D14 D13

EEPROM DO output

Microcontroller DI/O port

0

High-Z

A1 A0

High-Z

Microcontroller output

Microcontroller input

Figure 54. Collision timing at read data output at DI, DO direct connection

(2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output.

When the next start bit input is recognized, “HIGH-Z” gets in.

→Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”,

READY output “H” is output from DO terminal, and through current route occurs.

Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted.

～～

EEPROM CS input

～～

Write command

～～

EEPROM SK input

EEPROM DI input

Write command

～～

High-Z

READY

Collision of DI input and DO output

BUSY

EEPROM DO output

Microcontroller DI/O port

～～

BUSY

Write command

～～

Microcontroller output

Microcontroller input

Microcontroller output

Figure 55. Collision timing at DI, DO direct connection

Note) As for the case (2), attention must be paid to the following.

When status READY is output, DO and DI are shared, DI=”H” and the microcontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK clock is

input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY

output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output.

Start bit

CS

SK

DI

Because DI=”H”, set

SK=”L” at CS rise.

READY

DO

High-Z

Figure 56. Start bit input timing at DI, DO direct connection

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○Selection of resistance value R

The resistance R becomes through current limit resistance at data collision. When through current flows, noises of

power source line and instantaneous stop of power source may occur. When allowable through current is defined as I,

the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so

forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL

even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence

upon basic operations.

(1) Address data A0 = “1” input, dummy bit “0” output timing

(When microcontroller DI/O output is “H”, EEPROM DO outputs “L”, and “H” is input to DI)

・Make the through current to EEPROM 10mA or below.

・See to it that the level VIH of EEPROM should satisfy the following.

Conditions

VOHM ≦ VIHE

Microcontroller

EEPROM

VOHM ≦ IOHM×R + VOLE

At this moment, if VOLE=0V,

DI/O PORT

VOHM

IOHM

DI

“H” output

VOHM ≦ IOHM×R

R

VOHM

R ≧

DO

∴

・・・⑦

IOHM

VOLE

・VIHE

: EEPROM VIH specifications

“L” output

・VOLE : EEPROM VOL specifications

・VOHM : Microcontroller VOH specifications

・IOHM : Microcontroller IOH specifications

Figure 57. Circuit at DI, DO direct connection (Microcontroller DI/O “H” output, EEPROM “L” output)

(2) DO status READY output timing

(When the microcontroller DI/O is “L”, EEPROM DO output “H”, and “L” is input to DI)

・Set the EEPROM input level VIL so as to satisfy the following.

Conditions

Microcontroller

DI/O PORT

EEPROM

VOLM ≧ VILE

DI

“L” output

VOLM ≧ VOHE – IOLM×R

VOLM

As this moment, VOHE=Vcc

R

VOLM ≧ Vcc – IOLM×R

IOHM

DO

Vcc – VOLM

IOLM

∴

・・・⑧

VOHE

“H” output

・VILE

: EEPROM VIL specifications

・VOHE : EEPROM VOH specifications

・VOLM : Microcontroller VOL specifications

・IOLM

: Microcontroller IOL specifications

Example) When Vcc=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA,

From the equation ⑦,

From the equation⑧,

VOHM

Vcc – VOLM

R ≧

IOHM

IOLM

5 – 0.4

2.1×10^-3

5

R ≧

0.4×10^-3

∴

R ≧ 12.5 [kΩ]

・・・⑨

∴

R ≧ 2.2 [kΩ]

・・・⑩

Therefore, from the equations ⑨ and ⑩,

R ≧ 12.5 [kΩ]

∴

Figure 58. Circuit at DI, DO direct connection (Microcontroller DI/O “L” output, EEPROM “H” output)

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7) Notes on power ON/OFF

・At power ON/OFF, set CS “L”.

When CS is “H”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may

cause malfunction, mistake write or so. To prevent these, at power ON, set CS “L”. (When CS is in “L” status, all inputs

are cancelled.) And at power decline, owing to power line capacity and so forth, low power status may continue long. At

this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS “L”.

V_CC

GND

V_CC

CS

GND

Figure 59. Timing at power ON/OFF

Bad example

Good example

（Bad example）CS pin is pulled up to Vcc.

（Good example）It is “L” at power ON/OFF.

Set 10ms or higher to recharge at power OFF.

In this case, CS becomes “H” (active status), and EEPROM may have malfunction,

mistake write owing to noise and the likes.

When power is turned on without observing this condition,

IC internal circuit may not be reset, which please note.

Even when CS input is High-Z, the status becomes like this case, which please note.

○POR citcuit

This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR action, it gets in write

disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS

is “H” at power ON/OFF, it may become write enable status owing to noises and the likes. For secure actions, observe

the follwing conditions.

1. Set CS=”L”

2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit action.

t_R

VCC

Recommended conditions of tR, tOFF, Vbot

t_R

t_OFF

Vbot

10ms or below 10ms or higher 0.3V or below

100ms or below 10ms or higher 0.2V or below

t_OFF

Vbot

0

Figure 60. Rise waveform diagram

○LVCC circuit

LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.

At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite.

8) Noise countermeasures

○VCC noise (bypass capacitor)

When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is

recommended to attach a by pass capacitor (0.1µF) between IC VCC and GND, At that moment, attach it as close to IC

as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.

○SK noise

When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to

clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is

set about 0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the

rise time (tR) of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise

countermeasures. Make the clock rise, fall time as small as possible.

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●Notes for Use

(1) Described numeric values and data are design representative values, and the values are not guaranteed.

(2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further

sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in

consideration of static characteristics and transition characteristics and fluctuations of external parts and our IC.

(3) Absolute Maximum Ratings

If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, IC

may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of

fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that

conditions exceeding the absolute maximum ratings should not be impressed to IC.

(4) GND electric potential

Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is not lower than

that of GND terminal in consideration of transition status.

(5) Heat design

In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin.

(6) Terminal to terminal shortcircuit and wrong packaging

When to package IC onto a board, pay sufficient attention to IC direction and displacement. Wrong packaging may

destruct IC. And in the case of shortcircuit between IC terminals and terminals and power source, terminal and GND

owing to foreign matter, IC may be destructed.

(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently

Status of this document

The Japanese version of this document is formal specification. A customer may use this translation version only for a reference

to help reading the formal version.

If there are any differences in translation version of this document formal version takes priority.

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●Ordering Information

Product Code Description

B R

9

3

L

x

-

W

x

BUS Type

93：Microwire

Operating temperature

-40℃ to +85℃

Capacity

46=1K

76=8K

56=2K

86=16K

66=4K

Package type

F, RF

: SOP8

FJ, RFJ

FV, RFV

: SOP-J8

: SSOP-B8

FVT, RFVT : TSSOP-B8

RFVJ

: TSSOP-B8J

RFVM

Blank

: MSOP8

: DIP-T8

Double cell

Package specifications

E2 ：reel shape emboss taping

TR ：reel shape emboss taping

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●Physical Dimension Tape and Reel Information

SOP8

5.0± 0.2

(MAX 5.35 include BURR)

+

−

6

°

4°

4

°

8

7

6

5

1 2

3

4

0.595

+0.1

0.17

-

0.05

S

0.1 S

1.27

0.42± 0.1

(Unit : mm)

Tape

Embossed carrier tape

Quantity

2500pcs

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Physical Dimension Tape and Reel Information - Continued

SOP-J8

4.9± 0.2

(MAX 5.25 include BURR)

+

6°

4°

−4°

8

7

6

5

1

2

3

4

0.545

0.2± 0.1

S

1.27

0.42± 0.1

0.1

S

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Physical Dimension Tape and Reel Information – Continued

SSOP-B8

3.0± 0.2

(MAX 3.35 include BURR)

8

7

6

5

1

2

3

4

0.15± 0.1

S

0.1

S

+0.06

(0.52)

0.65

0.22

−0.04

M

0.08

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

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●Physical Dimension Tape and Reel Information – Continued

TSSOP-B8J

3.0± 0.1

(MAX 3.35 include BURR)

4 ± ±4

8

7

6

5

1

2

3

4

1PIN MARK

+0.05

0.525

0.145

−0.03

S

0.08 S

+0.05

0.32

−0.04

M

0.08

0.65

(Unit : mm)

Tape

Embossed carrier tape

2500pcs

Quantity

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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●Physical Dimension Tape and Reel Information – Continued

TSSOP-B8

3.0± 0.1

(MAX 3.35 include BURR)

4 ± ±4

8

7

6

5

1

2

3

4

1PIN MARK

+0.05

0.145

−0.03

0.525

S

0.08 S

+0.05

0.245

M

−0.04

0.08

0.65

(Unit : mm)

Tape

Embossed carrier tape

Quantity

3000pcs

E2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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●Physical Dimension Tape and Reel Information – Continued

MSOP8

2.9± 0.1

(MAX 3.25 include BURR)

+

6°

4°

−4°

8 7 6 5

1

2 3 4

1PIN MARK

+0.05

−0.03

0.145

0.475

S

0.22

−0.04

0.08 S

0.65

(Unit : mm)

Tape

Embossed carrier tape

3000pcs

Quantity

TR

Direction

of feed

The direction is the 1pin of product is at the upper right when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

1pin

Direction of feed

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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●Physical Dimension Tape and Reel Information – Continued

DIP-T8

9.3± 0.3

8

1

5

4

7.62

0.3± 0.1

0°−15°

2.54

0.5± 0.1

(Unit : mm)

Container

Quantity

Tube

2000pcs

Direction of feed Direction of products is fixed in a container tube

Order quantity needs to be multiple of the minimum quantity.

∗

www.rohm.com

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●Marking Diagrams

SOP8(TOP VIEW)

SOP-J8(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

1PIN MARK

SSOP-B8(TOP VIEW)

TSSOP-B8J(TOP VIEW)

Part Number Marking

LOT Number

Part Number Marking

LOT Number

1PIN MARK

TSSOP-B8(TOP VIEW)

Part Number Marking

MSOP8(TOP VIEW)

Part Number Marking

LOT Number

1PIN MARK

DIP-T8 (TOP VIEW)

Part Number Marking

LOT Number

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●Marking Information

Product

Name

Marking

L46

RL46

L46

RL46

L46

RL46

Package Type

Capacity

Orderable Part Number

BR93L46F-WE2

BR93L46RF-WE2

BR93L46FJ-WE2

BR93L46RFJ-WE2

BR93L46FV-WE2

BR93L46RFV-WE2

SOP8

SOP-J8

SSOP-B8

1K

2K

4K

R46

TSSOP-B8J

BR93L46RFVJ-WE2

L46

RL46

R46

BR93L46 DIP-T8

L56

RL56

L56

BR93L46FVT-WE2

BR93L46RFVT-WE2

BR93L46RFVM-WTR

BR93L46-W

TSSOP-B8

MSOP8

BR93L56F-WE2

SOP8

BR93L56RF-WE2

BR93L56FJ-WE2

BR93L56RFJ-WE2

BR93L56FV-WE2

BR93L56RFV-WE2

SOP-J8

RL56

L56

SSOP-B8

RL56

R56

TSSOP-B8J

BR93L56RFVJ-WE2

L56

RL56

R56

BR93L56 DIP-T8

L66

RL66

L66

BR93L56FVT-WE2

BR93L56RFVT-WE2

BR93L56RFVM-WTR

BR93L56-W

TSSOP-B8

MSOP8

BR93L66F-WE2

SOP8

BR93L66RF-WE2

BR93L66FJ-WE2

BR93L66RFJ-WE2

BR93L66FV-WE2

BR93L66RFV-WE2

SOP-J8

RL66

L66

SSOP-B8

RL66

R66

TSSOP-B8J

BR93L66RFVJ-WE2

L66

RL66

R66

BR93L66FVT-WE2

BR93L66RFVT-WE2

BR93L66RFVM-WTR

BR93L66-W

TSSOP-B8

MSOP8

BR93L66 DIP-T8

L76

RL76

BR93L76F-WE2

SOP8

BR93L76RF-WE2

BR93L76FJ-WE2

BR93L76RFJ-WE2

L76

SOP-J8

RL76

8K

RL76

R76

SSOP-B8

BR93L76RFV-WE2

BR93L76RFVJ-WE2

BR93L76RFVT-WE2

TSSOP-B8J

RL76

R76

BR93L76 DIP-T8

TSSOP-B8

MSOP8

BR93L76RFVM-WTR

BR93L76-W

L86

RL86

BR93L86F-WE2

BR93L86RF-WE2

BR93L86FJ-WE2

BR93L86RFJ-WE2

SOP8

L86

SOP-J8

RL86

16K

RL86

R86

SSOP-B8

BR93L86RFV-WE2

BR93L86RFVJ-WE2

BR93L86RFVT-WE2

TSSOP-B8J

RL86

R86

BR93L86 DIP-T8

TSSOP-B8

MSOP8

BR93L86RFVM-WTR

BR93L86-W

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●Revision History

Date

Revision

Changes

31.Aug.2012

15.Oct.2013

001

002

New Release

Page34 Modify the Marking of MSOP8 pachage of 8K and 16K.

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the

ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice - GE

Rev.002

Daattaasshheeeett

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,

please consult with ROHM representative in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable

for infringement of any intellectual property rights or other damages arising from use of such information or data.:

2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the information contained in this document.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice - GE

Rev.002

Daattaasshheeeett

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

Notice – WE

Rev.001

Datasheet

Buy

BR93L56-W - Web Page

Distribution Inventory

Part Number

Package

BR93L56-W

DIP-T8

Unit Quantity

2000

Minimum Package Quantity

Packing Type

Constitution Materials List

RoHS

50

Tube

inquiry

Yes


型号：	BR93L46-W_13
厂家：	ROHM
描述：	Microwire BUS EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总39页 (文件大小：1242K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BR93L46-W_13 [ROHM]

相关型号：

BR93L46F

BR93L46F-LE2

BR93L46F-W

BR93L46F-WE1

BR93L46F-WE2

BR93L46FJ

BR93L46FJ-W

BR93L46FJ-WE1

BR93L46FJ-WE2

BR93L46FV

BR93L46FV-W

BR93L46FV-WE1