BR35H160FJ-WCE2 [ROHM]
125℃ SPI BUS ICs BR35 Family; 125 ℃ SPI总线芯片BR35系列
| 型号： | BR35H160FJ-WCE2 |
| 厂家： | 
ROHM |
| 描述： | 125℃ SPI BUS ICs BR35 Family |
| 文件： | 总17页 (文件大小：393K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Automotive Series EEPROMs
125℃ SPI BUS ICs
BR35□□□□ Family
BD35H□□□-WC Series
No.10001EAT09
●Description
BR35H□□□-WC Series is a SPI BUS interface method serial EEPROM.
●Features
1） High speed clock operation up to 5MHz(Max.)
2） 2.5V to 5.5V single power source operation most suitable for battery use.
3） Page write mode useful for initial value at factory shipment.
4） Highly reliable connection by Au pad and Au wire.
5） For SPI bus interface(CPOL,CPHA)=(0,0),(1,1)
6） Auto erase and auto end function at data rewrite.
7） Low operating current
At write operation(5V): 0.6mA(Typ.)
At read operation(5V): 1.3mA(Typ.)
At standby operation(5V): 0.1μA(Typ.)
8） Address auto increment function at read operation.
9） Write mistake prevention function
Write prohibition at power on.
Write prohibition by command code(WRDI)
Write mistake prevention function at low voltage.
10） MSOP8 / TSSOP-B8 / SOP8 / SOP-J8 Package.
11） Data at shipment Memory array:FFh.
12） Data Retention : 20 years(Ta≦125℃)
13） Endurance : 300,000 cycles(Ta≦125℃)
●Page Write
Number of pages
32Byte
64Byte
BR35H160-WC
BR35H320-WC
BR35H640-WC
Product number
BR35H128-WC
●BR35H Series
Supply
Voltage
Capacity
Bit Format
Product Name
MSOP8
TSSOP-B8
SOP8
SOP-J8
16Kbit
32Kbit
64Kbit
128Kbit
2K×8
4K×8
8K×8
16Kx8
BR35H160-WC
BR35H320-WC
BR35H640-WC
BR35H128-WC
2.5～5.5V
2.5～5.5V
2.5～5.5V
2.5～5.5V
●
●
-
●
●
●
-
●
●
●
●
●
●
●
●
-
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2010.05 - Rev.A
1/16
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD35H□□□-WC Series
●Absolute Maximum Ratings (Ta=25°C)
●Recommended Operating Conditions
Parameter
Impressed Voltage
Symbol
Vcc
Limits
-0.3 to +6.5
560(SOP8)
560(SOP-J8)
410(TSSOP-B8)
380(MSOP8)
Unit
V
Symbol
Vcc
Limits
Unit
V
Parameter
Supply Voltage
Input Voltage
2.5 to 5.5
0 to Vcc
1
2
3
4
*
*
*
*
Vin
Permissible
Dissipation
Pd
mw
Storage
Temperature Range
Operating
℃
Tstg
-65 to +150
℃
Topr
-
-40 to +125
Temperature Range
Terminal Voltage
-0.3 toVcc+0.3
V
＊When using at Ta=25℃ or higher, 4.5mW (*1,*2), 3.3mW (*3) , 3.1 mW (*4)to be reduced per 1℃
●Memory Cell Characteristics (Vcc=2.5V to 5.5V)
●Input / Output Capacitance (Ta=25°C, frequency=5MHz)
Parameter Symbol Conditions Min. Max. Unit
Limits
Typ. Max.
Parameter
Unit
Condition
Min.
1,000,000
500,000
300,000
40
Input
Ta≦85℃
Ta≦105℃
Ta≦125℃
Ta≦25℃
－
－
-
-
-
-
-
-
-
CIN
VIN=GND
8
Cycle
Cycle
Cycle
Years
*6
*6
Capacitance
Output
Endurance*5
-
pF
-
-
-
-
COUT
VOUT=GND
8
Capacitance
Data
*6:Not 100% TESTED
Ta≦105℃
25
Retention *5
Years
Years
Ta≦125℃
20
*5:Not 100% TESTED
●Electrical Characteristics (Unless otherwise specified, Ta=-40 to +125°C, Vcc=2.5 to 5.5V)
Limits
Min. Typ. Max.
Parameter
Symbol
VIH
Unit
V
Conditions
0.7x
Vcc
Vcc
+0.3
0.3x
Vcc
0.4
－
2.5V≦Vcc≦5.5V
“H” Input Voltage
－
－
－
2.5V≦Vcc≦5.5V
IOL=2.1mA
VIL
VOL
VOH
-0.3
V
V
V
“L” Input Voltage
“L” Output Voltage
“H” Output Voltage
0
Vcc
-0.5
-10
-10
Vcc
IOH=-0.4mA
－
－
ILI
ILO
10
10
μA VIN=0V to Vcc
μA VOUT=0V to Vc, CSB=Vcc
Vcc=2.5V,fSCK=5MHz, tE/W=5ms,VIH/VIL=0.9Vcc/0.1Vcc
mA SO=OPEN
Input Leakage Current
Output Leakage Current
2.0 *7
2.5 *8
3.0 *7
5.5 *8
－
－
－
－
－
－
ICC1
ICC2
ICC3
Byte Wrte, Page Write
Operating Current
(Write)
Vcc=5.5V,fSCK=5MHz, tE/W=5ms,VIH/VIL=0.9Vcc/0.1Vcc
mA SO=OPEN
Byte Wirte, Page Write
Vcc=2.5V,fSCK=5MHz, VIH/VIL=0.9Vcc/0.1Vcc
1.5
mA SO=OPEN
Operating Current
(Read)
Read, Read Status Register
Vcc=5.5V,fSCK=5MHz, VIH/VIL=0.9Vcc/0.1Vcc
－
－
－
－
ICC4
ISB
2.0
10
mA SO=OPEN
Read, Read Status Register
Vcc=5.5V
μA
Standby Current
CSB=Vcc, SCK=SI=Vcc or GND, SO=OPEN
* This product is not designed for protection against radioactive rays.
*7 BR35H160/320-WC *8 BR35H640/128-WC
●Block Diagram
VOLTAGE
CSB
INSTRUCTION DECODE
DETECTION
CONTROL CLOCK
SCK
SI
GENERATION
WRITE
HIGH VOLTAGE
GENERATOR
INHIBITION
*9 11bit: BR35H160-WC
12bit: BR35H320-WC
INSTRUCTION
REGISTER
STATUS REGISTER
13bit: BR35H640-WC
14bit: BR35H128-WC
ADDRESS
ADDRESS
11～14bit *9
11～14bit *9
REGISTER
DECODER
16K～128K
EEPROM
DATA
READ/WRITE
AMP
8bit
8bit
REGISTER
SO
Fig.1 Block Diagram
2/16
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
Technical Note
BD35H□□□-WC Series
●Pin Assignment and Description
Vcc
SCK
SI
NC
Terminal Name
Input/Output
Function
Power Supply to be connected
All input / output reference voltage, 0V
Chip select input
BR35H160-WC
BR35H320-WC
BR35H640-WC
BR35H128-WC
Vcc
GND
CSB
SCK
SI
–
–
Input
Input
Input
Output
–
Serial clock input
Start bit, ope code, address, and serial data input
Serial data output
CSB
SO
NC
GND
SO
NC
Fig.2 Pin Assignment Diagram
Non connection
●Operating Timing Characteristics
●Sync data input / output timing
(Ta=-40°C to +125°C, unless otherwise specified, load capacitance CL1=100pF)
tCSS
tCS
2.5≦Vcc≦5.5V
Min. Typ. Max.
CSB
Parameter
SCK frequency
SCK high time
SCK low time
CSB high time
CSB setup time
CSB hold time
SCK setup time
SCK hold time
SI setup time
Symbol
Unit
tSCKS
tRC
tFC
tSCKWH
tSCKWL
tDIS
SCK
fSCK
tSCKWH
tSCKWL
tCS
-
-
-
-
-
-
-
-
-
-
-
-
5
-
-
-
-
-
-
-
-
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tDIH
85
85
85
90
85
90
90
20
30
-
SI
High-Z
SO
Fig.3 Input timing
tCSS
tCSH
tSCKS
tSCKH
tDIS
tDIH
tPD1
Data through SI enters the IC in sync with the data
rise edge of SCK. Please input address and data
starting from the most significant bit MSB.
tCS
SI hold time
-
70
tSCKH
Data output delay time1
Data output delay time2
(CL2=30pF)
Output hold time
Output disable time
SCK rise time
CSB
tCSH
SCK
SI
tPD2
-
-
55
ns
tPD
tRO,tFO
tOZ
tOH
tOH
tOZ
tRC
tFC
0
-
-
-
-
-
-
-
100
1
ns
ns
μs
μs
High-Z
SO
Fig.4 Input / Output timing
*1
SCK fall time
-
1
OUTPUT
rise time
OUTPUT
fall time
tRO
-
-
50
ns
Data through SO is output in sync with the data fall
edge of SCK. Data is output starting from the most
significant bit MSB.
tFO
-
-
-
-
50
5
ns
Write time
tE/W
ms
＊1 NOT 100% TESTED
●AC measurement conditions
Limits
Typ.
Parameter
Symbol
Unit
Min.
Max.
CL1
CL2
-
-
-
-
-
-
-
-
-
-
-
100
30
50
pF
pF
ns
ns
V
Load capacitance 1
Load capacitance 2
Input rise time
Input fall time
50
0.2Vcc / 0.8Vcc
Input voltage
Input / Output judgment voltage
-
0.3Vcc / 0.7Vcc
V
●tOZ measurement condition
IL is the load current that changes the SO voltage to 0.5×Vcc. IL = ±1mA.
After CSB starts to rise, the time needed for SO to change to High-Z is defined with 10% changing point from SO=High or
SO=Low.
0.8Vcc
Signal Input
CL1=100pF
0.7Vcc
CSB
SO
Vcc
NC
CSB
0.2Vcc
Signal Input
Signal Input
IL=±1mA
NC
SCK
High
Low
0.9Vcc
0.1Vcc
GND
SI
0.5Vcc
SO
Fig.5
tOZ measurement circuit
Fig.6
tOZ measurement timing
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
3/16
Technical Note
BD35H□□□-WC Series
●
Characteristic Data
(The following characteristic data are Typ. value.)
6
1
0.8
0.6
0.4
0.2
0
6
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
5
4
3
2
1
0
5
4
3
2
1
0
SPEC
SPEC
SPEC
0
1
2
3
IOL[mA]
4
5
6
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Fig.8 ꢀ"L" input voltageꢀVIL(CSB,SCK,SI)
Fig.9ꢀ"L" output voltageꢀVOL1 (Vcc=2.5V)
Fig.7 "H" input voltage VIH(CSB,SCK,SI)
ꢀ
ꢀ
3.0
2.5
2.0
1.5
1.0
0.5
0.0
12
12
SPEC
SPEC
10
8
10
8
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
6
6
4
4
Ta=-40℃
Ta=25℃
Ta=125℃
2
2
0
0
-1.2
-1
-0.8 -0.6 -0.4 -0.2
IOH[mA]
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Vcc[V]
VOUT[V]
Fig.10ꢀ"H" output voltageꢀVOH1 (Vcc=2.5V)
Fig.11ꢀInput leak current ILI(CSB,SCK,SI)
Fig.12ꢀOutput leak current ILO(SO)
Ta=-40℃
DATA=00h
8.0
6.0
4.0
2.0
0.0
4.0
3.0
2.0
1.0
0.0
2.5
Ta=-40℃
Ta=25℃
Ta=-40℃
Ta=25℃
DATA=00h
SPEC
DATA=00h
SPEC
SPEC
Ta=25℃
Ta=125℃
2.0
1.5
1.0
0.5
0.0
Ta=125℃
Ta=125℃
SPEC
SPEC
SPEC
0
1
2
3
4
5
6
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Vcc[V]
Fig.13ꢀOperating Current (WRITE) ICC1,2
Fig.15ꢀOperating Current (READ) ICC3,4
Fig.14ꢀOperating Current (WRITE) ICC1,2
( BR35H160/320-WC )
( BR35H640/128-WC )
12
10
8
100
10
1
100
80
60
40
20
0
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
6
SPEC
4
Ta=-40℃
Ta=25℃
Ta=125℃
2
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Vcc[V]
Fig.16ꢀStandby Current ISB
Fig.17ꢀSCK frequency fSCK
Fig.18 SCK high timeꢀtSCKWH
100
100
80
60
40
20
0
100
80
60
40
20
0
SPEC
SPEC
SPEC
80
60
40
20
0
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
0
1
2
3
4
5
6
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Vcc[V]
Fig.19 SCK low timeꢀtSCKWL
Fig.20 CSB high timeꢀtCS
Fig.21ꢀCSB setup timeꢀtCSS
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
4/16
Technical Note
BD35H□□□-WC Series
●
Characteristic Data
(The following characteristic data are Typ. value.)
50
40
30
20
10
0
100
80
60
40
20
0
50
40
30
20
10
0
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
SPEC
0
1
2
3
4
5
6
6
6
0
1
2
3
4
5
5
5
6
6
6
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Vcc[V]
Fig.22ꢀCSB hold timeꢀtCSH
Fig.23ꢀSI setup timeꢀtDIS
Fig.24ꢀSI hold timeꢀtDIH
100
80
60
40
20
0
120
100
80
60
40
20
0
100
80
60
40
20
0
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
0
1
2
3
4
5
0
1
2
3
4
0
1
2
3
4
5
6
Vcc[V]
Vcc[V]
Vcc[V]
Fig.25ꢀData output delay time ｔPD1 (CL=100pF)
Fig.26ꢀData utput delay time tPD2
Fig.27ꢀOutput disable time tOZ
100
80
60
40
20
0
100
80
60
40
20
0
8
6
4
2
0
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
Ta=-40℃
Ta=25℃
Ta=125℃
SPEC
SPEC
SPEC
0
1
2
3
4
5
6
0
1
2
3
4
0
1
2
3
4
5
Vcc[V]
Vcc[V]
Vcc[V]
Fig.28 Output rise time tRO
Fig.29 Output fall time tFO
Fig.30 Write cycle time tE/W
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
5/16
Technical Note
BD35H□□□-WC Series
●Features
○Status registers
This IC has status registers. The status register has 8 bits and expresses the following parameters.
WEN is set by the write enable command and write disable command. WEN goes into the write disable status when the
power source is turned off. The R/B bit is for write confirmation and therefore cannot be set externally.
The status register value can be read by use of the read status command.
●Status registers
Product Number
BR35H160-WC
BR35H320-WC
BR35H640-WC
BR35H128-WC
bit 7
0
bit 6
0
bit 5
0
bit 4
0
bit 3
0
bit 2
0
bit 1
bit 0
R/B
WEN
Memory
bit
Function
location
Write and write status register write enable / disable status confirmation bit
WEN
R/B
Register
Register
WEN=0=prohibited
WEN=1=permitted
Write cycle status (READY / BUSY) status confirmation bit
R/B=0=READY
R/B=1=BUSY
●Command mode
Ope code
BR35H160-WC
Command
Contents
BR35H320-WC
BR35H640-WC
BR35H128-WC
Write enable
Write disable
Read
Write enable command
Write disable command
Read command
Write command
Status register read command
WREN
WRDI
READ
WRITE
0000
0000
0000
0000
0000
0110
0100
0011
0010
0101
Write
RDSR Read status register
●Timing chart
1. Write enable (WREN) / disable (WRDI) cycle
WREN (WRITE ENABLE): Write enable
CSB
SCK
SI
0
1
2
3
4
5
6
7
0
0
0
0
0
1
1
0
High-Z
SO
Fig.31 Write enable command
WRDI (WRITE DISABLE): Write disable
CSB
0
1
2
3
4
5
6
7
SCK
SI
0
0
0
0
0
1
0
0
High-Z
SO
Fig.32 Write disable
6/16
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
Technical Note
BD35H□□□-WC Series
○This IC has a write enable status and a write disable status. Write enable status is achieved by the write enable command
and write disable status is achieved by the write disable command. As for these commands, set CSB to LOW and then
input the respective ope codes. The respective commands are accepted at the 7-th clock rise. The command is also valid
with Inputs over 7 clocks.
In order to perform a write command it is necessary to use the write enable command to set the IC to the write enable
status. If a write command is input during write disable status the command will be cancelled. After a write command is
input during write enable status the IC will return to the write disable status. When turning on the power the IC will be in
write disable status.
2. Read command (READ)
CSB
SCK
～～
～～
～～
～～
Product
number
Address
Length
0
1
2
3
4
5
6
7
8
9
11
23
24
30
10
BR35H160-WC
BR35H320-WC
BR35H640-WC
BR35H128-WC
A10-A0
A11-A0
A12-A0
A13-A0
～～
0
0
0
0
0
0
1
1
*
*
A13
A12
A1 A0
～～
SI
～～
～～
～～
～～
High-Z
D7 D6
D2 D1 D0
SO
＊=Don't Care
Fig.33 Read command (BR35H160/320/640/128-WC)
By use of the read command, the data of the EEPROM can be read. As for this command, set CSB to LOW, then input the
address after the read ope code. EEPROM starts data output of the designated address. Data output is started from the
SCK fall of 23 clock and from D7 to D0 sequentially. The IC features an increment read function. After the output of 1 byte
(8bits) of data, by continuing input of SCK the next data addresses can be read. Increment read can read all addresses of
the EEPROM. After reading the data of the most the significant address, by continuing with the increment read the data of
the most insignificant address is read.
3. Write command (WRITE)
Product
number
Address
Length
CSB
～～
～～
～～
～～
0
1
2
3
4
5
6
7
8
9
11
23
24
30
31
BR35H160-WC
BR35H320-WC
A10-A0
A11-A0
10
SCK
～～
～～
～～
A13
A12
A1
A0
D7 D6
D2
～～
D1
D0
0
0
0
0
0
0
1
0
SI
*
*
BR35H640-WC
BR35H128-WC
A12-A0
A13-A0
～～
High-Z
～～
SO
＊=Don't Care
Fig.34 Write command (BR35H160/320/640/128-WC)
CSB valid timing
32n-8 32n-7 32n-2
CSB
SCK
～～
～～
～～
～～
32n-1
32n
～～
0
1
2
3
4
5
6
7
8
12
23
24
25
30
31
32
33
～～
～～
～～
～～
～～
～～
～～
D7
D6
D0
0
0
0
0
0
0
1
0
A1
A0
D7 D6
D1
～～
D0
D7
D6
SI
*
～～
～～
High-Z
～～
SO
Fig.35 N Byte page write command (BR35H160/320/640-WC)
CSB valid timing
64n-8 64n-7 64n-2
CSB
SCK
～～
～～
～～
～～
～～
64n-1 64n
～～
0
1
2
3
4
5
6
7
8
12
23
24
25
30
31
32
33
～～
～～
～～
～～
～～
～～
D7
D6
D0
0
0
0
0
0
0
1
0
A1
A0
D7 D6
D1
～～
D0
D7
D6
SI
*
～～
～～
High-Z
～～
SO
Fig.36 N Byte page write command (BR35H128-WC)
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
7/16
Technical Note
BD35H□□□-WC Series
With the write command data can be written to the EEPROM. As for this command, set CSB to LOW, then input address
and data after inputting the write ope code. Then, by making CSB HIGH, the EEPROM starts writing. The write time of
EEPROM requires time of tE/W (Max 5ms). During tE/W, commands other than the status read command are not accepted.
Start CSB after taking the last data (D0) and before the next SCK clock starts. At other timings the write command will not
be executed and will be cancelled. The IC has page write functionality. After input 1 byte (8bits) of data, by continuing data
input without starting CSB, data up to 32/64*1 bytes can be written in one tE/W. In page write, the insignificant 5/6*2 bit of the
designated address is incremented internally every time 1 byte of data is input, and data is written to the respective
addresses. When data larger then the maximum bytes is input the address rolls over and previously input data is
overwritten.
Write command is executed when CSB rises between the SCK clock rising edge to recognize the 8th bit’s of data input and
the next SCK rising edge. At other timings the write command is not executed and cancelled (Fig.18 valid timing c). In page
write, the CSB valid timing is every 8 bits. If CSB rises at other timings page write is cancelled together with the write
command and the input data is reset.
*1 BR35H160/320/640-WC = Max 32 Bytes
BR35H128-WC
= Max 64 Bytes
*2 BR35H160/320/640-WC = Lower 5 bits
This column addresses are
Top address of this page
This column addresses are
Top address of this page
BR35H128-WC
64byte
= Lower 6 bits
32byte
page0
page 1
page 2
000h 001h 002h ･･･
020h 021h 022h ･･･
040h 041h 042h ･･･
01Eh
03Eh
05Eh
01Fh
03Fh
05Fh
page 0
page 1
page 2
0000h
0040h
0080h
0001h
0041h
0081h
0002h
0042h
0082h
･･･ 003Eh 003Fh
･･･ 007Eh 007Fh
･･･ 00BEh 00BFh
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
・
page m-1 n-63
page *4
n-31
n-62
n-30
n-61 ･･･
n-29 ･･･
n-33
n-1
n-32
*3 n
page m-1
page *6
m
n-127
n-63
n-126
n-62
n-125
n-61
･･･
･･･
n-65
n-1
n-64
*5 n
m
*3 n=8191d=1FFFh: BR35H640-WC
n=4095d=FFFh：BR35H320-WC
n=2047d=7FFh：BR35H160-WC
*4 m=256 : BR35H640-WC
m=127：BR35H320-WC
*5 n=16383d=3FFFh：BR35H128-WC
*6 m=255：BR35H128-WC
This column addresses are the
last address of this page
This column addresses are the
last address of this page
m=63：BR35H160-WC
Fig.37 EEPROM physical address for Page write command (32/64Byte)
●Example of Page write command
No.
①
Addresses of Page0
Previous data
000h
00h
001h
01h
55h
55h
55h
00h
00h
002h
02h
-
････
････
････
････
････
････
････
01Eh
1Eh
-
01Fh
1Fh
-
②
2 bytes input data
After No.②
AAh
AAh
AAh
FFh
FFh
③
02h
AAh
-
1Eh
AAh
-
1Fh
55h
-
④
⑤
34 byte input data
After No.④
AAh
AAh
55h
a：In case of input the data of No.② which is 2 bytes page write command for the data of No.①, EEPROM data changes
like No.③.
b：In case of input the data of No.④ which is 34 bytes page write command for the data of No.①, EEPROM data changes
like No.⑤.
c：In case of a or b, when write command is cancelled, EEPROM data keep No.①.
In page write command, when data is set to the last address of a page (e.g. address “03Fh” of page 1), the next data will be
set to the top address of the same page (e.g. address “020h” of page 1). This is why page write address increment is
available in the same page. As a reference, if of 32 bytes, page write command is executed for 2 bytes the data of the other
30 bytes without addresses will not be changed.
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2010.05 - Rev.A
8/16
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD35H□□□-WC Series
4.Status register read command
CSB
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
0
0
0
0
0
1
0
1
SI
bit7
bit6
bit5
bit4
bit3
bit2
bit1
WEN
bit0
R/B
High-Z
0
0
0
0
0
0
SO
Fig.38 Status register read command (BR35H160/320/640/128-WC)
The EEPROM status can be read by use of the status register read command. For this command set CSB to Low then input
the ope code of the status register read command followed by the clock input as shown above. The data of status register
will then be read out. This command features increment functionality. When clock input is continued during CSB=Low, 8
bytes of status register data will be continuously read out. When this command is executed from the start of write
programming to the end of write programming, the end of write programming can be confirmed by checking the following
changes: WEN=Low followed by R/B=Low. After confirming the end of write programming, before inputting the next
command CSB first needs to be High and then put back to Low.
●At standby
○Current at standby
Set CSB “H”, and be sure to set SCK, SI input “L” or “H”. Do not input intermediate electric potantial.
○Timing
As shown in Fig.15, at standby, when SCK is “H”, even if CSB falls, SI status is not read at fall edge. SI status is read at
SCK rise edge after fall of CSB. At standby and at power ON/OFF, set CSB “H” status
Even if CSB is fallen at SCK=SI=”H”,
SI status is not read at that edge.
CSB
Command start here. SI is read.
SCK
0
1
2
SI
Fig.39 Operating timing
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
9/16
Technical Note
BD35H□□□-WC Series
●Method to cancel each command
○READ
・Cancellation method: cancel by CSB = “H”
Ope code
8 bits
Address
Data
8 bits/16bits
8 bits
Cancel available in all areas of read mode
Fig.40 READ cancel valid timing
○RDSR
・Cancellation method: cancel by CSB = “H”
Data
Ope code
8 bits
8 bits
Cancel available in all
areas of rdsr mode
Fig.41 RDSR cancel valid timing
○WRITE, PAGE WRITE
a：Ope code, address input area.
Address
16bits
Data
tE/W
Ope code
8bits
Cancellation possible by CSB=”H”
8bits
b
b：Data input area (D7~D1 input area)
Cancellation possible by CSB=”H”
a
d
c
c：Data input area (D0 area)
Write starts after CSB rise.
SCK
SI
After CSB rise, cancellation is no longer possible.
d：tE/W area.
D7 D6 D5 D4 D3 D2 D1 D0
Cancellation is possible by CSB = “H”. However, when
write starts (CSB rise) in area c, cancellation is no
longer possible. Also, cancellation is not possible by
continues inputting of SCK clock. In page write
mode, there is a write enable area at every 8 clocks.
c
b
Fig.42 WRITE cancel valid timing
Note 1) If Vcc is set to OFF during execution of write the data of the designated address is not guaranteed. Please
execute write again.
Note 2) If CSB rises at the same timing as that the SCK rises, write execution / cancel will become unstable.
Therefore, it is recommended to let CSB rise in the SCK = “L” area. As for SCK rise, ensure a timing of tCSS /
tCSH or higher.
○WREN/WRDI
6
7
8
SCK
a：From ope code to 7-th clock rise, cancel by CSB = “H”.
b：Cancellation is not possible when CSB rises after the 7-th clock.
8 bist
a
b
Fig.43 WREN/WRDI cancel valid timing
www.rohm.com
2010.05 - Rev.A
10/16
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD35H□□□-WC Series
●High speed operations
In order to realize stable high speed operations, pay attention to the following input / output pin conditions.
○Input pin pull up, pull down resistance
When attaching pull up, pull down resistance to the EEPROM input pin, select an appropriate value for the microcontroller
VOL, IOL from the VIL characteristics of this IC.
○Pull up resistance
VCC-VOLM
RPU
≥
･･･①
･･･②
Microcontroll IOLM
VOLM
EEPROM
VILE
RPU
IOLM
VILE
VOLM
≤
“L” output
“L” input
Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA,
Fig.44 Pull up resistance
from the equation ①,
5－0.4
RPU≧
2×10-3
∴RPU≧
2.3[kΩ]
With the value of Rpu to satisfy the above equation, VOLM
becomes 0.4V or lower, and with VILE (=1.5V), the equation ② is
also satisfied.
・VILE :EEPROM VIL specifications
・VOLM :Microcontroller VOL specifications
・IOLM :Microcontroller IOL specifications
Also, in order to prevent malfunction or erroneous write at power ON/OFF, be sure to make CSB pull up.
○Pull down resistance
VOHM
RPD≧
･･･③
･･･④
IOHM
Microcontroll
VOHM
EEPROM
VIHE
VOHM≧
VIHE
“H” output
RPD
“H” input
Example) When VCC=5V, VOHM=VCC-0.5V, IOHM＝0.4mA,
VIHE=VCC×0.7V, from the equation③,
IOHM
5－0.5
RPD≧
Fig.45 Pull down resistance
0.4×10-3
∴RPU≧
11.3[kΩ]
The operations speed changes according to the amplitude VIHE, VILE of the signals input to the EEPROM. More stable
high speed operations can be realized by inputting signals with Vcc / GND levels of amplitude. On the contrary, when
signals with an amplitude of 0.8Vcc / 0.2Vcc are input, operation speed slows down.*1
In order to realize more stable high speed operation, it is recommended to set the values of RPU, RPD as large as possible,
and to have the amplitude of the signals input to the EEPROM close to the Vcc / GND amplitude level.
(*1 In this case, the guaranteed value of operating timing is guaranteed.)
○SO load capacitance condition
The load capacitance of the SO output pin affects the SO output delay characteristic. (Data output delay time, time from
HOLDB to High-Z, output rise time, output fall time.). Make the SO load capacitance small to improve the output delay
characteristic.
EEPROM
SO
CL
Fig.46 SO load dependency of data output delay time tPD
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
11/16
Technical Note
BD35H□□□-WC Series
○Other cautions
Make all wires from the microcontroller to EEPROM input pin the same length. This in order to prevent setup / hold violation
to the EEPROM.
●Equivalent circuit
○Output circuit
SO
OEint.
Fig.47 SO output equivalent circuit
○Input circuit
RESETint.
CSB
Fig.48 CSB input equivalent circuit
SCK
SI
Fig.49 SCK input equivalent circuit
Fig.50 SI input equivalent circuit
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
12/16
Technical Note
BD35H□□□-WC Series
●Notes on power ON/OFF
○At power ON/OFF set CSB=”H” (=Vcc).
When CSB is “L”, the IC goes into input accept status (active). If power is turned on in this status noises, etc. may cause
malfunction or erroneous write. To prevent this, set CSB to “H” at power ON. (When CSB is in “H” status, all inputs are
canceled.)
Vcc
Vcc
CSB
GND
Good
Bad
example
example
Fig.51 CSB timing at power ON/OFF
(Good example) CSB terminal is pulled up to Vcc.
After turning power off allow for 10ms or more before turning power on again. If power is turned on without observing
this condition, the IC internal circuit may not be reset.
(Bad example) CSB terminal is “L” at power ON/OFF.
In this case, CSB always becomes “L” (active status), and the EEPROM may malfunction or perform an erroneous
write due to noises, etc.
This can even occur when CSB input is High-Z.
○LVCC circuit
LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power and prevents erroneous write.
At LVCC voltage (Typ. =1.9V) or below, it prevents data rewrite.
○P.O.R. circuit
This IC has a POR (Power On Reset) circuit as countermeasure against erroneous write. After the POR operation is
performed, write disable status is entered. The POR circuit is only valid when power is ON and does not work when power is
OFF. When power is ON and the following recommended tR, tOFF, Vbot conditions are not satisfied, write enable status
might be entered due to noise etc.
tR
Vcc
Recommended conditions for tR, tOFF, Vbot
tR
tOFF
Vbot
10ms or below
10ms or below
10ms or higher
10ms or higher
0.3V or below
0.2V or below
tOFF
Vbot
0
Fig.52 Rise waveform
●Noise countermeasures
○Vcc noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur. To prevent this, it is recommended to attach a
bypass capacitor (0.1μF) between IC Vcc and GND, as close to IC as possible.
It is also recommended to attach a bypass capacitor between the board Vcc and GND.
○SCK noise
When the rise time of SCK (tRC) is long and a there is a certain degree of noise, malfunction may occur due to clock bit
displacement. To avoid this, a Schmitt trigger circuit is built in the SCK input. The hysteresis width of this circuit is set to
about 0.2V. If noises exist at the SCK input set the noise amplitude to 0.2Vp-p or below. Also, it is recommended to set the
rise time of SCK (tRC) to 100ns or below. In case the rise time is 100ns or higher, sufficient noise countermeasures are
needed. Clock rise, fall time should be as small as possible.
www.rohm.com
2010.05 - Rev.A
13/16
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD35H□□□-WC Series
●Notes for use
(1) Described numeric values and data are design representative values and not guaranteed.
(2) We believe that the application circuit examples are recommendable. However, in actual use, please sufficiently further
characteristics. When changing the fixed number of external parts, make your decision with sufficient margin, in
consideration of static characteristics, transition characteristics and fluctuations of external parts and our LSI.
(3) Absolute maximum ratings
If the absolute maximum ratings such as impressed voltage, operating temperature range, etc. are exceeded, the LSI
might be damaged. Please do not impress voltage or temperature exceeding the absolute maximum ratings. In case of
fear of exceeding the absolute maximum ratings please take physical safety countermeasures such as fuses and see to it
that conditions exceeding the absolute maximum ratings are impressed to LSI.
(4) GND electric potential
Set the voltage of the GND terminal as low as possible with all action conditions. Ensure that that all terminal voltages are
higher than that of the GND terminal.
(5) Heat design
In consideration of permissible dissipation in actual use condition, please carry out the heat design with sufficient margin.
(6) Inter-terminal short circuit and wrong packaging
When packaging the LSI onto a board, pay sufficient attention to the LSI direction and displacement. Wrong packaging may
damage LSI. Short circuit between LSI terminals, terminals and power source, terminal and GND due to foreign matters may
also result in LSI damage.
(7) Use in strong electromagnetic fields may cause malfunction. Therefore, please evaluate the design sufficiently.
www.rohm.com
2010.05 - Rev.A
14/16
© 2010 ROHM Co., Ltd. All rights reserved.
Technical Note
BD35H□□□-WC Series
●Ordering part number
3 5
H
1 6 0
W C
E 2
F
B R
Double cell
Rohm type
Capacity
160=16K
320=32K
640=64K
128=128K
Package
FVM : MSOP8
FVT : TSSOP-B8
: SOP8
FJ : SOP-J8
Packaging and forming
specification
E2：Embossed tape and reel
TR：Embossed tape and reel
(MSOP8 package only)
Operating
temperature
H:-40℃ to +125℃
BUS type
35：SPI
F
●Package specifications
SOP8
<Tape and Reel information>
5.0± 0.2
(MAX 5.35 include BURR)
Tape
Embossed carrier tape
2500pcs
+
−
6
°
4°
4
°
Quantity
8
1
7
6
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
2
3
4
0.595
+0.1
0.17
-
0.05
S
0.1
S
1.27
Direction of feed
1pin
0.42± 0.1
Reel
Order quantity needs to be multiple of the minimum quantity.
(Unit : mm)
∗
SOP-J8
<Tape and Reel information>
4.9± 0.2
(MAX 5.25 include BURR)
Tape
Embossed carrier tape
+
6°
4°
−4°
Quantity
2500pcs
8
7
6
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
2
3
4
0.545
0.2± 0.1
S
1.27
0.42± 0.1
0.1
Direction of feed
1pin
S
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
TSSOP-B8
<Tape and Reel information>
3.0± 0.1
(MAX 3.35 include BURR)
Tape
Embossed carrier tape
4 ± ±4
8
7
6
5
Quantity
3000pcs
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
2
3
4
1PIN MARK
+0.05
0.145
−0.03
0.525
S
0.08 S
+0.05
0.245
M
−0.04
0.08
Direction of feed
1pin
0.65
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
15/16
Technical Note
BD35H□□□-WC Series
●Package specifications (Continue)
MSOP8
<Tape and Reel information>
2.9± 0.1
Tape
Embossed carrier tape
3000pcs
(MAX 3.25 include BURR)
+
6°
4°
Quantity
−4°
8
7
6
5
TR
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
2
3
4
1PIN MARK
+0.05
1pin
+0.05
−0.03
0.145
0.475
S
0.22
−0.04
0.08
S
Direction of feed
0.65
Reel
(Unit : mm)
Order quantity needs to be multiple of the minimum quantity.
∗
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.05 - Rev.A
16/16
Notice
N o t e s
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-
controller or other safety device). ROHM shall bear no responsibility in any way for use of any
of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to
obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
R1010
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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