BM81028AMWV_技术文档

Datasheet

Power Supply IC Series for TFT-LCD Panels

Multi-Channel

System Power Supply IC

BM81028AMWV

●General Description

●Features

BM81028AMWV is a system power supply IC for

TFT-LCD panels which are used in monitors, notebook

type displays, and tablets.

 Input voltage range:

 Standby current:

 Operating temperature range:

2.7V to 5.5V

1.4μA (Typ)

-40℃ to +85℃

This IC incorporates HAVDD, VCOM amplifier in addition

to the power supply for panel driver (SOURCE, GATE,

and LOGIC power supplies).

Moreover, this IC has a built-in EEPROM for sequence

and output voltage setting retention.

 Step-down DC/DC converter 2-channels

(Synchronous rectification)

 Step-up DC/DC converter

(Integrated load switch and Synchronous rectification)

 HAVDD amplifier (8bit Resolution)

 VCOM amplifier (8bit Resolution)

 Positive charge pump (Integrated diode)

 Negative charge pump

●Applications

TFT-LCD Panels which are used in

Monitors, Note PCs and Tablets.

 I²C Interface Output Voltage Setting Control Function

(Integrated EEPROM)

 Switching frequency switching function

(600kHz,1200kHz)

 Protection circuits



Under-Voltage Lockout

Thermal Shut Down

Over-Current Protection

Over-Voltage Protection

Short Circuit Protection (Timer Latch type)

 Input tolerant (SCL, SDA,EN)

●Package

UQFN28V4040A

W(Typ) D(Typ) H(Max)

4.0mm x 4.00mm x 1.00m

●Typical Application Circuit

Fig.1. Typical Application Circuit

○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays

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●Pin Configuration

Fig.2 Pin Configuration

●Pin Descriptions

No.

Name

Function

No.

15

16

17

18

19

20

21

22

23

24

25

26

27

28

Name

SWB1

PVCC1

SWB2

PGND2

SW

1

2

DRN

Negative charge pump driver pin

Step-down DC/DC switching pin 1

AVDDP AVDD input

Step-down DC/DC power supply input

Step-down DC/DC switching pin 2

Step-down/-up DC/DC ground

Step-up DC/DC switching pin

Step-up DC/DC output

3

HAVDD HAVDD amplifier output

VCOM VCOM amplifier output

4

5

GND

Ground

6

FAULT FAULT signal output

AVDD

7

VCC

SCL

Power supply input

AVDD_S Step-up DC/DC output feedback

8

Serial clock input (I2C)

PVCC2

VLSO

VGL

Step-up DC/DC load switch input

Step-up DC/DC load switch output

Negative charge pump feedback

9

SDA

Serial clock data input (I2C)

Enable input

10

11

12

13

14

EN

VREG

VDD2

VDD1

Inner power supply output

Step-down DC/DC output feedback input 2

Step-down DC/DC output feedback input 1

CPGND Charge pump ground

VGH

CPP

DRP

Positive charge pump feedback

Built-in Positive charge pump switching Di output

Positive charge pump driver pin

PGND1 Step-down DC/DC ground

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●Block Diagram

VCC

7

erramp

pwmcomp

VDD1

SWB1

soft start

driver

15

PGND1

14

13

vref

VDD1

PVCC1

16

erramp

pwmcomp

SWB2

soft start

driver

17

PGND2

18

12

VREG

11

vreg

VDD2

PVCC2

22

23

load SW

VLSO

SW

Internal Regulator

19

20

21

erramp

AVDD

register

DAC

pwmcomp

driver

AVDD_S

EEPROM

soft start

PGND2

AVDD

DAC

SCL

SDA

8

9

register

logic

HAVDD

3

AVDD

DAC

EN 10

control

osc

register

4

AVDD

VDD1

VDD2

CP_CLK

Internal Regulator

AVDDP

DRP

OSCGND

2

erramp

DAC

28

driver

CPGND

VGH

25

26

soft start

level shift

CPP

27

Internal Regilator

erramp

6

register

DAC

DRN

FAULT

fault

1

driver

CPGND

soft start

GND

5

VGL

24

Fig.3 Block Diagram

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●Function Description of Each Block

Enumerated below are the different blocks and the output voltages they generate. Also, discussed are the protection circuits

that can shut down each block to prevent IC destruction.

All output voltages generated by each block, startup order, and delay time (DELAY1 and DELAY2) can be set through the

EEPROM. Upon start-up, these settings are read from the EEPROM and copied to the registers.

①

②

③

④

⑤

Buck Converter Block (VDD1, VDD2)

Generates the VDD1 and VDD2 voltages after VCC UVLO release at EN=High.

This block shuts down when SCP or OCP is detected.

Boost Converter Block (AVDD)

Generates the AVDD voltage after the configured DELAY2 time.

This block shuts down when OVP, SCP, or OCP is detected.

HAVDD Amp Block (HAVDD)

Generates the HAVDD voltage based on the AVDD voltage.

Thus, the HAVDD voltage is produced after the AVDD voltage.

VCOM Amp Block (VCOM)

Generates the VCOM voltage based on the AVDD voltage.

Thus, the VCOM voltage is produced after the AVDD voltage.

Positive Charge Pump Block (VGH)

Generates the VGH voltage based on the AVDD voltage.

Thus, the VGH voltage is produced after the AVDD voltage.

This block shuts down when SCP is detected.

⑥

Negative Charge Pump Block (VGL)

Generates the VGL voltage based on the AVDD voltage.

It starts up after the configured DELAY2 time.

This block shuts down when SCP is detected.

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●Absolute Maximum Ratings

LIMITS

TYP

－

PARAMETER

SYMBOL

Unit

V

MIN

-0.3

-15

MAX

6.5

Power Supply Voltage

VCC, PVCC1, PVCC2

SWB1, SWB2

VDD1, VDD2

AVDD, AVDDP, SW

VLSO

－

PVCC1+0.3

V

－

6.5

－

19

6.5

V

－

V

HAVDD, VCOM

DRP, DRN

CPP

－

AVDDP+0.3

30

V

Output Pin

－

V

－

V

VGH,

－

36

V

VGL

－

0.3

V

VREG

-0.3

－

VCC+0.3

6.5

V

FAULT

－

V

Functional Pin Voltage

Maximum Junction temperature

Power Dissipation

SCL, SDA, EN

Tjmax ⁽¹⁾

－

6.5

V

－

150

℃

W

℃

Pd ⁽²⁾

2.01

－

Operating Temperature Range

Topr

-40

-55

85

Storage Temperature Range

Tstg

－

150

(1) Junction temperature at storage time.

(2) JEDEC standard (4 layers)

●Recommended Operating Ratings(T_A=-40℃to +85℃)

PARAMETER

SYMBOL

MIN

2.7

TYP

MAX

5.5

Unit

V

Power Supply Voltage 1

( DC/DC Block Protection

Detection Voltage 1 setting)

－

Power Supply Voltage 2

( DC/DC Block Protection

Detection Voltage 2 setting)

2.9

3.1

3.3

－

5.5

V

VCC,PVCC1,PVCC2

Power Supply Voltage 3

( DC/DC Block Protection

Detection Voltage 3 setting)

Power Supply Voltage 4

( DC/DC Block Protection

Detection Voltage 4 setting)

SWB1,SWB2 Current

SW Current

ISW1

ISW2

－

1.0

1.5

A

Functional Pin Voltage

EN

-0.1

－

5.5

V

2 Line Serial Pin Voltage

2 Line Serial Frequency

SDA, SCL

FCLK

-0.1

－

5.5

V

－

400

kHz

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●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V)

1. Buck DC/DC converter block 1 (VDD1)

LIMITS

PARAMETER

SYMBOL

VDD1

Unit

V

Condition

50mV step

MIN

TYP

MAX

1.7

2.4

－

1.9

2.6

Output Voltage Range

1.782

2.475

1.8

2.5

1.818

2.525

V

VDD1=1.8V setting

VDD1=2.5V setting

The time where 90% of set

voltage is reached.

Output Voltage Accuracy

Soft Start time

VDD1_R

VDD1_SS

0.5

1

2

msec

Timer Latch Starting Time

SWB1 H Side ON Resistance

SWB1 L Side ON Resistance

SWB1 H Side Leak Current

SWB1 L Side Leak Current

Current Limit

VDD1_SCP

RON_H1

RON_L1

IL_H1

－

1.0

－

VDD1×0.8

－

480

10

V

mΩ

µA

A

300

0

IL_L1

0

10

ILMT_SWB1

DISR_VDD1

1.5

25

－

Discharge Resistance

50

Ω

2. Buck DC/DC converter block 2 (VDD2)

LIMITS

TYP

－

PARAMETER

SYMBOL

Unit

Condition

MIN

1.1

MAX

1.3

Output Voltage Range

VDD2

V

50mV step

Output Voltage Accuracy

VDD2_R

1.188

1.2

1.212

VDD2=1.2V setting

The time where 90% of set

voltage is reached.

Soft Start Time

VDD2_SS

0.5

1

2

msec

Timer Latch Starting Time

SWB2 H Side On Resistance

SWB2 L Side On Resistance

SWB2 H Side Leak Current

SWB2 L Side Leak Current

Current Limit

VDD2_SCP

RON_H2

RON_L2

IL_H2

－

1.0

－

VDD2×0.8

－

480

10

V

mΩ

µA

A

300

0

IL_L2

0

10

ILMT_SWB2

DISR_VDD2

1.5

25

－

Discharge Resistance

50

Ω

3. Boost DC/DC converter block (AVDD)

LIMITS

TYP

－

PARAMETER

SYMBOL

Unit

Condition

MIN

8.0

MAX

14.5

Output Voltage Range

AVDD

V

0.1V step

Output Voltage Accuracy1

Output Voltage Accuracy2

AVDD_R1

AVDD_R2

10.395

-1.0

10.5

0

10.605

+1.0

AVDD=10.5V setting

AVDD=9.7 to 11.2V setting

%

AVDD=8.0 to 9.6V,

11.3 to 12.8V setting

AVDD=12.9 to 14.5V

setting

Output Voltage Accuracy3

Output Voltage Accuracy4

AVDD_R3

AVDD_R4

-1.7

-2.0

0

+1.7

+2.0

%

Load Switch Soft Start time

Soft Start Time

LS_SS

AVDD_SS

AVDD_SCP

AVDD_OVP

RON_H3

RON_L3

IL_H3

1

2

4

msec

3.5

－

1.5

－

80

－

5

6.5

－

msec AVDD=10.5V setting

Timer Latch Starting Time

Over-Voltage Protection voltage

SW H Side On Resistance

SW L Side On Resistance

SW H Side Leak Current

SW L Side Leak Current

Current Limit

AVDD×0.8

V

16

350

0

－

560

10

mΩ

µA

A

IL_L3

0

10

ILMT_SW

RON_LS

DMAX

2.0

250

90

－

Load Switch ON Resistor

Maximum Duty

400

－

mΩ

%

Discharge Resistance

DISR_AVDD

25

50

Ω

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●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V)

4. HAVDD amplifier block (HAVDD)

LIMITS

PARAMETER

SYMBOL

Unit

Condition

MIN

TYP

MAX

0.6×

AVDD-

3.1875

0.6×

Output Voltage Range

Resolution

Integral Non-Linearity Error

(INL)

HAVDD

－

V

12.5mV step

AVDD

RES1

INL1

－

8

－

Bit

-1

－

+1

LSB Input code: 02h to FDh

Differential Non-Linearity Error

(DNL)

DNL1

-1

－

+1

Output Current Ability (Source)

Output Current Ability (Sink)

Load Stability

ISOURCE1

ISINK1

∆VO1

－

200

10

－

70

mA

Io=-15mA to +15mA

mV

Slew Rate

SR1

20

V/µsec

－

5. VCOM amplifier block (VCOM)

PARAMETER

LIMITS

TYP

SYMBOL

VCOM

Unit

Condition

MIN

MAX

0.45×

AVDD-

3.1875

0.45×

AVDD

Output Voltage Range

Resolution

Integral Non-Linearity Error

(INL)

Differential Non-Linearity Error

(DNL)

Output Current Ability

(Source)

－

V

12.5mV step

RES2

INL2

－

8

－

Bit

-1

－

+1

LSB Input code: 02h to FDh

DNL2

VOL2

-1

－

+1

－

200

－

mA

Output Current Ability (Sink)

Load Stability

ISOURCE2

ISINK2

－

200

10

－

Io=-15mA to +15mA

70

mV

V/µsec

Ω

Slew Rate

SR2

20

－

Discharge Resistor

DISR_VCOM

50

100

6. Positive charge pump block (VGH)

PARAMETER

LIMITS

SYMBOL

Unit

Condition

MIN

13

TYP

MAX

26

Output Voltage Range

Output Voltage Accuracy

Soft Start time

VGH

－

V

0.2V step

VGH_R

17.1

3.5

－

18

18.9

6.5

－

VGH=18V setting

VGH_SS

VGH_SCP

RON_H4

RON_L4

RON_H4

RON_L4

DISR_VGH

5

VGH×0.8

5

msec VGH=18V setting

Timer Latch Starting Time

DRP H Side On Resistance

DRP L Side On Resistance

CPP H Side On Resistance

CPP L Side On Resistance

Discharge Resistance

V

Ω

－

10

－

10

－

10

－

150

300

7. Negative charge pump block (VGL)

PARAMETER

LIMITS

SYMBOL

Unit

Condition

MIN

-9.5

-6.3

3.5

－

TYP

MAX

-4

Output Voltage Range

Output Voltage Accuracy

Soft Start time

VGL

－

V

0.1V step

VGH=-6.0V setting

VGL_R

-6

-5.7

6.5

－

VGL_SS

VGL_SCP

RON_H5

RON_L5

DISR_VGL

5

VGL×0.8

5

msec

V

Timer Latch Starting Time

DRN H Side On Resistance

DRN L Side On Resistance

Discharge Resistance

－

Ω

－

10

－

Ω

－

250

500

Ω

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●Electrical Characteristics (Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V)

8. Overall (Entire device)

LIMITS

PARAMETER

SYMBOL

Unit

Condition

MIN

TYP

MAX

【Inside Regulator Voltage】

VREG Output Voltage

Load Stability

VREG

2.15

2.3

20

2.45

100

V

⊿V

－

mV

IVREG=20mA

【Oscillator Block】

DC/DC Block

Oscillating Frequency 1

DC/DC Block

Oscillating Frequency 2

Charge Pump block

Oscillating Frequency 1

Charge Pump block

Oscillating Frequency 2

FOSC1

FOSC2

480

960

240

480

600

1200

300

720

1440

360

KHz

FOSC1_CP

FOSC2_CP

600

720

【Under Voltage Lock Out (UVLO) Circuit】

UVLO return voltage

UVLO detection voltage

Hysteresis

VUVLO

2.2

1.9

-

2.4

2.1

0.3

2.6

2.3

-

V

VDET

VHYS

【DC/DC Block Under-Voltage Lockout Circuit Block】

DC/DC Block

Protection Detection Voltage 1

DC/DC Block

Protection Detection Voltage 2

DC/DC Block

Protection Detection Voltage 3

DC/DC Block

Protection Detection Voltage 4

DC/DC Block

Protection Return Voltage 1

DC/DC Block

Protection Return Voltage 2

DC/DC Block

Protection Return Voltage 3

DC/DC Block

Protection Return Voltage 4

UVLO is released when

VCC exceeds 2.8V.

DC_DET1

2.35

2.55

2.75

2.95

2.55

2.75

2.95

3.15

2.5

2.7

2.9

3.1

2.7

2.9

3.1

3.3

2.65

2.85

3.05

3.25

2.85

3.05

3.25

3.45

V

UVLO is released when

VCC exceeds 3.0V.

DC_DET2

UVLO is released when

VCC exceeds 3.2V.

DC_DET3

UVLO is released when

VCC exceeds 3.4V.

DC_DET4

DC_REL1

DC_REL2

DC_REL3

DC_REL4

【FAULT Signal Output Block】

Output Off Leak Current

Output On Resistance

IFL

－

0

1

10

2

uA

RON_F

kΩ

【Control Signal Block1 SDA, SCL】

Minimum Output Voltage

VSDA

VIH1

－

0.4

V

ISDA=3mA

VCC=2.5～5.5V

Ta=-40～+85℃

VCC=2.5～5.5V

Ta=-40～+85℃

H Level Input Voltage

L Level Input Voltage

1.7

－

VIL1

－

0.6

V

【Control Signal Block2 EN】

Pull-Down Resistance Value

RCTL2

VIH2

280

1.7

400

520

kΩ

VCC=2.5～5.5V

Ta=-40～+85℃

VCC=2.5～5.5V

Ta=-40～+85℃

H Level Input Voltage

L Level Input Voltage

－

V

VIL2

－

0.6

V

【Overall】

Standby Consumption Current

Consumption Current

ICC1

ICC2

0.8

1.7

1.4

3.2

2.0

4.7

µA

EN=L

EN=H, No switching

mA

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

5

4

3

2

1

0

5

4

3

2

1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

VCC supply voltage [V]

Fig.4 Standby Current

VCC supply voltage [V]

Fig.5 Circuit Current No switching

（

）

800

750

700

650

600

550

500

450

400

1400

1350

1300

1250

1200

1150

1100

1050

1000

0

1

2

3

4

5

6

0

1

2

3

4

5

6

VCC supply voltage [V]

Fig.6 Switching Frequency(600kHz

VCC supply voltage [V]

Fig.7 Switching Frequency (1200kHz

）

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

EN

5[V/div.]

VDD1

1[V/div.]

I_Vcc

100[mA/div.]

1[ms/div.]

Fig.8 VDD1Start-up Sequence

Fig.9 VDD1 Off Sequence

VDD1

20[mV/div.]

I_LOAD

50[mA/div.]

100[us/div.]

Fig.10 VDD1Load Transient

(25mA 75mA,tr=4us)

Fig.11 VDD1Load Transeint

(75mA 25mA,tf=4us)

→

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●Reference

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

100

80

60

40

20

0

3

2

1

0

-1

-2

-3

0

100

200

300

400

500

0

100

200

300

400

500

load [mA]

Fig.12 VDD1 Efficiency

Fig.13 VDD1Load Regulation

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

EN

5[V/div.]

VDD2

1[V/div.]

I_Vcc

100[mA/div.]

1[ms/div.]

Fig.14 VDD2 Start-up Sequence

Fig.15 VDD2 Off Sequence

VDD2

20[mV/div.]

I_LOAD

50[mA/div.]

100[us/div.]

Fig.16 VDD2 Load Transient

(50mA 250mA,tr=4us)

Fig.17 VDD2 Load Transient

(250mA 50mA,tf=4us)

→

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

100

80

60

40

20

0

3

2

1

0

-1

-2

-3

0

100

200

300

400

500

0

100

200

300

400

500

load [mA]

Fig.18 VDD2 Efficiency

Fig.19 VDD2 Load Regulation

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

VDD2

EN

1[V/div.]

5[V/div.]

AVDD

3[V/div.]

I_Vcc

500[mA/div.]

2[ms/div.]

Fig.20 AVDD Start-up Sequence

Fig.21 AVDD Off Sequence

⊿V=94mV

⊿t=150uS

⊿V=82mV

⊿t=150uS

AVDD

100[mV/div.]

I_LOAD

50[mA/div.]

100[us/div.]

Fig.22 AVDD Load Transient

Fig.23 AVDD Load Transient

(10mA 70mA,tr=4us)

(70mA 10mA,tf=4us)

→

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

100

80

60

40

20

0

3

2

1

0

-1

-2

-3

0

50

100

150

200

250

300

0

50

100

150

200

250

300

load [mA]

Fig.24 AVDD Efficiency

Fig.25 AVDD Load Regulation

16

14

12

10

8

6

110

120

130

140

Digital Codes

Fig.26 AVDD Linearity

150

160

170

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

VDD2

1[V/div.]

AVDD

5[V/div.]

VGH

AVDD

5[V/div.]

VGH

5[V/div.]

I_Vcc

500[mA/div.]

2[ms/div.]

Fig.27 VGH Start-up Sequence

Fig.28 VGH Off Sequence

3

2

27

24

21

18

15

12

1

0

-1

-2

-3

0

2

4

6

8

10

125

135

145

155

Digital Codes

Fig.30 VGH Linearity

165

175

185

load [mA]

Fig.29 VGH Load Regulation

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

VDD2

1[V/div.]

AVDD

5[V/div.]

VGL

AVDD

5[V/div.]

VGL

5[V/div.]

I_Vcc

500[mA/div.]

2[ms/div.]

Fig.31 VGL Start-up Sequence

Fig.32 VGL Off Sequence

3

2

-2

-4

1

0

-6

-1

-2

-3

-8

-10

0

2

4

6

8

10

55

65

75

Digital Codes

Fig.34 VGL Linearity

85

95

105

load [mA]

Fig.33 VGL Load Regulation

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

3

2

3

2

1

0

-1

-2

-3

-1

-2

-3

0

50

100

Sink Current [mA]

Fig.35 HAVDD Sink Current

150

200

250

300

0

50

100

Source Current [mA]

Fig.36 HAVDD Source Current

150

200

250

300

HAVDD

2[V/div.]

21.6 [V/us]

18.0 [V/us]

200[ns/div.]

Fig.37 HAVDD Slew Rate Rise

Fig.38 HAVDD Slew Rate Fall

（）

（

）

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

1

0.8

0.6

0.4

0.2

0

1

0.8

0.6

0.4

0.2

0

-0.2

-0.4

-0.6

-0.8

-1

-0.2

-0.4

-0.6

-0.8

-1

0

50

100

150

200

250

300

0

50

100

150

200

250

300

Digital Codes

Fig.39 HAVDD INL

Digital Codes

Fig.40 HAVDD DNL

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

3

2

3

2

1

0

-1

-2

-3

-1

-2

-3

0

50

100

150

200

250

300

0

50

100

150

200

250

300

Sink Current [mA]

Fig.41 VCOMSink Current

Source Current [mA]

Fig.42 VCOMSource Current

VCOM

2[V/div.]

21.0 [V/us]

17.0 [V/us]

200[ns/div.]

Fig.43 VCOMSlew Rate Rise

Fig.44 VCOMSlew Rate Fall

（）

（

）

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●Reference Data

(Unless otherwise specified, Ta=25℃, VCC, PVCC1, PVCC2=3.3V, VDD1=2.5V, VDD2=1.2V,

AVDD=10.5V, VGH=18V, VGL=-6V, HAVDD=5.25V, VCOM=3.25V, no load)

1

0.8

0.6

0.4

0.2

0

1

0.8

0.6

0.4

0.2

0

-0.2

-0.4

-0.6

-0.8

-1

-0.2

-0.4

-0.6

-0.8

-1

0

50

100

150

200

250

300

0

50

100

150

200

250

300

Digital Codes

Fig.45 VCOMINL

Digital Codes

Fig.46 VCOMDNL

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●Timing Chart1

●Start-up Sequence (when operated by EN control)

Fig.47 Start-Up Sequence Diagram (when operated by EN control)

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●Timing Chart1

●OFF Sequence (when operated by EN control)

Fig.48 OFF Sequence Block (when operated by EN control)

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●Timing Chart2

●Start-up Sequence (when operated with EN= VCC condition)

Fig.49 Start-Up Sequence Diagram (when operated with EN= VCC condition)

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●Timing Chart2

●OFF Sequence (when operated with EN= VCC condition)

Fig.50 OFF Sequence Diagram (when operated with EN= VCC condition)

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●Application Example

C4

C3

VCOM

R6

R4

HAVDD

C7

DRN

R3

C1

7

6

5

4

3

2

1

DRP

D1

SCL

SDA

EN

C27

C26

CPP

VGH

C11

C15

VREG

VGL

VDD1

L15

C24

C22

15 16 17 18 19 20 21

L19

AVDD

C20

L17

C16

VDD2

C17

Fig.51 Application Example

Parts

Value

name

Parts

Parts Number

Company

MURATA

Value

Company

Parts Number

name

C1

C3

0.1 [µF]

22[µF]

GRM155R61H104KE14D

EMK316ABJ226KD-T

LMK107BJ475KA-T

GRM188B31C105KA92D

JMK107BJ106MA-T

LMK107BJ475KA-T

JMK107BJ106MA-T

TMK316ABJ106KD-T

LMK107BJ475KA-T

C24

C26

C27

R3

1[µF]

MURATA

ROHM

TOKO

GRM188B31C105KA92D

GRM219B31H105KA73

GRM155R61H104KE14D

MCR03EZPD

TAIYO YUDEN

MURATA

C4

22[µF]

0.1[µF]

10[Ω]

100[kΩ]

-

C7

4.7[µF]

1[µF]

C11

C15

C16

C17

C20

C22

R4

MCR03EZPD

10[µF]

TAIYO YUDEN

R6

MCR03EZPD

4.7[µF]

10[µF]

D1

RB558W

L15

L17

L19

4.7[µH]

1269AS-H-4R7M

1276AS-H-4R7M

10[µF]×2

4.7[µF]

TOKO

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●Selecting Application Components

・Selecting the Output LC Constant (Buck Converter : VDD1, VDD2)

IL

⊿

I_OMAX+

should not reach the rated value level.

ILR

2

I

_OMAXMean current

t

Fig.52 Inductor Current Waveform (Buck Converter : VDD)

The output inductance (L) is decided by the rated current (I_LR)and maximum input current (I_OMAX)of the inductance.

Adjust so that I_OMAX+ ∆I_L/ 2 does not reach the rated current value.

∆I_Lcan be obtained by the following equation.

1

L

VO

VIN

1

f

∆I

=

× (VIN - VO) ×

×

[A]

L

where f is the switching frequency

Set with sufficient margin because the inductance value may have a dispersion of ±30%.

If the coil current exceeds the rated current (I_LR), the IC may be damaged.

The output capacitor (C_O) smoothens the ripple voltage at the output. Select a capacitor that will regulate the output ripple voltage

within the specifications.

Output ripple voltage can be obtained by the following equation.

∆I

L

VO

VIN

1

f

∆VPP = ∆I × R

ESR

＋

×

L

2 Co

However, since the aforementioned conditions are based on a lot of factors, verify the results using the actual product.

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・Selecting the Output LC Constant (Boost Converter : AVDD)

IL

⊿

I_OMAX+

should not reach the rated value level.

ILR

2

I

_OMAXmean current

t

Fig.53 Inductor Current Waveform ( Boost Converter : AVDD )

The output inductance (L) is decided by the rated current (I_LR)and maximum input current (I_INMAX)of the inductance.

Adjust so that I_INMAX+ ∆I_L/ 2 does not reach the rated current value.

∆I_Lcan be obtained by the following equation.

1

VO  VIN

1

ΔI



VIN



[A]

L

VO

f

where f is the switching frequency

Set with sufficient margin because the inductance value may have a dispersion of ±30%.

If the coil current exceeds the rated current (I_LR), the IC may be damaged.

The output capacitor (C_O) smoothens the ripple voltage at the output. Select a capacitor that will regulate the output ripple voltage

within the specifications.

Output ripple voltage can be obtained by the following equation.

∆I

1

VIN

VO

L







∆V

PP

= Ｉ

× R

ESR

＋

×

I

－

LMAX

f × CO

²

However, since the aforementioned conditions are based on a lot of factors, verify the results using the actual product.

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●Serial Transmission

BD81028AMWV uses the I²C bus in communicating with host addresses.

The device/slave address is always followed by the 1 byte register/select address as shown in the I²C bus format below.

MSB

LSB

MSB

LSB

MSB

LSB

Device address

A4 A3 A2

Register address

R5 R4 R3 R2

Data

D4 D3

Start

R/W ACK

ACK

ACK STOP

A6

A5

A1

A0

R7

R6

R1

R0

D7

D6

D5

D2

D1

D0

Start

Device Address

:

Start bit

Consists of 8 bits in total (A6 to A0 and the R/W bit) (MSB fast).

If the R/W bit is H, this means read mode.

If the R/W bit is L, this means write mode.

Acknowledge bit.

ACK

:

When sending and receiving data, there should be an acknowledge bit after each byte.

If data is sent and received properly, ‘L’ is replied to the sender.

If data is not received properly, ‘H’ is replied to the sender.

1 byte select address.

Data byte. Sending and Receiving data (MSB Fast)

Stop bit

Register Address

Data

STOP

:

There are two writing modes from I²C bus to the registers, single mode and multi mode.

In single mode, communication is sent to a single register.

In multi mode, communication is sent to multiple registers by entering multiple data before the stop bit.

●Device address

Slave address specific to the IC is 1000000 (A6 to A0).

●Register address

R7 is for TEST MODE. Normally, this should be set to 0.

R6 and R5 are don’t care bits.

R4 to R0 are the register address bits.

●Command interface

Transmission format for data sent and received to the EEPROM is shown below.

Write operation

・PM I²C Write format (Register Address: 01h to 08h)

Device address

Register address

01h 08h

R/W ACK

ACK

0

ACK

0

Start

N-bytes Data

STOP

1

0

～

Write data in multi mode by entering data continuously after the register address.

Data entry should be 8 bits.

・VCOM I²C Write format (Register Address: 09h)

Device address

Register address

09h

DATA

D4 D3

R/W ACK

ACK

0

ACK

0

Start

STOP

1

0

D7

D6

D5

D2

D1

D0

Write data in single mode (VCOM), designate a register address of 09h.

Read operation

・I²C Read format

Device address

Register address

01h 09h

Device address

R/W ACK

ACK

0

R/W ACK

ACK

Repeated

Start

N-bytes

Data

Start

STOP

1

0

～

1

0

1

0

1

Read data in the PMIC register through the read command.

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●I²C Timing

tR

tHIGH

tF

80%

20%

SCL

tLOW

tPD

tHD:STA

tSU;DAT

tHD;DAT

80%

20%

SDA

(IN)

tBUF

tDH

80%

20%

SDA

(OUT)

80%

SCL

SDA

tHD;STA

tSU;STA

tSU;STO

80%

20%

tl

S：START ビット

P：STOP ビット

S: START bit

P: STOP bit

S

P

Fig.54. I²C Timing

・Timing Specification

NORMAL mode

TYP

FAST mode

TYP

PARAMETER

SYMBOL

Unit

MIN

MAX

MIN

MAX

SCL frequency

SCL”H” time

f_SCL

t_HIGH

t_LOW

t_R

-

4.0

4.7

-

100

-

0.6

1.2

-

400

-

kHz

µs

ns

µs

SCL”L” time

-

Rising time

-

1.0

-

0.3

Falling time

t_F

-

0.3

-

0.3

Start bit holding time

Start bit setup time

SDA holding time

SDA setup time

Acknowledge delay time

Acknowledge hold time

Stop bit setup time

BUS open time

Noise spike width

t_HD

4.0

4.7

200

-

0.6

100

-

STA

；

t_SU

t_HD

t_SU

-

STA

DAT

-

DAT

；

t_PD

t_DH

0.9

-

0.1

-

0.1

-

t_SU

4.7

-

0.6

1.2

-

STO

；

t_BUF

-

t_l

0.1

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●Writing Data to the Register/EEPROM

After power up and when EN is high, data can be written to the registers or the EEPROM.

The logic of the register address R4 will determine where the data will be written.

Check-sum is installed before writing data to prevent malfunctions caused by data error.

The flowchart of the writing process to the register and EEPROM is shown below.

Device Address

1000 000x

Write

Read/

Write?

Read

0000 xxxx

0001 xxxx

REG ADDRESS

R4 is ?

Register DATA

OUTPUT

01h～09h

01h～08h

09h

11h～18h

19h

REG ADDRESS

01h～08h/09h?

REG ADDRESS

11h～18h/19h?

NG

SHUTDOWN

CHK_SUM

OK

Write Register

(09h)

Write EEPROM

(01h～08h)

Write EEPROM

(09h)

Write Register

(01h～08h)

・Writing Data to the Register

Data is written to the registers when register address R4 is “0”.

AVDD, VGH, VGL, HAVDD, and VCOM (register address: 01h to 04h) output voltage can be changed by writing data to the

registers.

・Writing Data to the EEPROM

Data is written to the EEPROM when register address R4 is “1”.

Upon start-up and EN is high, data which is stored in the EEPROM is copied to the registers.

Therefore, by writing to the EEPROM, the start-up settings will be changed.

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●Automatic EEPROM Read Function at Start-up

Upon BD81028AMWV start-up, a reset signal is generated and each register is initialized.

After that, when EN is changed from low to high, data which is stored in the EEPROM is copied to the registers.

Furthermore, the check-sum function is installed to prevent malfunctions caused by data error.

The automatic EEPROM read function at start-up is further explained by the flow chart below.

●Check-Sum Data

If data is written to the Register and EEPROM, it is necessary to set check-sum data to prevent malfunctions caused by

data error. Check-sum data is the complement of the sum of all data. When check-sum data is added to the sum of all data,

the result should be zero.

Register

Address

01h

02h

03h

04h

05h

06h

07h

D7 D6 D5 D4 D3 D2 D1 D0

Calculate the complement

(bitreverse +1)

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

SUM

桁上

D7 D6 D5 D4 D3 D2 D1 D0

1

0

1

0

1

0

1

0

1

08h

(CHECK SUM)

1

0

1

0

1

0

1

0

To become "0000_0000" (bin) whenRegister01h～08h is totaled,

CHECK SUM DATA is determined.

Cal TOTAL

(All data total

including

CHECK SUM)

●Return to Normal Operation after Shutdown at Check-Sum Error

A check-sum of zero indicates a data error and this causes the PMIC to latch in shutdown. There are two ways to reactivate the

PMIC. First, write to the EEPROM the correct data while the power supply is turned on and EN=L; then toggle EN to H. Lastly,

reset the power supply and enter the correct data while EN=H.

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●EEPROM Parameter Setting

Register

Bits

Function

Default

9.8V

Resolution

0.1V

Address

01h

02h

8

AVDD Output voltage setting

VGH Output voltage setting

[8V to 14.5V]

0.2V

[13V to 26V]

18V

0.1V

[-9.5V to -4.0]

03h

04h

8

VGL Output voltage setting

-6.0V

4.23V

HAVDD Output voltage setting

12.5mV

VDD1 Output voltage setting [3:0]

VDD2 Output voltage setting [6:4]

VDD startup order setting [7]

1.8V

1.2V

0

0.05V [1.7 to 1.9, 2.4 to 2.6V]

0.05V [1.1V to 1.3V]

0：VDD1→2, 1：VDD2→1

05h

06h

07h

8

7

Discharge time setting [2:0]

DELAY1 time setting [5:3]

DC/DC UVLO detect/release voltage [7:6]

0msec

2.5/2.7V

1msec [0 to 5msec]

0.2V step

DELAY2 time setting [2:0]

DELAY3 time setting [6:3]

Frequency setting [7]

30msec

0msec

1200kHz

5msec [0 to 40msec]

2msec [0 to 10msec]

0：600kHz , 1：1200kHz

08h

09h

8

8 bit Check-sum

42h

－

VCOM Output voltage setting

2.1225V

12.5mV

●Register map

Resister

Address

01h

D7

D6

D5

D4

D3

D2

D1

D0

AVDD [7:0]

02h

VGH [7:0]

VGL [7:0]

03h

04h

HAVDD [7:0]

05h

SEQ[0]

UVLO[1:0]

FREQ[0]

VDD2 [2:0]

VDD1 [3:0]

DISCHG[2:0]

DELAY2 [3:0]

06h

DELAY1[2:0]

07h

DELAY3 [2:0]

08h

CHECK SUM[7:0]

VCOM [7:0]

09h

www.rohm.com

TSZ02201-0313AAF00430-1-2

12.May.2015 Rev.003

33/44

TSZ22111・15・001

Daattaasshheeeett

BM81028AMWV

●Command Table 1

Register

01h

AVDD

Voltage

Setting

[V]

02h

VGH

Voltage

Setting

[V]

03h

VGL

Voltage

Setting

[V]

04h

HAVDD

Voltage

Setting

[V]

05h

VDD2

Voltage

Setting

[V]

06h

DC/DC UVLO DELAY1

07h

09h

VDD

ON

Sequence

VDD1

Voltage Detect/Release

Setting

[V]

Discharge

Time

Setting

Frequency DELAY3 DELAY2

VCOM

Voltage

Setting

DATA

Time

Setting

Time

Setting

Time

Setting

[msec]

0

Voltage

[V]

Setting

DEC. HEX.

[msec]

0

1

2

3

4

5

0

[msec]

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

[kHz]

600

[msec]

0

2

4

6

[V]

0

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

27

28

29

2A

2B

2C

2D

2E

2F

30

31

32

33

34

35

36

37

38

39

3A

3B

3C

3D

3E

3F

14.5

26.0

-4.0

-4.1

-4.2

-4.3

-4.4

-4.5

0.6×AVDD

VDD1→VDD2

1.10

1.15

1.20

1.25

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

2.5 / 2.7

0.45×AVDD

1

2

3

4

5

6

7

8

0.6×AVDD-0.0125 VDD1→VDD2

0.6×AVDD-0.0250 VDD1→VDD2

0.6×AVDD-0.0375 VDD1→VDD2

0.6×AVDD-0.0500 VDD1→VDD2

0.6×AVDD-0.0625 VDD1→VDD2

0.6×AVDD-0.0750 VDD1→VDD2

0.6×AVDD-0.0875 VDD1→VDD2

0.6×AVDD-0.1000 VDD1→VDD2

0.6×AVDD-0.1125 VDD1→VDD2

0.6×AVDD-0.1250 VDD1→VDD2

0.6×AVDD-0.1375 VDD1→VDD2

0.6×AVDD-0.1500 VDD1→VDD2

0.6×AVDD-0.1625 VDD1→VDD2

0.6×AVDD-0.1750 VDD1→VDD2

0.6×AVDD-0.1875 VDD1→VDD2

0.6×AVDD-0.2000 VDD1→VDD2

0.6×AVDD-0.2125 VDD1→VDD2

0.6×AVDD-0.2250 VDD1→VDD2

0.6×AVDD-0.2375 VDD1→VDD2

0.6×AVDD-0.2500 VDD1→VDD2

0.6×AVDD-0.2625 VDD1→VDD2

0.6×AVDD-0.2750 VDD1→VDD2

0.6×AVDD-0.2875 VDD1→VDD2

0.6×AVDD-0.3000 VDD1→VDD2

0.6×AVDD-0.3125 VDD1→VDD2

0.6×AVDD-0.3250 VDD1→VDD2

0.6×AVDD-0.3375 VDD1→VDD2

0.6×AVDD-0.3500 VDD1→VDD2

0.6×AVDD-0.3625 VDD1→VDD2

0.6×AVDD-0.3750 VDD1→VDD2

0.6×AVDD-0.3875 VDD1→VDD2

0.6×AVDD-0.4000 VDD1→VDD2

0.6×AVDD-0.4125 VDD1→VDD2

0.6×AVDD-0.4250 VDD1→VDD2

0.6×AVDD-0.4375 VDD1→VDD2

0.6×AVDD-0.4500 VDD1→VDD2

0.6×AVDD-0.4625 VDD1→VDD2

0.6×AVDD-0.4750 VDD1→VDD2

0.6×AVDD-0.4875 VDD1→VDD2

0.6×AVDD-0.5000 VDD1→VDD2

0.6×AVDD-0.5125 VDD1→VDD2

0.6×AVDD-0.5250 VDD1→VDD2

0.6×AVDD-0.5375 VDD1→VDD2

0.6×AVDD-0.5500 VDD1→VDD2

0.6×AVDD-0.5625 VDD1→VDD2

0.6×AVDD-0.5750 VDD1→VDD2

0.6×AVDD-0.5875 VDD1→VDD2

0.6×AVDD-0.6000 VDD1→VDD2

0.6×AVDD-0.6125 VDD1→VDD2

0.6×AVDD-0.6250 VDD1→VDD2

0.6×AVDD-0.6375 VDD1→VDD2

0.6×AVDD-0.6500 VDD1→VDD2

0.6×AVDD-0.6625 VDD1→VDD2

0.6×AVDD-0.6750 VDD1→VDD2

0.6×AVDD-0.6875 VDD1→VDD2

0.6×AVDD-0.7000 VDD1→VDD2

0.6×AVDD-0.7125 VDD1→VDD2

0.6×AVDD-0.7250 VDD1→VDD2

0.6×AVDD-0.7375 VDD1→VDD2

0.6×AVDD-0.7500 VDD1→VDD2

0.6×AVDD-0.7625 VDD1→VDD2

0.6×AVDD-0.7750 VDD1→VDD2

0.6×AVDD-0.7875 VDD1→VDD2

5

0.45×AVDD-0.0125

0.45×AVDD-0.0250

0.45×AVDD-0.0375

0.45×AVDD-0.0500

0.45×AVDD-0.0625

0.45×AVDD-0.0750

0.45×AVDD-0.0875

0.45×AVDD-0.1000

0.45×AVDD-0.1125

0.45×AVDD-0.1250

0.45×AVDD-0.1375

0.45×AVDD-0.1500

0.45×AVDD-0.1625

0.45×AVDD-0.1750

0.45×AVDD-0.1875

0.45×AVDD-0.2000

0.45×AVDD-0.2125

0.45×AVDD-0.2250

0.45×AVDD-0.2375

0.45×AVDD-0.2500

0.45×AVDD-0.2625

0.45×AVDD-0.2750

0.45×AVDD-0.2875

0.45×AVDD-0.3000

0.45×AVDD-0.3125

0.45×AVDD-0.3250

0.45×AVDD-0.3375

0.45×AVDD-0.3500

0.45×AVDD-0.3625

0.45×AVDD-0.3750

0.45×AVDD-0.3875

0.45×AVDD-0.4000

0.45×AVDD-0.4125

0.45×AVDD-0.4250

0.45×AVDD-0.4375

0.45×AVDD-0.4500

0.45×AVDD-0.4625

0.45×AVDD-0.4750

0.45×AVDD-0.4875

0.45×AVDD-0.5000

0.45×AVDD-0.5125

0.45×AVDD-0.5250

0.45×AVDD-0.5375

0.45×AVDD-0.5500

0.45×AVDD-0.5625

0.45×AVDD-0.5750

0.45×AVDD-0.5875

0.45×AVDD-0.6000

0.45×AVDD-0.6125

0.45×AVDD-0.6250

0.45×AVDD-0.6375

0.45×AVDD-0.6500

0.45×AVDD-0.6625

0.45×AVDD-0.6750

0.45×AVDD-0.6875

0.45×AVDD-0.7000

0.45×AVDD-0.7125

0.45×AVDD-0.7250

0.45×AVDD-0.7375

0.45×AVDD-0.7500

0.45×AVDD-0.7625

0.45×AVDD-0.7750

0.45×AVDD-0.7875

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

www.rohm.com

TSZ02201-0313AAF00430-1-2

12.May.2015 Rev.003

34/44

TSZ22111・15・001

Daattaasshheeeett

BM81028AMWV

●Command Table 2

Register

01h

AVDD

Voltage

Setting

[V]

02h

VGH

Voltage

Setting

[V]

03h

VGL

Voltage

Setting

[V]

04h

HAVDD

Voltage

Setting

[V]

05h

VDD2

Voltage

Setting

[V]

06h

DC/DC UVLO DELAY1

07h

09h

VDD

ON

Sequence

VDD1

Voltage Detect/Release

Setting

[V]

Discharge

Time

Setting

Frequency DELAY3 DELAY2

VCOM

Voltage

Setting

DATA

Time

Setting

Time

Setting

Time

Setting

[msec]

0

Voltage

[V]

Setting

DEC. HEX.

[msec]

0

1

2

3

4

5

0

[msec]

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

[kHz]

600

[msec]

8

[V]

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

40

41

42

43

44

45

46

47

48

49

4A

4B

4C

4D

4E

4F

50

51

52

53

54

55

56

57

58

59

5A

5B

5C

5D

5E

5F

60

61

62

63

64

65

66

67

68

69

14.5

14.4

14.3

14.2

14.1

14.0

13.9

13.8

13.7

13.6

13.5

13.4

13.3

13.2

13.1

13.0

12.9

26.0

25.8

-4.6

-4.7

-4.8

-4.9

-5.0

-5.1

-5.2

-5.3

-5.4

-5.5

-5.6

-5.7

-5.8

-5.9

-6.0

-6.1

-6.2

-6.3

-6.4

-6.5

-6.6

-6.7

-6.8

-6.9

-7.0

-7.1

-7.2

-7.3

-7.4

-7.5

-7.6

-7.7

-7.8

-7.9

-8.0

-8.1

-8.2

-8.3

-8.4

-8.5

-8.6

-8.7

-8.8

-8.9

-9.0

-9.1

-9.2

-9.3

-9.4

-9.5

0.6×AVDD-0.8000 VDD1→VDD2

0.6×AVDD-0.8125 VDD1→VDD2

0.6×AVDD-0.8250 VDD1→VDD2

0.6×AVDD-0.8375 VDD1→VDD2

0.6×AVDD-0.8500 VDD1→VDD2

0.6×AVDD-0.8625 VDD1→VDD2

0.6×AVDD-0.8750 VDD1→VDD2

0.6×AVDD-0.8875 VDD1→VDD2

0.6×AVDD-0.9000 VDD1→VDD2

0.6×AVDD-0.9125 VDD1→VDD2

0.6×AVDD-0.9250 VDD1→VDD2

0.6×AVDD-0.9375 VDD1→VDD2

0.6×AVDD-0.9500 VDD1→VDD2

0.6×AVDD-0.9625 VDD1→VDD2

0.6×AVDD-0.9750 VDD1→VDD2

0.6×AVDD-0.9875 VDD1→VDD2

0.6×AVDD-1.0000 VDD1→VDD2

0.6×AVDD-1.0125 VDD1→VDD2

0.6×AVDD-1.0250 VDD1→VDD2

0.6×AVDD-1.0375 VDD1→VDD2

0.6×AVDD-1.0500 VDD1→VDD2

0.6×AVDD-1.0625 VDD1→VDD2

0.6×AVDD-1.0750 VDD1→VDD2

0.6×AVDD-1.0875 VDD1→VDD2

0.6×AVDD-1.1000 VDD1→VDD2

0.6×AVDD-1.1125 VDD1→VDD2

0.6×AVDD-1.1250 VDD1→VDD2

0.6×AVDD-1.1375 VDD1→VDD2

0.6×AVDD-1.1500 VDD1→VDD2

0.6×AVDD-1.1625 VDD1→VDD2

0.6×AVDD-1.1750 VDD1→VDD2

0.6×AVDD-1.1875 VDD1→VDD2

0.6×AVDD-1.2000 VDD1→VDD2

0.6×AVDD-1.2125 VDD1→VDD2

0.6×AVDD-1.2250 VDD1→VDD2

0.6×AVDD-1.2375 VDD1→VDD2

0.6×AVDD-1.2500 VDD1→VDD2

0.6×AVDD-1.2625 VDD1→VDD2

0.6×AVDD-1.2750 VDD1→VDD2

0.6×AVDD-1.2875 VDD1→VDD2

0.6×AVDD-1.3000 VDD1→VDD2

0.6×AVDD-1.3125 VDD1→VDD2

0.6×AVDD-1.3250 VDD1→VDD2

0.6×AVDD-1.3375 VDD1→VDD2

0.6×AVDD-1.3500 VDD1→VDD2

0.6×AVDD-1.3625 VDD1→VDD2

0.6×AVDD-1.3750 VDD1→VDD2

0.6×AVDD-1.3875 VDD1→VDD2

0.6×AVDD-1.4000 VDD1→VDD2

0.6×AVDD-1.4125 VDD1→VDD2

0.6×AVDD-1.4250 VDD1→VDD2

0.6×AVDD-1.4375 VDD1→VDD2

0.6×AVDD-1.4500 VDD1→VDD2

0.6×AVDD-1.4625 VDD1→VDD2

0.6×AVDD-1.4750 VDD1→VDD2

0.6×AVDD-1.4875 VDD1→VDD2

0.6×AVDD-1.5000 VDD1→VDD2

0.6×AVDD-1.5125 VDD1→VDD2

0.6×AVDD-1.5250 VDD1→VDD2

0.6×AVDD-1.5375 VDD1→VDD2

0.6×AVDD-1.5500 VDD1→VDD2

0.6×AVDD-1.5625 VDD1→VDD2

0.6×AVDD-1.5750 VDD1→VDD2

0.6×AVDD-1.5875 VDD1→VDD2

1.30

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

2.7 / 2.9

0.45×AVDD-0.8000

0.45×AVDD-0.8125

0.45×AVDD-0.8250

0.45×AVDD-0.8375

0.45×AVDD-0.8500

0.45×AVDD-0.8625

0.45×AVDD-0.8750

0.45×AVDD-0.8875

0.45×AVDD-0.9000

0.45×AVDD-0.9125

0.45×AVDD-0.9250

0.45×AVDD-0.9375

0.45×AVDD-0.9500

0.45×AVDD-0.9625

0.45×AVDD-0.9750

0.45×AVDD-0.9875

0.45×AVDD-1.0000

0.45×AVDD-1.0125

0.45×AVDD-1.0250

0.45×AVDD-1.0375

0.45×AVDD-1.0500

0.45×AVDD-1.0625

0.45×AVDD-1.0750

0.45×AVDD-1.0875

0.45×AVDD-1.1000

0.45×AVDD-1.1125

0.45×AVDD-1.1250

0.45×AVDD-1.1375

0.45×AVDD-1.1500

0.45×AVDD-1.1625

0.45×AVDD-1.1750

0.45×AVDD-1.1875

0.45×AVDD-1.2000

0.45×AVDD-1.2125

0.45×AVDD-1.2250

0.45×AVDD-1.2375

0.45×AVDD-1.2500

0.45×AVDD-1.2625

0.45×AVDD-1.2750

0.45×AVDD-1.2875

0.45×AVDD-1.3000

0.45×AVDD-1.3125

0.45×AVDD-1.3250

0.45×AVDD-1.3375

0.45×AVDD-1.3500

0.45×AVDD-1.3625

0.45×AVDD-1.3750

0.45×AVDD-1.3875

0.45×AVDD-1.4000

0.45×AVDD-1.4125

0.45×AVDD-1.4250

0.45×AVDD-1.4375

0.45×AVDD-1.4500

0.45×AVDD-1.4625

0.45×AVDD-1.4750

0.45×AVDD-1.4875

0.45×AVDD-1.5000

0.45×AVDD-1.5125

0.45×AVDD-1.5250

0.45×AVDD-1.5375

0.45×AVDD-1.5500

0.45×AVDD-1.5625

0.45×AVDD-1.5750

0.45×AVDD-1.5875

8

10

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

106 6A

107 6B

108 6C

109 6D

110

111

112

113

114

115

116

117

118

119

120

121

6E

6F

70

71

72

73

74

75

76

77

78

79

122 7A

123 7B

124 7C

125 7D

126

127

7E

7F

www.rohm.com

TSZ02201-0313AAF00430-1-2

12.May.2015 Rev.003

35/44

TSZ22111・15・001

Daattaasshheeeett

BM81028AMWV

●Command Table 3

Register

01h

AVDD

Voltage

Setting

[V]

02h

VGH

Voltage

Setting

[V]

03h

VGL

Voltage

Setting

[V]

04h

HAVDD

Voltage

Setting

[V]

05h

VDD2

Voltage

Setting

[V]

06h

DC/DC UVLO DELAY1

07h

09h

VDD

ON

Sequence

VDD1

Voltage Detect/Release

Setting

[V]

Discharge

Time

Setting

Frequency DELAY3 DELAY2

VCOM

Voltage

Setting

DATA

Time

Setting

Time

Setting

Time

Setting

[msec]

0

Voltage

[V]

Setting

DEC. HEX.

[msec]

0

1

2

3

4

5

0

[msec]

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

[kHz]

1200

[msec]

0

2

4

6

[V]

128

129

130

131

132

133

134

135

136

137

80

81

82

83

84

85

86

87

88

89

12.8

12.7

12.6

12.5

12.4

12.3

12.2

12.1

12.0

11.9

11.8

11.7

11.6

11.5

11.4

11.3

11.2

11.1

11.0

10.9

10.8

10.7

10.6

10.5

10.4

10.3

10.2

10.1

10.0

9.9

9.8

9.7

9.6

9.5

9.4

9.3

9.2

9.1

9.0

8.9

8.8

8.7

8.6

8.5

8.4

8.3

25.6

25.4

25.2

25.0

24.8

24.6

24.4

24.2

24.0

23.8

23.6

23.4

23.2

23.0

22.8

22.6

22.4

22.2

22.0

21.8

21.6

21.4

21.2

21.0

20.8

20.6

20.4

20.2

20.0

19.8

19.6

19.4

19.2

19.0

18.8

18.6

18.4

18.2

18.0

17.8

17.6

17.4

17.2

17.0

16.8

16.6

16.4

16.2

16.0

15.8

15.6

15.4

15.2

15.0

14.8

14.6

14.4

14.2

14.0

13.8

13.6

13.4

13.2

13.0

-9.5

0.6×AVDD-1.6000 VDD2→VDD1

0.6×AVDD-1.6125 VDD2→VDD1

0.6×AVDD-1.6250 VDD2→VDD1

0.6×AVDD-1.6375 VDD2→VDD1

0.6×AVDD-1.6500 VDD2→VDD1

0.6×AVDD-1.6625 VDD2→VDD1

0.6×AVDD-1.6750 VDD2→VDD1

0.6×AVDD-1.6875 VDD2→VDD1

0.6×AVDD-1.7000 VDD2→VDD1

0.6×AVDD-1.7125 VDD2→VDD1

0.6×AVDD-1.7250 VDD2→VDD1

0.6×AVDD-1.7375 VDD2→VDD1

0.6×AVDD-1.7500 VDD2→VDD1

0.6×AVDD-1.7625 VDD2→VDD1

0.6×AVDD-1.7750 VDD2→VDD1

0.6×AVDD-1.7875 VDD2→VDD1

0.6×AVDD-1.8000 VDD2→VDD1

0.6×AVDD-1.8125 VDD2→VDD1

0.6×AVDD-1.8250 VDD2→VDD1

0.6×AVDD-1.8375 VDD2→VDD1

0.6×AVDD-1.8500 VDD2→VDD1

0.6×AVDD-1.8625 VDD2→VDD1

0.6×AVDD-1.8750 VDD2→VDD1

0.6×AVDD-1.8875 VDD2→VDD1

0.6×AVDD-1.9000 VDD2→VDD1

0.6×AVDD-1.9125 VDD2→VDD1

0.6×AVDD-1.9250 VDD2→VDD1

0.6×AVDD-1.9375 VDD2→VDD1

0.6×AVDD-1.9500 VDD2→VDD1

0.6×AVDD-1.9625 VDD2→VDD1

0.6×AVDD-1.9750 VDD2→VDD1

0.6×AVDD-1.9875 VDD2→VDD1

0.6×AVDD-2.0000 VDD2→VDD1

0.6×AVDD-2.0125 VDD2→VDD1

0.6×AVDD-2.0250 VDD2→VDD1

0.6×AVDD-2.0375 VDD2→VDD1

0.6×AVDD-2.0500 VDD2→VDD1

0.6×AVDD-2.0625 VDD2→VDD1

0.6×AVDD-2.0750 VDD2→VDD1

0.6×AVDD-2.0875 VDD2→VDD1

0.6×AVDD-2.1000 VDD2→VDD1

0.6×AVDD-2.1125 VDD2→VDD1

0.6×AVDD-2.1250 VDD2→VDD1

0.6×AVDD-2.1375 VDD2→VDD1

0.6×AVDD-2.1500 VDD2→VDD1

0.6×AVDD-2.1625 VDD2→VDD1

0.6×AVDD-2.1750 VDD2→VDD1

0.6×AVDD-2.1875 VDD2→VDD1

0.6×AVDD-2.2000 VDD2→VDD1

0.6×AVDD-2.2125 VDD2→VDD1

0.6×AVDD-2.2250 VDD2→VDD1

0.6×AVDD-2.2375 VDD2→VDD1

0.6×AVDD-2.2500 VDD2→VDD1

0.6×AVDD-2.2625 VDD2→VDD1

0.6×AVDD-2.2750 VDD2→VDD1

0.6×AVDD-2.2875 VDD2→VDD1

0.6×AVDD-2.3000 VDD2→VDD1

0.6×AVDD-2.3125 VDD2→VDD1

0.6×AVDD-2.3250 VDD2→VDD1

0.6×AVDD-2.3375 VDD2→VDD1

0.6×AVDD-2.3500 VDD2→VDD1

0.6×AVDD-2.3625 VDD2→VDD1

0.6×AVDD-2.3750 VDD2→VDD1

0.6×AVDD-2.3875 VDD2→VDD1

1.10

1.15

1.20

1.25

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

2.9 / 3.1

0.45×AVDD-1.6000

0.45×AVDD-1.6125

0.45×AVDD-1.6250

0.45×AVDD-1.6375

0.45×AVDD-1.6500

0.45×AVDD-1.6625

0.45×AVDD-1.6750

0.45×AVDD-1.6875

0.45×AVDD-1.7000

0.45×AVDD-1.7125

0.45×AVDD-1.7250

0.45×AVDD-1.7375

0.45×AVDD-1.7500

0.45×AVDD-1.7625

0.45×AVDD-1.7750

0.45×AVDD-1.7875

0.45×AVDD-1.8000

0.45×AVDD-1.8125

0.45×AVDD-1.8250

0.45×AVDD-1.8375

0.45×AVDD-1.8500

0.45×AVDD-1.8625

0.45×AVDD-1.8750

0.45×AVDD-1.8875

0.45×AVDD-1.9000

0.45×AVDD-1.9125

0.45×AVDD-1.9250

0.45×AVDD-1.9375

0.45×AVDD-1.9500

0.45×AVDD-1.9625

0.45×AVDD-1.9750

0.45×AVDD-1.9875

0.45×AVDD-2.0000

0.45×AVDD-2.0125

0.45×AVDD-2.0250

0.45×AVDD-2.0375

0.45×AVDD-2.0500

0.45×AVDD-2.0625

0.45×AVDD-2.0750

0.45×AVDD-2.0875

0.45×AVDD-2.1000

0.45×AVDD-2.1125

0.45×AVDD-2.1250

0.45×AVDD-2.1375

0.45×AVDD-2.1500

0.45×AVDD-2.1625

0.45×AVDD-2.1750

0.45×AVDD-2.1875

0.45×AVDD-2.2000

0.45×AVDD-2.2125

0.45×AVDD-2.2250

0.45×AVDD-2.2375

0.45×AVDD-2.2500

0.45×AVDD-2.2625

0.45×AVDD-2.2750

0.45×AVDD-2.2875

0.45×AVDD-2.3000

0.45×AVDD-2.3125

0.45×AVDD-2.3250

0.45×AVDD-2.3375

0.45×AVDD-2.3500

0.45×AVDD-2.3625

0.45×AVDD-2.3750

0.45×AVDD-2.3875

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

138 8A

139 8B

140 8C

141 8D

142

143

144

145

146

147

148

149

150

151

152

153

8E

8F

90

91

92

93

94

95

96

97

98

99

154 9A

155 9B

156 9C

157 9D

158

159

9E

9F

160 A0

161 A1

162 A2

163 A3

164 A4

165 A5

166 A6

167 A7

168 A8

169 A9

170 AA

171 AB

172 AC

173 AD

174 AE

175 AF

176 B0

177 B1

178 B2

179 B3

180 B4

181 B5

182 B6

183 B7

184 B8

185 B9

186 BA

187 BB

188 BC

189 BD

190 BE

191 BF

8.2

8.1

8.0

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●Command Table 4

Register

01h

AVDD

Voltage

Setting

[V]

8.0

02h

VGH

Voltage

Setting

[V]

03h

VGL

Voltage

Setting

[V]

04h

HAVDD

Voltage

Setting

[V]

05h

VDD2

Voltage

Setting

[V]

06h

DC/DC UVLO DELAY1

07h

09h

VDD

ON

Sequence

VDD1

Voltage Detect/Release

Setting

[V]

Discharge

Time

Setting

Frequency DELAY3 DELAY2

VCOM

Voltage

Setting

DATA

Time

Setting

Time

Setting

Time

Setting

[msec]

0

Voltage

[V]

Setting

DEC. HEX.

192 C0

193 C1

194 C2

195 C3

196 C4

197 C5

198 C6

199 C7

200 C8

201 C9

202 CA

203 CB

204 CC

205 CD

206 CE

207 CF

208 D0

209 D1

210 D2

211 D3

212 D4

213 D5

214 D6

215 D7

216 D8

217 D9

218 DA

219 DB

220 DC

221 DD

222 DE

223 DF

[msec]

0

1

2

3

4

5

0

[msec]

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

1

2

3

4

5

0

[kHz]

1200

[msec]

8

[V]

13.0

-9.5

0.6×AVDD-2.4000 VDD2→VDD1

0.6×AVDD-2.4125 VDD2→VDD1

0.6×AVDD-2.4250 VDD2→VDD1

0.6×AVDD-2.4375 VDD2→VDD1

0.6×AVDD-2.4500 VDD2→VDD1

0.6×AVDD-2.4625 VDD2→VDD1

0.6×AVDD-2.4750 VDD2→VDD1

0.6×AVDD-2.4875 VDD2→VDD1

0.6×AVDD-2.5000 VDD2→VDD1

0.6×AVDD-2.5125 VDD2→VDD1

0.6×AVDD-2.5250 VDD2→VDD1

0.6×AVDD-2.5375 VDD2→VDD1

0.6×AVDD-2.5500 VDD2→VDD1

0.6×AVDD-2.5625 VDD2→VDD1

0.6×AVDD-2.5750 VDD2→VDD1

0.6×AVDD-2.5875 VDD2→VDD1

0.6×AVDD-2.6000 VDD2→VDD1

0.6×AVDD-2.6125 VDD2→VDD1

0.6×AVDD-2.6250 VDD2→VDD1

0.6×AVDD-2.6375 VDD2→VDD1

0.6×AVDD-2.6500 VDD2→VDD1

0.6×AVDD-2.6625 VDD2→VDD1

0.6×AVDD-2.6750 VDD2→VDD1

0.6×AVDD-2.6875 VDD2→VDD1

0.6×AVDD-2.7000 VDD2→VDD1

0.6×AVDD-2.7125 VDD2→VDD1

0.6×AVDD-2.7250 VDD2→VDD1

0.6×AVDD-2.7375 VDD2→VDD1

0.6×AVDD-2.7500 VDD2→VDD1

0.6×AVDD-2.7625 VDD2→VDD1

0.6×AVDD-2.7750 VDD2→VDD1

0.6×AVDD-2.7875 VDD2→VDD1

0.6×AVDD-2.8000 VDD2→VDD1

0.6×AVDD-2.8125 VDD2→VDD1

0.6×AVDD-2.8250 VDD2→VDD1

0.6×AVDD-2.8375 VDD2→VDD1

0.6×AVDD-2.8500 VDD2→VDD1

0.6×AVDD-2.8625 VDD2→VDD1

0.6×AVDD-2.8750 VDD2→VDD1

0.6×AVDD-2.8875 VDD2→VDD1

0.6×AVDD-2.9000 VDD2→VDD1

0.6×AVDD-2.9125 VDD2→VDD1

0.6×AVDD-2.9250 VDD2→VDD1

0.6×AVDD-2.9375 VDD2→VDD1

0.6×AVDD-2.9500 VDD2→VDD1

0.6×AVDD-2.9625 VDD2→VDD1

0.6×AVDD-2.9750 VDD2→VDD1

0.6×AVDD-2.9875 VDD2→VDD1

0.6×AVDD-3.0000 VDD2→VDD1

0.6×AVDD-3.0125 VDD2→VDD1

0.6×AVDD-3.0250 VDD2→VDD1

0.6×AVDD-3.0375 VDD2→VDD1

0.6×AVDD-3.0500 VDD2→VDD1

0.6×AVDD-3.0625 VDD2→VDD1

0.6×AVDD-3.0750 VDD2→VDD1

0.6×AVDD-3.0875 VDD2→VDD1

0.6×AVDD-3.1000 VDD2→VDD1

0.6×AVDD-3.1125 VDD2→VDD1

0.6×AVDD-3.1250 VDD2→VDD1

0.6×AVDD-3.1375 VDD2→VDD1

0.6×AVDD-3.1500 VDD2→VDD1

0.6×AVDD-3.1625 VDD2→VDD1

0.6×AVDD-3.1750 VDD2→VDD1

0.6×AVDD-3.1875 VDD2→VDD1

1.30

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

1.70

1.75

1.80

1.85

1.90

2.40

2.45

2.50

2.55

2.60

3.1 / 3.3

0.45×AVDD-2.4000

0.45×AVDD-2.4125

0.45×AVDD-2.4250

0.45×AVDD-2.4375

0.45×AVDD-2.4500

0.45×AVDD-2.4625

0.45×AVDD-2.4750

0.45×AVDD-2.4875

0.45×AVDD-2.5000

0.45×AVDD-2.5125

0.45×AVDD-2.5250

0.45×AVDD-2.5375

0.45×AVDD-2.5500

0.45×AVDD-2.5625

0.45×AVDD-2.5750

0.45×AVDD-2.5875

0.45×AVDD-2.6000

0.45×AVDD-2.6125

0.45×AVDD-2.6250

0.45×AVDD-2.6375

0.45×AVDD-2.6500

0.45×AVDD-2.6625

0.45×AVDD-2.6750

0.45×AVDD-2.6875

0.45×AVDD-2.7000

0.45×AVDD-2.7125

0.45×AVDD-2.7250

0.45×AVDD-2.7375

0.45×AVDD-2.7500

0.45×AVDD-2.7625

0.45×AVDD-2.7750

0.45×AVDD-2.7875

0.45×AVDD-2.8000

0.45×AVDD-2.8125

0.45×AVDD-2.8250

0.45×AVDD-2.8375

0.45×AVDD-2.8500

0.45×AVDD-2.8625

0.45×AVDD-2.8750

0.45×AVDD-2.8875

0.45×AVDD-2.9000

0.45×AVDD-2.9125

0.45×AVDD-2.9250

0.45×AVDD-2.9375

0.45×AVDD-2.9500

0.45×AVDD-2.9625

0.45×AVDD-2.9750

0.45×AVDD-2.9875

0.45×AVDD-3.0000

0.45×AVDD-3.0125

0.45×AVDD-3.0250

0.45×AVDD-3.0375

0.45×AVDD-3.0500

0.45×AVDD-3.0625

0.45×AVDD-3.0750

0.45×AVDD-3.0875

0.45×AVDD-3.1000

0.45×AVDD-3.1125

0.45×AVDD-3.1250

0.45×AVDD-3.1375

0.45×AVDD-3.1500

0.45×AVDD-3.1625

0.45×AVDD-3.1750

0.45×AVDD-3.1875

8

10

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

5

10

15

20

25

30

35

40

0

224

225

226

227

228

229

230

231

232

233

E0

E1

E2

E3

E4

E5

E6

E7

E8

E9

234 EA

235 EB

236 EC

237 ED

238

239

240

241

242

243

244

245

246

247

248

249

EE

EF

F0

F1

F2

F3

F4

F5

F6

F7

F8

F9

250 FA

251 FB

252 FC

253 FD

254

255

FE

FF

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●Protection functions

・Over-Voltage Protection

AVDD

16V

Threshold (Typ)

When OVP is detected, switching turns OFF to control the rising output voltage.

When the output voltage decreases to a lower value, the switching will turn back ON.

Operation

・Short Circuit Protection

VDD1

VDD2

AVDD

VGH

VGL

VGL×0.8

Threshold (Typ)

VDD1×0.8

VDD2×0.8

AVDD×0.8

VGH×0.8

When a channel detects SCP, a timer is activated.

Operation

10msec after that, all channels will be latched to shutdown state.

To return to normal operation, reset the power supply.

・Over-Current Protect

VDD1

1.0A

VDD2

1.0A

AVDD

1.5A

Threshold (Min)

Operation

When OCP is detected, switching turns OFF to limit the FET from generating current.

When the FET current decreases to a lower value, the switching will turn back ON.

・Thermal Shutdown

VDD1

VDD2

AVDD

HAVDD

VCOM

VGH

VGL

Threshold (Typ)

Operation

175℃

When device temperature goes above 175℃(Typ), all channels are shut down.

・VCC UVLO

VDD1

VDD2

AVDD

HAVDD

2.4V

VCOM

VGH

Falling (Typ)

Rising (Typ)

2.1V

Circuit malfunction is prevented by making sure the IC is turned off when VCC is below the

UVLO threshold. There is a hysteresis between the rising and falling threshold to avoid triggering

UVLO by power supply noise.

Operation

・DC/DC converter UVLO

VDD1

VDD2

AVDD

HAVDD

VCOM

VGH

VGL

Falling (Typ)

Rising (Typ)

2.5 / 2.7 / 2.9 / 3.1V

2.7 / 2.9 / 3.1 / 3.3 V

2.8 / 3.0 / 3.2 / 3.4 V

Watch start (Typ)

DC/DC converter output error is prevented by making sure all channels are turned off when a

DC/DC converter output is below the UVLO threshold.

Operation

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●FAULT Output

The FAULT output indicates the status of the protection circuits of this IC.

Because FAULT is an open-drain output, place a pull-up resistor externally.

When the FAULT output will not be used, connect to GND.

10kΩ to 220kΩ

FAULT

Fig. 55 FAULT Output

FAULT=H

During stable operation when none of the protection circuits are in effect.

This is due to the external pull-up resistance.

FAULT=L

When any of the protection circuits (UVLO, OCP, OVP, TSD, and SCP) are triggered.

This indicates a circuit error.

The recommended external pull-up resistance for the FAULT output is 10kΩ to 220kΩ. An external resistance of under

10kΩ can generate an offset voltage during FAULT=L caused by the voltage drop across the internal on resistance. On the

other hand, an external resistance of more than 220kΩ can interfere with the output during FAULT=H because of leak

current.

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●I/O Equivalent Circuits

1.DRN, 28. DRP

2.AVDDP

3.HAVDD, 4.VCOM

AVDDP

6.FAULT

7.VCC

8.SCL

VCC

9.SDA

10.EN

11.VREG

12.VDD2, 13.VDD1

15.SWB1, 17.SWB2

16.PVCC1, 22.PVCC2

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19.SW

20.AVDD

21.AVDD_S

AVDD

23.VLSO

24.VGL

26.VGH, 27CPP

PVCC2

VREG

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 Operational Notes

1) Absolute maximum ratings

Operating the IC over the absolute maximum ratings may damage the IC. In addition, it is impossible to predict all

destructive situations such as short-circuit modes, open circuit modes, etc. Therefore, it is important to consider circuit

protection measures, like adding a fuse, in case the IC is operated in a special mode exceeding the absolute maximum

ratings.

2) Ground potential

The voltage of the ground pin must be the lowest voltage of all pins of the IC at all operating conditions. Ensure that no pins

are at a voltage below the ground pin at any time, even during transient condition.

3) Thermal consideration

Use a thermal design that allows for a sufficient margin by taking into account the permissible power dissipation (Pd) in

actual operating conditions.

4) Short between pins and mounting errors

Be careful when mounting the IC on printed circuit boards. The IC may be damaged if it is mounted in a wrong orientation

or if pins are shorted together. Short circuit may be caused by conductive particles caught between the pins.

5) Operation under strong electromagnetic field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

6) Testing on application boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the

IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be

turned off completely before connecting or removing it from the test setup during the inspection process. To prevent

damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.

7) Regarding input pins of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.

P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or

transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

C

E

Pin A

B

C

E

N

P⁺

N

P⁺

P

Parasitic

element

N

P

N

P substrate

Parasitic

element

GND

Parasitic element

Other adjacent elements

Example of a Simple Monolithic IC Structure

8) Over-current protection circuit (OCP)

The IC incorporates an over-current protection circuit that operates in accordance with the rated output capacity. This circuit

protects the IC from damage when the load becomes shorted. It is also designed to limit the output current (without

latching) in the event of a large transient current flow, such as from a large capacitor or other component connected to the

output pin. This protection circuit is effective in preventing damage to the IC in cases of sudden and unexpected current

surges. The IC should not be used in applications where the over current protection circuit will be activated continuously.

9) Thermal shutdown circuit (TSD)

The IC incorporates a built-in thermal shutdown circuit, which is designed to turn off the IC when the internal temperature of

the IC reaches a specified value. It is not designed to protect the IC from damage or guarantee its operation. Do not

continue to operate the IC after this function is activated. Do not use the IC in conditions where this function will always be

activated.

10) DC/DC switching line wiring pattern

DC/DC converter switching line (wiring from the switching pin to inductor, Nch MOS) must be as short and thick as possible

to reduce line impedance. If the wiring is long, ringing caused by switching would increase and this may exceed the

absolute maximum voltage ratings. If the parts are located far apart, consider inserting a snubber circuit.

www.rohm.com

TSZ02201-0313AAF00430-1-2

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BM81028AMWV

●Ordering Information

B M 8

1

0

2

8 A M W V

ZE2

Part Number

Package

MWV: UQFN28V4040A

Packaging and forming specification

ZE2: Embossed tape and reel

●Physical Dimension Tape and Reel Information

Tape

Embossed carrier tape

2000pcs

Quantity

E2ZE2

Direction

of feed

The direction is the 1pin of product is at the upper left when you hold

reel on the left hand and you pull out the tape on the right hand

(

)

Direction of feed

1pin

Reel

Order quantity needs to be multiple of the minimum quantity.

∗

●Marking Diagram (TOP VIEW)

UQFN28V4040A (TOP VIEW)

Part Number Marking

8 1 0 2 8

A

LOT Number

1PIN MARK

www.rohm.com

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BM81028AMWV

●MODIFICATION RECORD

Rev.001

Rev.002

-

Original

P.1

Change input voltage range, Add Input tolerant

Change Recommended Operating Ratings

(Power Supply Voltage, SWB1,SWB2 Current, SW Current )

P.5

Change package name

P.1, P.43

P.26

Rev.003

Clerical error correction (D1)

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Notice

Precaution on using ROHM Products

1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,

OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you

intend to use our Products in devices requiring extremely high reliability (such as medical equipment ^{(Note 1)}, transport

equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car

accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or

serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.

Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any

damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific

Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are designed and manufactured for use under standard conditions and not under any special or

extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any

special or extraordinary environments or conditions. If you intend to use our Products under any special or

extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of

product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual

ambient temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PGA-E

Rev.001

Daattaasshheeeett

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

QR code printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PGA-E

Rev.001

Daattaasshheeeett

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

Notice – WE

Rev.001

Datasheet

Buy

BM81028AMWV - Web Page

Distribution Inventory

Part Number

Package

Unit Quantity

BM81028AMWV

UQFN28V4040P

2500

Minimum Package Quantity

Packing Type

Constitution Materials List

RoHS

2500

Taping

inquiry

Yes


型号：	BM81028AMWV
厂家：	ROHM
描述：	Multi-Channel System Power Supply IC
文件：	总48页 (文件大小：1955K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BM81028AMWV [ROHM]

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