BM64350MUV-E2 [ROHM]

Brushless DC Motor Controller,;
BM64350MUV-E2
型号: BM64350MUV-E2
厂家: ROHM    ROHM
描述:

Brushless DC Motor Controller,

电动机控制
文件: 总35页 (文件大小:2771K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Datasheet  
DC Brushless Motor Driver Series  
Built-in Speed Control, 3 Hall Sensors  
Three-Phase Brushless Motor Pre-Driver  
BM64350MUV  
General Description  
Key Specifications  
BM64350MUV is the pre-driver IC of sine wave drive for  
three-phase brushless motor driver that supports 48 V  
power supply controlling the motor driver constructed in  
external FETs. It detects a rotor position by 3 Hall  
sensors. In addition, it has a speed feedback control  
function, and controls output PWM Duty by adjusting the  
rotational frequency characteristics for the input PWM  
signal and the rotational frequency affected from motor.  
Operating Supply Voltage Range :  
Output PWM Frequency :  
Standby Current :  
28 V to 63 V  
40 kHz (Typ)  
1.2 mA (Typ)  
Operating Temperature Range :  
-40 °C to +105 °C  
Package  
VQFN040V6060  
W (Typ) x D (Typ) x H (Max)  
6.00 mm x 6.00 mm x 1.00 mm  
Features  
Speed Control on PWM Duty Input  
External Output FET Nch+Nch  
Built-in Boost Voltage Circuit  
3 Hall Sine Wave Drive  
Automatic Lead Angle Control  
Motor Pole Select Function  
Soft Start Function  
Dead Time Setting  
Current Limit Function  
Power Save Function  
Direction of Rotation Setting  
Short Brake Control  
Speed Feedback Control  
Able to set Motor Rotation Speed Table and Various  
Parameters with the built-in OTP  
Built-in Several Protection Functions (Motor Lock  
Protection [MLP], High Speed Rotation Protection,  
Over Voltage Lock Out [OVLO], Under Voltage Lock  
Out [UVLO], Thermal Shutdown [TSD], Over Current  
Protection [OCP])  
Application  
Fan Motor  
Other General Consumer Equipment  
Typical Application Circuit  
+
0.1µF  
0.1µF  
48V  
0.1µF  
0.1µF  
VREG15  
CP  
VG  
VCC  
PREREGL  
TEST  
UVLO  
VREG  
FB50  
Charge  
Pump  
VCC50  
REG  
VCC50A  
VCC50B  
TSD  
VG  
Internal  
Reg  
VCC50  
UH  
OVLO  
U
Pre  
driver  
U
PS  
HUP  
HU  
UL  
HUN  
VG  
HVP  
HVN  
VH  
V
HV  
V
Pre  
driver  
CTL  
Logic  
M
VL  
HWP  
HWN  
HW  
VG  
WH  
W
VCC50B  
W
Pre  
driver  
SPEED  
Control  
LOGIC  
VCC50  
PWMB  
WL  
POLE_SEL  
VCC50  
Selector  
VCC50A  
SS_SEL  
VCC50  
Selector  
Selector  
RCL  
FGO  
TDEAD_SEL  
FR  
External  
Power  
Supply  
BRK  
SPI_EN  
GND  
Product structure : Silicon integrated circuit This product has no designed protection against radioactive rays  
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BM64350MUV  
Contents  
General Description .............................................................................................................................................................. 1  
Features............................................................................................................................................................................... 1  
Application............................................................................................................................................................................ 1  
Typical Application Circuit...................................................................................................................................................... 1  
Key Specifications................................................................................................................................................................. 1  
Package............................................................................................................................................................................... 1  
Contents............................................................................................................................................................................... 2  
Pin Configurations................................................................................................................................................................. 3  
Pin Descriptions.................................................................................................................................................................... 4  
Block Diagram ...................................................................................................................................................................... 5  
Absolute Maximum Ratings................................................................................................................................................... 6  
Thermal Resistance.............................................................................................................................................................. 7  
Recommended Operating Conditions .................................................................................................................................... 7  
Electrical Characteristics ....................................................................................................................................................... 8  
Application Example.............................................................................................................................................................10  
Board Design Note...............................................................................................................................................................10  
Description of Pin Functions.................................................................................................................................................11  
Description of Operations.....................................................................................................................................................14  
Thermal Resistance Model...................................................................................................................................................26  
I/O Equivalence Circuits.......................................................................................................................................................27  
Operational Notes................................................................................................................................................................28  
Ordering Information............................................................................................................................................................30  
Marking Diagram..................................................................................................................................................................30  
Physical Dimension and Packing Information........................................................................................................................31  
Revision History...................................................................................................................................................................32  
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BM64350MUV  
Pin Configurations  
(TOP VIEW)  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CP  
PREREGL  
HWN  
VL  
WH  
W
HWP  
WL  
HVN  
FGO  
RCL  
GND  
PS  
HVP  
HUN  
HUP  
FB50  
SPI_EN  
N.C.  
EXP-PAD  
VREG  
1
2
3
4
5
6
7
8
9
10  
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BM64350MUV  
Pin Descriptions  
Pin No.  
Pin Name  
Function  
Pin No. Pin Name  
Function  
N.C.  
VCC50A  
VCC50B  
VREG15  
BRK  
N.C. (Open)  
N.C.  
V
N.C. (Open)  
1
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
Standard voltage input  
(to internal analog circuit)  
Standard voltage input  
(to internal logic circuit)  
Internal power supply output for  
logic circuit  
V phase external FET output  
feedback input  
V phase  
High side pre-driver output  
U phase  
Low side pre-driver output  
U phase external FET output  
feedback input  
U phase  
High side pre-driver output  
2
VH  
3
UL  
4
Brake control / SPI  
communication data input-output  
U
5
UH  
FR  
Rotation direction setting  
Soft Start setting  
6
SS_SEL  
VG  
Boost output  
7
TDEAD_SEL Dead Time setting  
VCC  
TEST  
N.C.  
CP  
Power supply  
8
POLE_SEL  
PWMB  
N.C.  
Motor Pole setting  
TEST (Open)  
9
PWM input (negative logic)  
/ SPI communication clock input  
N.C. (Open)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
N.C. (Open)  
Capacitor connection for boost  
Low side Pre-Driver standard  
voltage output  
SPI_EN  
PS  
SPI communication setting  
Power Save input  
Ground  
PREREGL  
HWN  
HWP  
W phase Hall input -  
W phase Hall input +  
GND  
Output current detection voltage  
input  
Rotating speed pulse signal  
output  
RCL  
HVN  
HVP  
V phase Hall input -  
V phase Hall input +  
FGO  
W phase  
WL  
W
HUN  
HUP  
FB50  
U phase Hall input -  
Low side pre-driver output  
W phase external FET output  
feedback input  
U phase Hall input +  
W phase  
Standard voltage Feedback input  
19  
20  
WH  
VL  
39  
40  
High side pre-driver output  
V phase  
VREG  
Standard voltage output  
Low side pre-driver output  
Back  
Side  
Connect the EXP-PAD to the GND.  
EXP-PAD  
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BM64350MUV  
Block Diagram  
PREREGL  
TEST  
VREG15  
CP  
VG  
28pin  
40pin  
VCC  
VREG  
UVLO  
Charge  
Pump  
39pin  
FB50  
2pin  
3pin  
REG  
TSD  
VCC50A  
VCC50B  
VG  
Internal  
Reg  
26pin  
25pin  
24pin  
OVLO  
UH  
U
U
Pre  
driver  
13pin  
38pin  
PS  
HUP  
UL  
37pin  
HUN  
VG  
23pin  
22pin  
VH  
V
36pin  
35pin  
HVP  
HVN  
V
Pre  
driver  
CTL  
Logic  
20pin  
VL  
34pin  
33pin  
HWP  
HWN  
VG  
19pin  
WH  
VCC50B  
W
Pre  
driver  
18pin  
17pin  
SPEED  
Control  
LOGIC  
W
PWMB  
10pin  
9pin  
WL  
Selector  
Selector  
Selector  
POLE_SEL  
VCC50A  
7pin  
SS_SEL  
RCL  
FGO  
15pin  
16pin  
8pin  
6pin  
TDEAD_SEL  
FR  
5pin  
BRK  
12pin  
SPI_EN  
14pin  
GND  
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BM64350MUV  
Absolute Maximum Ratings (Ta=25 °C)  
Parameters  
Symbol  
VCC  
Rating  
100  
Unit  
V
Power Supply Voltage (VCC)  
VG Voltage  
VG  
VOH  
VOL  
100  
100  
20  
V
V
V
Pre-driver High Side Output Voltage (UH, VH, WH)  
Pre-driver Low Side Output Voltage (UL, VL, WL)  
Pre-driver Output-current (consecutive)  
(UH, VH, WH, UL, VL, WL)  
IOMAX1  
IOMAX2  
±10  
mA  
mA  
Pre-driver Output-current(Note 1)  
(UH, VH, WH, UL, VL, WL)  
±100  
External FET Output Feedback Voltage (U, V, W)  
FGO Pin Voltage  
VFBI  
VFGO  
IFGO  
100  
V
V
30  
FGO Pin Current  
10  
mA  
mA  
V
VREG Pin Current  
IVREG  
VRCL  
VIN1  
-15  
RCL Pin Voltage  
4.5  
Control Input Pin Voltage(Note 2)  
Hall Input Pin Voltage(Note 3)  
Maximum Junction Temperature  
Storage Temperature Range  
7
V
VIN2  
7
V
Tjmax  
150  
°C  
Tstg  
-55 to +150  
°C  
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit  
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is  
operated over the absolute maximum ratings.  
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the  
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by  
increasing board size and copper area so as not to exceed the maximum junction temperature rating.  
(Note 1) Pulse Width 1 µs, Pulse Duty 10 %.  
(Note 2) The TDEAD_SEL, SS_SEL, POLE_SEL, PWMB, PS, BRK, FR, SPI_EN pins.  
(Note 3) The HUP, HUN, HVP, HVN, HWP, HWN pins.  
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BM64350MUV  
Thermal Resistance(Note 4)  
Thermal Resistance (Typ)  
Parameter  
Symbol  
Unit  
1s(Note 6)  
2s2p(Note 7)  
VQFN040V6060  
Junction to Ambient  
Junction to Top Characterization Parameter(Note 5)  
θJA  
101.4  
5.0  
23.7  
3.0  
°C/W  
°C/W  
ΨJT  
(Note 4) Based on JESD51-2A (Still-Air).  
(Note 5) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside  
surface of the component package.  
(Note 6) Using a PCB board based on JESD51-3.  
(Note 7) Using a PCB board based on JESD51-5, 7.  
Layer Number of  
Measurement Board  
Material  
FR-4  
Board Size  
Single  
114.3 mm x 76.2 mm x 1.57 mmt  
Top  
Copper Pattern  
Thickness  
Footprints and Traces  
70 μm  
Layer Number of  
Measurement Board  
Thermal Via(Note 8)  
Material  
FR-4  
Board Size  
114.3 mm x 76.2 mm x 1.6 mmt  
2 Internal Layers  
Pitch  
Diameter  
4 Layers  
1.20 mm  
Φ0.30 mm  
Top  
Copper Pattern  
Bottom  
Thickness  
Copper Pattern  
Thickness  
Copper Pattern  
Thickness  
Footprints and Traces  
70 μm  
74.2 mm x 74.2 mm  
35 μm  
74.2 mm x 74.2 mm  
70 μm  
(Note 8) This thermal via connects with the copper pattern of all layers.  
Recommended Operating Conditions  
Parameters  
Symbol  
Min  
Typ  
Max  
Unit  
Operation Temperature  
Topr  
VCC  
VIN1  
-40  
28.0  
0
+25  
48.0  
-
+105  
63.0  
°C  
V
Operating Supply Voltage (VCC)  
Control Input Pin Voltage(Note 9)  
VVCC50  
V
(Note 9) The TDEAD_SEL, SS_SEL, POLE_SEL, PWMB, BRK, FR, SPI_EN pins.  
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BM64350MUV  
Electrical Characteristics (Unless otherwise specified VCC=48 V Ta=25 °C)  
Parameters  
Symbol  
Min  
Typ  
Max  
Unit  
Conditions  
<Whole>  
Circuit Current(Note 10)  
Standby Current(Note 10)  
VCC50 Voltage  
ICC  
-
-
13  
1.2  
20  
1.8  
mA  
mA  
V
PS=0 V  
PS=5 V  
ISTBY  
VVCC50  
VVREG15  
4.5  
1.35  
5.0  
5.5  
VREG15 Voltage  
<Boost Circuit>  
VG Voltage  
1.50  
1.65  
V
VG  
VCC+6.5  
VCC+9.5  
VCC+12.5  
V
<Pre-driver Output>  
High Side Output High  
Voltage  
High Side Output Low  
Voltage  
Low Side Output High  
Voltage  
Low Side Output Low  
Voltage  
VOHH  
VOHL  
VOLH  
VG-0.3  
0
VG-0.1  
0.1  
VG  
0.3  
V
V
V
IO=-5 mA  
IO=+5 mA  
IO=-5 mA  
IO=+5 mA  
6.2  
9.4  
12.5  
VOLL  
fPWM  
0
0.1  
40  
0.3  
44  
V
Output PWM Frequency  
36  
kHz  
<Hall Input>  
HUP=0 V, HUN=0 V  
HVP=0 V, HVN=0 V  
HWP=0 V, HWN=0 V  
Input Bias Current  
IHALL  
-2.0  
0
-0.1  
-
+2.0  
μA  
Common Mode Input  
Voltage Range  
VHALLCM  
VVCC50-1.7  
V
Input Voltage Range  
VHALLRNG  
VHALLMIN  
VHYSP  
0
-
-
VVCC50  
-
V
50  
mVP-P  
Minimum Input Voltage  
Hall Input Hysteresis  
Level +  
Hall Input Hysteresis  
Level -  
2
12  
22  
-2  
mV  
mV  
VHYSN  
-22  
-12  
<PS>  
Input Current  
Input High Voltage  
Input Low Voltage  
<FR>  
IPS  
-82.5  
3.8  
0
-55.0  
-27.5  
5.0  
μA  
V
PS=0 V  
Power Save  
Drive  
VSTBY  
VENA  
-
-
0.5  
V
Input Current  
Input High Voltage  
Input Low Voltage  
<BRK>  
IFR  
25  
VVCC50-1.2  
0
50  
-
75  
VVCC50  
0.8  
μA  
V
FR=VVCC50  
U→V→W  
U→W→V  
VFRH  
VFRL  
-
V
Input Current  
Input High Voltage  
Input Low Voltage  
<SPI_EN>  
IBRK  
25  
VVCC50-1.2  
0
50  
-
75  
VVCC50  
0.8  
μA  
V
BRK=VVCC50  
Short brake  
Drive  
VBRKH  
VBRKL  
-
V
Input High Voltage  
Input Low Voltage  
VSPI_ENH  
VSPI_ENL  
VVCC50-1.0  
0
-
-
VVCC50  
0.8  
V
V
OTP write mode  
Drive mode  
For parameters involving current, positive notation means inflow of current to the IC while negative notation means outflow of current from the IC.  
(Note 10) Total value of VCC, VCC50A and VCC50B ciruit current.  
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Electrical Characteristics Continued (Unless otherwise specified VCC=48 V Ta=25 °C)  
Parameters  
Symbol  
Min  
Typ  
Max  
Unit  
Conditions  
<Control Input: SS_SEL, POLE_SEL, TDEAD_SEL>  
Input Current  
IIN  
-1.2  
-
+1.2  
μA  
<Speed Control Input: PWMB>  
Input Current  
IPWMB  
VPWMBH  
VPWMBL  
fPWMB  
-75  
-50  
-25  
VVCC50  
0.8  
μA PWMB=0 V  
Input High Voltage  
Input Low Voltage  
VVCC50-1.2  
-
-
-
V
V
0
1
Input Frequency Range  
<FGO Output>  
50  
kHz  
Output Low Voltage  
Output Leak Current  
<Current limit: RCL>  
Input Current  
VFGOL  
0
-
0.1  
-
0.3  
1
V
IFGO=+3 mA  
IFGLEAK  
μA FGO=30 V  
IRCL  
VCL  
-35  
-20  
-10  
μA RCL=0 V  
Current Limit Detect Voltage  
<UVLO>  
0.18  
0.20  
0.22  
V
VCC UVLO Release Voltage  
VCC UVLO Lockout Voltage  
VG UVLO Voltage  
<OVLO>  
VUVH  
VUVL  
18  
16  
20  
18  
22  
20  
V
V
V
VUVVG  
VCC+2.0  
VCC+3.0  
VCC+4.0  
OVLO Release Voltage  
OVLO Lockout Voltage  
VOVL  
VOVH  
65  
68  
69  
72  
73  
76  
V
V
<Motor Lock Protection, Several Protections>  
Motor Lock Protection  
Detect Time  
tLK_DET  
tLK_PRT  
0.45  
4.5  
0.50  
5.0  
0.55  
5.5  
s
Protect Time  
s
Several Protections(Note 11)  
For parameters involving current, positive notation means inflow of current to the IC while negative notation means outflow of current from the IC.  
(Note 11) Motor Lock Protection (MLP), High Speed Rotation Protection, Over Voltage Lock Out (OVLO), Thermal Shutdown (TSD), Over Current Protection (OCP).  
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BM64350MUV  
Application Example  
+
0.1µF  
0.1µF  
48V  
0.1µF  
0.1µF  
VREG15  
CP  
VG  
VCC  
PREREGL  
TEST  
UVLO  
VREG  
FB50  
Charge  
Pump  
VCC50  
REG  
VCC50A  
VCC50B  
TSD  
VG  
Internal  
Reg  
VCC50  
UH  
OVLO  
U
Pre  
driver  
U
PS  
HUP  
HU  
HV  
UL  
HUN  
VG  
HVP  
HVN  
VH  
V
V
Pre  
CTL  
Logic  
M
driver  
VL  
HWP  
HWN  
HW  
VG  
WH  
W
VCC50B  
W
Pre  
driver  
SPEED  
Control  
LOGIC  
VCC50  
PWMB  
WL  
POLE_SEL  
VCC50  
VCC50  
Selector  
VCC50A  
SS_SEL  
Selector  
Selector  
RCL  
FGO  
TDEAD_SEL  
FR  
External  
Power  
Supply  
BRK  
SPI_EN  
GND  
Board Design Note  
1. The IC power supply, the IC ground, the motor outputs and the motor ground lines are made as wide as possible.  
2. The IC ground is arranged to the ground connector of PCB as close as possible.  
3. The bypass capacitors connected to the VCC pin and external FETs are placed as close as possible to the VCC pin and  
external FETs.  
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Description of Pin Functions  
1. Power Supply Pin (VCC)  
In order to decrease the AC impedance in wide frequency bandwidth, place a ceramic capacitor (0.01 µF to 0.1 µF) in  
parallel with the electrolytic capacitor.  
The motor’s Back EMF and PWM switching noise may affect the VCC pin voltage. To regulate or stabilize the VCC voltage  
supply, place the bypass capacitor to the IC pin as close as possible. Increase the value of the bypass capacitor if the IC  
needs to drive higher current or if it is experiencing higher Back EMF. VCC must not exceed the absolute maximum ratings.  
It is effective to add a zener diode not exceeding the absolute maximum ratings. Take note that reversing the voltages of  
the VCC and the GND may destroy the IC.  
2. Ground Pin (GND)  
The GND must have impedance as low as possible and must always be maintained as the lowest voltage potential. This is  
to reduce the noise caused by the switching current, and to make the internal standard voltages stable. Avoid having  
common impedance with other devices' GND line.  
3. Boost Pins (CP, VG)  
Built-in charge pump circuit (for High side external FET drive) generates boost voltage VG=VCC+9.5 V (Typ) by connecting  
capacitors and diodes to the CP pin, the VCC pin and the VG pin. It is recommended to use capacitor 0.1 µF or more. And it  
is recommended to use diode absolute maximum voltage 100 V or more, 1.0 A and reverse recovery time trr 100 ns.  
4. High Side Pre-driver Output Pins (UH, VH, WH)  
The external FET high side gate drive voltage is VCC+9.5 V (Typ). Note that 500 (Typ) resistor is built between these pins  
(UH, VH, WH) and the FET output feedback pins (U, V, W) on each phase.  
5. Low Side Pre-driver Output Pins (UL, VL, WL)  
The external FET low side gate drive voltage is 9.5 V (Typ). Note that 200 (Typ) resistor is built between these pins (UL,  
VL, WL) and the GND on each phase.  
6. External FET Output Feedback Input Pins (U, V, W)  
Connect these pins to the source side of external High side FET. High side FET driver circuit generates High side pre-driver  
output voltage based on this pin. Do not leave this pin open, because the voltage higher than expected can be applied to  
the High side FET and cause destruction. Also, this pin can swing the GND potential or less under the influence of Back  
EMF by the motor, and cause malfunction or destruction if it reaches -2 V or less. Preventive measures, such as inserting  
schottky diodes to the GND, can avoid such unexpected IC destruction.  
7. Regulator Input Pins (FB50, VCC50A, VCC50B) / Output Pins (VREG15, VREG)  
The VREG15 pin is 1.5 V (Typ) for internal power supply output for logic circuit. And the VREG pin and the FB50 pin make  
VCC50 voltage (Standard voltage) 5 V (Typ) by connecting external NPN transistor. Refer to P. 25 for circuit configuration.  
the VCC50A pin is 5 V input to internal analog circuit. And the VCC50B pin is 5 V input to internal logic circuit. Connect both  
pins to VCC50 voltage. It is recommended to connect 0.1 µF to 1 µF capacitor to the VCC50A, VCC50B and VREG15 pins.  
And connect nothing to the VREG15 pin except a capacitor.  
8. Power Save Pin (PS)  
The PS pin controls ON/OFF state on each phase output (Negative logic).  
The Power Save state has priority of turning off regulator output (VREG, VREG15) over other control input signals.  
Furthermore, the PS pin is pulled up to internal power supply by 101 (Typ) resistor.  
Table 1. PS Pin Setting Table  
PS pin Setting  
Function  
Low  
Drive  
High / Open  
Power Save  
9. Motor Pole Setting Pin (POLE_SEL)  
Motor Pole can be set at the POLE_SEL pin by applying the appropriate voltage via resistive voltage dividers from VCC50  
(5 V [Typ]). High accuracy is needed for setting, and it is recommended to use 5 % or less precision resistors. Refer to P. 19  
regarding the Motor Pole setting method.  
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Description of Pin Functions Continued  
10. Soft Start Setting Pin (SS_SEL)  
This IC sets Soft Start step time at the SS_SEL pin by applying the appropriate voltage via resistive voltage dividers from  
VCC50 (5 V [Typ]). High accuracy is needed for setting, and it is recommended to use 1 % or less precision resistors. Refer  
to P. 17 regarding the time setting method of Soft Start.  
11. Dead Time Setting Pin (TDEAD_SEL)  
Dead Time can be set at the TDEAD_SEL pin by applying the appropriate voltage via resistive voltage dividers from VCC50  
(5 V [Typ]). High accuracy is needed for setting, and it is recommended to use 1 % or less precision resistors. Refer to P. 19  
regarding the time setting method of Dead Time.  
12. Speed Control PWM Input Pin (PWMB)  
The PWM signal Duty for the PWMB pin can control motor speed (Negative logic).The PMWB pin is pulled up to VCC50B  
by 100 (Typ) resistor. Refer to P. 21 regarding the rotation speed setting of Speed feedback control.  
13. Hall Input Pins (HUP, HUN, HVP, HVN, HWP, HWN)  
Hall comparator is designed with hysteresis (±12 mV [Typ]) in order to prevent malfunction due to noise.  
Case of Hall element: Set the bias current for the Hall element so that the amplitude of Hall input voltage is the minimum  
input voltage (VHALLMIN) or more. It is recommended to connect a ceramic capacitor with about 100 pF to 0.01 µF value  
between the differential input pins of the Hall comparator. Hall comparator has common mode input voltage range  
(VHALLCM). Set the bias voltage within the VHALLCM  
.
Case of Hall IC: Connect the HUP pin, the HVP pin and the HWP pin to each output of Hall ICs and input within the input  
voltage range (VHALLRNG). If the output of the Hall IC is an open drain, pull up it to VCC50 voltage by external resistance.  
Input a reference voltage within VHALLCM into the HUN pin, the HVN pin and the HWN pin (e.g., input a half voltage of  
VCC50 voltage).  
14. Output Current Detect Pin (RCL)  
The RCL pin is an input pin for the current limit comparator. Take into consideration the wiring pattern on the PCB to reduce  
noise when designing PCB layout. Note that the RCL pin is pulled up to VCC50A by 250 (Typ) resistor.  
15. FG Output Pin (FGO)  
The FGO pin outputs FG signal that is generated by Hall signal. No output in Power Save mode. The FGO pin is open drain  
output, so this pin must be pulled up to external voltage by 10 kΩ to 100 kΩ resistor. Note that FGO voltage and current  
should not exceed the maximum absolute ratings.  
16. SPI Communication Setting Pin (SPI_EN)  
When the SPI_EN pin is connected to VREG50, the BRK pin and the PWMB pin are switched to SPI communication pins.  
Refer to the Application Note about OTP Writing Application Circuit using SPI communication. When you do not use SPI  
communication, connect the SPI_EN pin to the GND. The SPI_EN pin is pulled down by 61.5 kΩ (Typ) resistor.  
17. Rotation Direction Setting Pin (FR)  
The FR pin controls rotational direction change. Phase driving sequence is U→V→W when FR=High, and U→W→V when  
FR=Low or Open. Changing the rotational direction during motor rotation is not recommended. If the rotational direction is  
changed, outputs will shift to short brake mode until the rotational speed becomes 500 rpm or less. The FR pin is pulled  
down by 100 kΩ (Typ) resistor.  
Table 2. FR Pin Setting Table  
FR pin Setting  
Low / Open  
High  
Function  
U→W→V  
U→V→W  
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Description of Pin Functions Continued  
18. Brake Control Pin (BRK)  
The BRK pin can stop a rotation. It enters short brake mode with BRK=High, wherein all high side external FETs are  
turned off and all low side external FETs are turned on. It cancels short brake mode when BRK=Low or Open. The BRK  
pin is pulled down by 100 kΩ (Typ) resistor.  
Short brake has higher priority than other protection functions. That is why the protection function is cancelled and short  
brake operation is enabled when the short brake starts operation during other protection function is operating.  
Table 3. BRK Pin Setting Table  
BRK pin Setting  
Function  
Low / Open  
High  
Drive  
Short Brake  
19. Voltage Output for Low Side Pre-driver Pin (PREREGL)  
The PREREGL pin is 9.5 V (Typ) for internal power supply output for low side pre-driver circuit. It is recommended to  
connect 0.1 µF or more to the PREREGL pin. And connect nothing to the PREREGL pin except a capacitor.  
20. Non Connection Pin (N.C.)  
No electrical connection with IC internal circuit.  
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Description of Operations  
1. Timing Chart  
It detects the rotor position by 3 Hall sensors. In addition, silent and low vibration are implemented by making the output  
current a sine waveform.  
1.1 Timing chart of the sine wave drive on 3 Hall sensors  
The timing chart of the 3 Hall sensor signals and external FET output signals are shown below.  
FR=High (U→V→W, lead angle 0°)  
(1)  
0° 30°  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
(9) (10) (11) (12) (1)  
(2)  
(3)  
(4)  
(5)  
STAGE  
Position  
60° 90° 120° 150° 180° 210° 240° 270° 300° 330° 360° 390° 420° 450° 480°  
3 HALL Sensor signal  
HU=HUP-HUN  
HV=HVP-HVN  
HW=HWP-HWN  
Coil Current  
I_U  
I_V  
I_W  
U
External FET  
Output signal  
(2 Phase Modulation  
Sine drive)  
V
W
FGO signal  
FGO  
Position  
0° 30°  
60° 90° 120° 150° 180° 210° 240° 270° 300° 330° 360° 390° 420° 450° 480°  
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
V
W V  
WV  
W V  
W V  
W V  
WV  
W V  
W V  
W V  
W V  
WV  
W V  
W V  
W V  
W V  
WV  
W
PWM Operation  
Figure 1. Timing Chart for Sine Wave Drive (FR=High)  
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1.1 Timing chart of the sine wave drive on 3 Hall sensors Continued  
FR=Low (U→W→V, lead angle 0°)  
(1)  
0° 30°  
(2)  
(3)  
(4)  
(5)  
(6)  
(7)  
(8)  
(9) (10) (11) (12) (1)  
(2)  
(3)  
(4)  
(5)  
STAGE  
Position  
60° 90° 120° 150° 180° 210° 240° 270° 300° 330° 360° 390° 420° 450° 480°  
3 HALL Sensor signal  
HU=HUP-HUN  
HV=HVP-HVN  
HW=HWP-HWN  
Coil Current  
I_U  
I_V  
I_W  
U
External FET  
Output signal  
(2 Phase Modulation  
Sine drive)  
V
W
FGO signal  
FGO  
: PWM Operation  
Figure 2. Timing Chart for Sine Wave Drive (FR=Low)  
Adjustment of the Hall Sensor  
When the Hall sensor is used, the amplitude adjustment of the Hall signal is important for a stable drive. It is  
necessary to detect the correct position of a motor that the amplitude of Hall signal is larger enough than the Hall input  
hysteresis level+ (VHYSP) and Hall input hysteresis level- (VHYSN). About Selections of Hall element or Hall IC, it is  
necessary to fully consider the sensitivity and temperature characteristics.  
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1. Timing Chart Continued  
1.2 Energizing Logic  
FR=High (U→V→W, lead angle 0°)  
Table 4. Energizing Logic Table  
Input Condition  
HV  
=(HUP)-(HUN) =(HVP)-(HVN) =(HWP)-(HWN)  
Output State  
V
HU  
HW  
STAGE  
U
W
1
2
Middle  
High  
High  
High  
High  
High  
Middle  
Low  
Low  
Low  
High  
High  
Middle  
Low  
PWM  
PWM  
Low  
Low  
PWM  
PWM  
3
Low  
PWM  
Low to PWM PWM to Low  
4
Low  
PWM  
PWM  
PWM  
PWM  
PWM  
PWM  
PWM  
PWM  
Low  
Low  
5
Middle  
High  
High  
High  
High  
High  
Middle  
Low  
Low  
PWM  
6
Low  
PWM  
Low  
7
Low  
PWM to Low  
Low  
Low to PWM  
PWM  
8
Low  
9
Low  
Middle  
High  
High  
High  
Low  
PWM  
10  
11  
12  
Low  
Low  
PWM  
Low  
Low to PWM PWM to Low  
PWM Low  
PWM  
Low  
PWM  
2. Lock Protection Function (MLP: Motor Lock Protection)  
When the motor is locked due to disturbance factors, the IC has a protection function that turns off all external FETs for a  
certain period (lock protection time tLK_PRT: 5.0 s [Typ]) so that the current will not continue to flow in the coil current. In  
addition, it has a function that automatically restarts after lock protection time. Hall signal transitions are detected as the  
motor rotates. But when the motor is locked, they are not detected. When they are not detected for a certain period (lock  
protection detect time tLK_DET: 0.5 s [Typ]), the IC judges as the motor is locked. The timing chart of the Hall signal and each  
output phase during lock protection is shown in Figure 3.  
Motor Lock  
Re-Start  
V Hall Sensor  
Comparator  
Output Signal  
External FET  
Output U  
External FET  
Output V  
Output Hi-Z section  
External FET  
Output W  
Start-up Section  
Look Detect OFF Section tLK_PRT (5.0 s)  
Hall Driving Section  
(normal driving)  
Look Detect Section tLK_DET (0.5 s)  
Figure 3. Timing Chart during Lock Protection  
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Description of Operations Continued  
3. Current Limit Setting (the RCL pin)  
When the IC detects the coil current the current setting value or more, all high side external FETs are turned off and cut off  
the current. When the current is less than the current value setting in the timing of next PWM (ON) after that, it returns to  
normal drive. Setting current value IO that operates the current limit is determined on the current limit setting voltage (VCL)  
0.2 V (Typ) in the IC and the resistance R1 to use for the coil current detection. Please refer to the formula shown below in  
the case of R1=0.2 Ω.  
[ ]  
[ ]  
[ ]  
A = 푉퐶퐿 [V] / 푅1 [Ω]  
W = 푉퐶퐿 V × 퐼[A]  
= 0.2 × ꢀ.0  
= 0.2 / 0.2  
= 0.2 W  
= ꢀ.0 A  
When the current limit function is not used, short the RCL pin with the GND. A large current flows through the resistor R1 to  
detect the coil current. Because the power consumption PC is calculated with the formula shown above, please pay  
attention to the power dissipation.  
VCC50A  
Current Detection Resistor  
VCL  
Open Setting  
(Prohibit mode)  
NG  
GND short Setting  
(Current Limit disable)  
OK  
Connection  
(Current Limit enable)  
OK  
CL COMP  
GND  
RCL  
R1  
RCL  
RCL  
RCL  
Io  
R1  
IC small signal GND line  
motor large current GND line  
Figure 4. RCL Pin Process  
Figure 5. Small Signal and Large Current  
GND Line Separation  
When design a PCB layout, separate the IC small signal GND line from the motor large current GND line connected to R1  
as shown in Figure 5.  
4. Soft Start Time Setting (the SS_SEL pin)  
When it starts from a motor stop state, there is a function to increase the VCC current gradually (Soft Start function) for  
controlling the inrush current. In the start-up command to start from the motor stop state, there are the start by the power  
supply injection, the start by the torque input (the PWMB pin), the start by the power save cancellation (the PS pin), the  
return from lock protection, the return from the short brake mode at the time of the rotational direction change (the FR pin),  
and the return from the motor stop state by each protection function (High Speed Rotation Protection, Over Voltage Lock  
Out, Under Voltage Lock Out and Thermal Shutdown). About the current limit during Soft Start, it maintains the sine wave  
drive by gradually increasing the output duty of the external FET.  
ON  
Start-up Command  
OFF  
Current limit (VCL  
VCC Current  
)
0A  
Figure 6. Timing Chart of the Coil Current Waveform at Soft Start  
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4. Soft Start Time Setting (the SS_SEL pin) Continued  
The Soft Start function can gradually increase the current limit setting voltage in the IC. The Time for 1 step is set on the  
voltage of the SS_SEL pin as shown in Table 5. In addition, set it in consideration of ±10 % tolerance of the Time for 1 step.  
The current limit setting voltage in the IC increases for 1 step voltage 5.16 mV (Typ). Therefore, the soft start time can be  
calculated as follows.  
(
)
Soft Start time = Time for ꢀ step × 푉 − 5ꢀ.6 mV / 5.ꢀ6 mV  
퐶퐿  
For example, when SS_SEL=0 V, it is calculated as below.  
(
)
Soft Start time = 49 ms × 200 mV − 5ꢀ.6 mV / 5.ꢀ6 mV = ꢀ.4 s  
Start-up  
command  
V
CL: 200 mV (Typ)  
Current limit voltage setting  
of the internal IC  
1Step Voltage: 5.16 mV (Typ)  
51.6 mV (Typ)  
Time for 1Step  
Soft Start Time  
Figure 7. Timing Chart of the Current Limit Voltage Setting during Soft Start  
Table 5. SS_SEL Pin Setting Table  
SS_SEL pin Setting  
Time for 1 step (Typ)  
0.000  
0.069  
0.131  
0.194  
0.256  
0.319  
0.381  
0.444  
0.506  
0.569  
0.631  
0.694  
0.756  
0.819  
0.881  
0.944  
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
0.056  
0.119  
0.181  
0.244  
0.306  
0.369  
0.431  
0.494  
0.556  
0.619  
0.681  
0.744  
0.806  
0.869  
0.931  
1.000  
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
49 ms  
98 ms  
147 ms  
197 ms  
246 ms  
295 ms  
344 ms  
393 ms  
442 ms  
491 ms  
541 ms  
590 ms  
639 ms  
688 ms  
737 ms  
786 ms  
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Description of Operations Continued  
5. Dead Time Setting (the TDEAD_SEL pin)  
It can perform Dead Time setting with the TDEAD_SEL pin. Dead Time is set on the voltage of the TDEAD_SEL pin as  
shown in Table 6. Set it in consideration of ±10 % tolerance of the Dead Time.  
ꢀ07  
32  
64  
TDEAD_SEL voltage = ꢁ  
× Dead Time +  
ꢂ × 푉  
ꢃ퐶퐶ꢄꢅ  
Table 6. TDEAD_SEL Pin Setting Table  
TDEAD_SEL pin Setting  
to 0.028  
to 0.060  
Dead Time (Typ)  
0.000  
0.034  
0.063  
0.094  
0.125  
0.156  
0.191  
0.222  
0.253  
0.281  
0.313  
x
x
x
x
x
x
x
x
x
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
0.1 µs  
0.1 µs  
0.2 µs  
0.3 µs  
0.4 µs  
0.5 µs  
0.6 µs  
0.7 µs  
0.8 µs  
0.9 µs  
1.0 µs  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
to  
0.091  
0.122  
0.153  
0.185  
0.216  
0.247  
0.278  
0.310  
0.341  
x
x
x
x
x
x
x
x
x
0.909  
0.941  
0.972  
x
x
x
VVCC50  
VVCC50  
VVCC50  
0.935  
0.966  
1.000  
x
x
x
VVCC50  
VVCC50  
VVCC50  
2.9 µs  
3.0 µs  
3.1 µs  
6. Motor Pole Setting (the POLE_SEL pin)  
Set the POLE_SEL pin voltage based on the motor poles. Refer to Table 7 for setting. For other motor poles setting, refer to  
the Application Note.  
Table 7. POLE_SEL Pin Setting Table  
POLE_SEL pin Setting  
Motor Pole (poles)  
0.00  
0.16  
0.30  
0.44  
0.59  
0.73  
0.87  
x
x
x
x
x
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
to  
to  
to  
to  
to  
to  
to  
0.13  
0.27  
0.41  
0.56  
0.70  
0.84  
1.00  
x
x
x
x
x
x
x
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
VVCC50  
4
6
8
2
12  
14  
10  
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Description of Operations Continued  
7. Under Voltage Lock Out (UVLO)  
In extremely low supply voltage domain deviating from normal operation, it is a protection function that prevents the  
unexpected operations such as large current flow in drive FET by turning off all external FETs intentionally. UVLO works  
and all external FETs are turned off when VCC reaches 18 V (Typ) or less in the domain less than 28 V of the recommended  
operating minimum voltage. And the regulator outputs (VREG, VREG15) are turned off. UVLO circuit has hysteresis of 2 V  
(Typ), and UVLO is cancelled when VCC reaches 20 V (Typ) or more.  
8. VG Under Voltage Lock Out (VG UVLO)  
When VG reaches VCC+3.0 V (Typ) or less, VG UVLO works and all external FETs are turned off. VG UVLO circuit has no  
hysteresis.  
9. Over Voltage Lock Out (OVLO)  
When VCC reaches 72 V (Typ) or more, OVLO works and it enters short brake mode, wherein all high side external FETs  
are turned off and all low side external FETs are turned on for a certain period (protect time tLK_PRT: 5.0 s [Typ]). In addition,  
the boost function for VG voltage is turned off. OVLO circuit has hysteresis of 3 V (Typ), and OVLO is cancelled when VCC  
reaches 69 V (Typ) or less after the protect time. This circuit has mask time of 4 µs (Typ) to prevent malfunctions.  
10. High Speed Rotation Protection  
When a rotating speed reaches 40,300 rpm (Typ) or more due to boost up by uncontrollable motor, it has the protection  
function which turn off all external FETs for a certain period (protect time tLK_PRT: 5.0 s [Typ]). After the Protect time, the High  
Speed Rotation Protection is cancelled when a rotating speed reaches less than 40,300 rpm (Typ).  
11. Thermal Shutdown (TSD)  
When the chip temperature reaches 175 °C (Typ) or more, TSD works and all external FETs are turned off for a certain  
period (protect time tLK_PRT: 5.0 s [Typ]). TSD circuit has hysteresis of 25 °C (Typ), and TSD is cancelled when the chip  
temperature drops after the protect time. Moreover, the purpose of the TSD circuit is to protect driver IC from thermal  
breakdown, therefore, temperature of this circuit will be over working temperature when it is started up. Thus, thermal  
design should have sufficient margin, so do not take continuous use and action of the circuit as a precondition.  
12. Over Current Protection (OCP)  
Built-in Over Current Protection circuit is possible to protect from power supply short fault only. When the specified current  
or more is detected, OCP works and all external FETs are turned off for a certain period (protect time tLK_PRT: 5.0 s [Typ]).  
When it is not detected after the protect time, OCP is canceled.  
13. Hall input error protection (HALL ERROR)  
When Hall input is abnormal, the Hall input error protection works and all external FETs are turned off. This protection has  
the mask time of 1.0 ms (Typ). Once protection is operated, it continues until it is cancelled by restart from the operation of  
Power Save, Speed Control Non-input or VCC off.  
14. Priority of Protection  
This IC has a priority order in each protection operation as shown below. The protection with higher priority will be activated  
during the protection with lower priority.  
Table 8. Priority Order of Protect Operation  
Priority Order  
Protection  
1st  
2nd  
3rd  
4th  
VCC UVLO  
OCP  
TSD  
OVLO  
MLP, High Speed Rotation Protection,  
Hall Error Protection, VG UVLO  
5th  
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Description of Operations Continued  
15. Auto Lead Angle Control  
It has the auto lead angle function which enables a high efficiency drive by matching the phase of the coil current to the  
phase of the Back EMF voltage generated to the coil automatically while driving the motor. To do that, place Hall sensors in  
reference to Figure 8 so that the timing of the Hall sensor signal and the coil current at the lead angle 0° becomes Figure 1  
(U→V→W) or Figure 2 (U→W→V). The lead angle adjustment range is from 0° to 45°.  
Y. connection  
U
H2  
H1  
N
S
V
W
H3  
Figure 8. The Placement of Hall sensors  
16. Speed Feedback Control  
It has a speed feedback control to keep the motor rotation speed constant. It controls a drive duty so that the target motor  
rotation speed that set by an input PWMB signal and the frequency of internal FG signal are equal. It sets various  
parameters that are most suitable for the target rotation speed and characteristics of the motor. These setting parameters  
can be written to the OTP. The data written on the OTP are set to registers when the IC is powered on. If the data is not  
written on the OTP, registers are set default value shown in the register map. Refer to the Application Note about OTP  
setting. In this document, default value is described. The block diagram of speed feedback control is shown in Figure 9.  
Speed control Logic  
PWM Duty  
Capture  
RPM  
Converter  
PWMB  
Duty Ramp  
PI  
Drive  
Control  
Generator  
FG  
Counter  
Internal FG  
From motor  
Motor drive Logic  
Motor  
Drive  
generater  
Drive Control duty  
UH, VH, WH  
UL, VL, WL  
Pre_  
Driver  
Figure 9. The Block Diagram of Speed Feedback Control  
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16. Speed Feedback Control Continued  
16.1 Relations of the Input PWMB Duty and the Target RPM  
In the case that the POLE_SEL pin setting is 10 poles, the relations of the input PWMB Duty and the Target RPM  
become like Figure 10. The relation of the maximum Target RPM when input PWMB Duty=0 % (Note that this is  
negative logic) and the motor poles is calculated below.  
4
(
)
(
)
T푎푟푔푒푡 푅푃푀 푀푎푥 = ꢀ,024 × 80 + ꢀ × 0.256 ×  
푝표푙푒푠  
Where poles=10, then,  
4
ꢀ0  
(
)
(
)
T푎푟푔푒푡 푅푃푀 푀푎푥 = ꢀ,024 × 80 + ꢀ × 0.256 ×  
= 8493 rpm  
In addition, it is equipped with a function that can perform Drive Off judgment and stops (Hi-z output) the motor when  
the Target RPM is 84.9 rpm or less (PWMB Duty is 99 % or more). And it restarts the motor in a timing that the Target  
RPM is 424.6 rpm or more (PWMB Duty is 95 % or less).  
8493  
424.6  
84.9  
0
PWMIN DUTY [%]  
100  
95 99  
0
Figure 10. PWMB Duty and Target RPM (10 poles Setting)  
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16. Speed Feedback Control Continued  
16.2 Motor RPM Measurement  
For the motor RPM, a half period of the internal FG signal is measured. This measured value is compared with a half  
target period which is calculated from the Target RPM. And this difference is the speed error value. When the half  
period of the internal FG signal is longer (the motor rotation speed is slow), the speed error value becomes minus. On  
the other hand, when it is shorter (the motor rotation speed is fast), the speed error value becomes plus.  
16.3 Setting of Motor Speed control  
Built-in RAMP control drive and PI control drive. The setting method is shown in Table 9.  
Table 9. The Motor Speed Control Setting  
Start and Acceleration /  
Deceleration Operation  
Stable Operation  
RAMP control drive  
PI control drive  
16.4 PI Control  
It drives the closed-loop speed feedback control using the PI control. The Drive Control Duty (Drive control) is  
calculated from the proportional gain (KP=1.0) and the integral gain (KI=0.0117) regarding the speed error value  
(ERROR VALUE) measured in Internal FG Signal Period Measurement. The PI control block diagram is shown in  
Figure 11.  
KP  
Drive control  
ERROR VALUE  
1/S  
KI  
Figure 11. The PI Control Block Diagram  
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16. Speed Feedback Control Continued  
16.5 RAMP Control  
The Drive Control Duty increases gradually when the speed error value is minus (the motor rotation speed is slow),  
and decreases gradually when the speed error value is plus (the motor rotation speed is fast). So the real motor  
rotation speed approaches the target motor rotation speed. An increase/decrease step width of the Drive Control Duty  
is 0.49 % every 41.6 ms as shown in Figure 13.  
Acceleration  
Deceleration  
Target Motor  
Rotation Speed  
Drive Control Duty  
0.49 % Duty  
Increase Gradually  
41.6 ms  
Decrease Gradually  
time  
Figure 12. The RAMP Control Function Summary  
Figure 13. The RAMP Step  
About shifting from the RAMP control to the PI control, the state shifts to the PI control when the speed error value is  
settled with 1.57 % or less. In the large domain of the speed error value, the real motor rotation speed approaches the  
target motor rotation speed operating the RAMP control. So the speed error value becomes small, it starts the PI  
control. It facilitates parameter adjustment.  
±1.57%  
Target RPM  
Change RAMP to PI Control  
time  
RAMP Control  
PI Control  
Figure 14. The State Switch from the RAMP Control to the PI Control  
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Description of Operations Continued  
17. VCC50 Voltage  
It is recommended to use the reference voltage circuit using an external NPN transistor about countermeasures for heat  
generation. This circuit is shown in Figure 15. VCC50 voltage is 5 V (Typ) by this circuit. Current of 2.6 mA (Typ) to the VCC  
pin and total current 10.4 mA (Typ) to the VCC50A and VCC50B pin flow.  
VCC  
VREG  
FB50  
VCC50A  
VCC50B  
VCC50  
IC  
Hall U  
Hall V  
Hall W  
Figure 15. The Reference voltage circuit using external NPN transistor  
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Thermal Resistance Model  
Heat generated by consumed power of IC is radiated from the mold resin or lead frame of package. The parameter which  
indicates this heat dissipation capability (hardness of heat release) is called thermal resistance. Thermal resistance from  
the chip junction to the ambient is represented in θJA (°C/W), and thermal characterization parameter from junction to the  
top center of the outside surface of the component package is represented in ΨJT (°C/W). Thermal resistance is divided  
into the package part and the substrate part. Thermal resistance in the package part depends on the composition materials  
such as the mold resins and the lead frames. On the other hand, thermal resistance in the substrate part depends on the  
substrate heat dissipation capability of the material, the size, and the copper foil area etc. Therefore, thermal resistance  
can be decreased by the heat radiation measures like installing a heat sink etc. in the mounting substrate. The equations  
are shown below and the thermal resistance model is shown in Figure 16.  
Equation  
푇푗ꢆ푇ꢇ  
퐽퐴 =  
퐽푇 =  
[°C/W]  
[°C/W]  
푇푗ꢆ푇ꢉ  
Where:  
퐽퐴 is the thermal resistance from junction to ambient (°C/W)  
퐽푇 is the thermal characterization parameter from junction  
to the top center of the outside surface of the component package (°C/W)  
ꢊꢋ is the junction temperature (°C)  
ꢊ푎 is the ambient temperature (°C)  
ꢊ푡 is the package outside surface (top center) temperature (°C)  
is the power consumption (W)  
Ambient temperature: Ta (°C)  
Package outside surface (top center)  
temperature: Tt (°C)  
ƟJA (°C/W)  
Junction temperature: Tj (°C)  
ΨJT (°C/W)  
Mounting Substrate  
Figure 16. Thermal Resistance Model of Surface Mount  
Even if it uses the same package, θJA and ΨJT are changed depending on the chip size, power consumption and the  
measurement environments of the ambient temperature, the mounting condition and the wind velocity, etc.  
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I/O Equivalence Circuits  
1) VREG, FB50 pin  
2) VREG15 pin  
3) PS pin  
VCC50B  
VREG15  
VCC  
Internal Reg  
VCC50B  
100 kΩ  
VREG  
FB50  
1 kΩ 10 kΩ  
10 kΩ  
PS  
5 kΩ  
156 kΩ  
50 kΩ  
49 kΩ  
80 kΩ  
60 kΩ  
24.4 kΩ  
4) BRK pin  
5) FR pin  
6) SPI_EN pin  
VCC50B  
VCC50B  
VCC50B  
5 kΩ  
5 kΩ  
BRK  
5 kΩ  
10 kΩ  
FR  
SPI_EN  
100 kΩ  
200 kΩ  
100 kΩ  
10 kΩ  
61.5 kΩ  
×2  
7) POLE_SEL, PWMB pin  
8) SS_SEL pin  
9) TDEAD_SEL pin  
VCC50B  
VCC50B  
VCC50B  
5 kΩ  
PWMB  
POLE_SEL  
90 kΩ  
90 kΩ  
90 kΩ  
90 kΩ  
90 kΩ  
90 kΩ  
SS_SEL  
10 kΩ  
10 kΩ  
TDEAD_SEL  
10 kΩ  
20 Ω  
20 Ω  
20 Ω  
10) VG, UH, U, VH, V, WH, W pin  
11) UL, VL, WL pin  
12) FGO pin  
VG  
FGO  
PREREGL  
5 Ω  
UH  
VH  
WH  
UL  
VL  
WL  
500 kΩ  
500 kΩ  
U
V
W
200 kΩ  
120 kΩ 360 kΩ  
24 kΩ  
360 kΩ  
360 kΩ  
24 kΩ  
13) CP pin  
14) RCL pin  
VCC50A  
15) PREREGL pin  
16) HUP, HUN, HVP,  
HVN, HWP, HWN pin  
HUP  
Internal Reg  
VCC  
10 kΩ  
250 kΩ  
2 kΩ  
HUN  
HVP  
HVN  
HWP  
HWN  
25 Ω  
2 kΩ  
RCL  
CP  
PREREGL  
×2  
1000 kΩ  
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Operational Notes  
1. Reverse Connection of Power Supply  
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when  
connecting the power supply, such as mounting an external diode between the power supply and the ICs power  
supply pins.  
2. Power Supply Lines  
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at  
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic  
capacitors.  
3. Ground Voltage  
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. However,  
pins that drive inductive loads (e.g. motor driver outputs, DC-DC converter outputs) may inevitably go below ground  
due to back EMF or electromotive force. In such cases, the user should make sure that such voltages going below  
ground will not cause the IC and the system to malfunction by examining carefully all relevant factors and conditions  
such as motor characteristics, supply voltage, operating frequency and PCB wiring to name a few.  
4. Ground Wiring Pattern  
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but  
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal  
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations  
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.  
5. Recommended Operating Conditions  
The function and operation of the IC are guaranteed within the range specified by the recommended operating  
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical  
characteristics.  
6. Inrush Current  
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow  
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power  
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and  
routing of connections.  
7. Testing on Application Boards  
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may  
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply  
should always be turned off completely before connecting or removing it from the test setup during the inspection  
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during  
transport and storage.  
8. Inter-pin Short and Mounting Errors  
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in  
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.  
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and  
unintentional solder bridge deposited in between pins during assembly to name a few.  
9. Unused Input Pins  
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and  
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small  
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and  
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the  
power supply or ground line.  
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Operational Notes continued  
10. Regarding the Input Pin of the IC  
This IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P-N  
junctions are formed at the intersection of the P layers with the N layers of other elements, creating a parasitic diode or  
transistor. For example (refer to figure below):  
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.  
When GND > Pin B, the P-N junction operates as a parasitic transistor.  
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual  
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to  
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be  
avoided.  
Resistor  
Transistor (NPN)  
Pin A  
Pin B  
Pin B  
B
E
C
Pin A  
B
C
E
P
P+  
P+  
N
P+  
P
P+  
N
N
N
N
N
N
N
Parasitic  
Elements  
Parasitic  
Elements  
P Substrate  
GND GND  
P Substrate  
GND  
GND  
Parasitic  
Elements  
Parasitic  
Elements  
N Region  
close-by  
Figure 17. Example of IC Structure  
11. Ceramic Capacitor  
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with  
temperature and the decrease in nominal capacitance due to DC bias and others.  
12. Thermal Shutdown Circuit (TSD)  
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always  
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the  
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj  
falls below the TSD threshold, the circuits are automatically restored to normal operation.  
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no  
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from  
heat damage.  
13. Over Current Protection Circuit (OCP)  
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This  
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should  
not be used in applications characterized by continuous operation or transitioning of the protection circuit.  
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Ordering Information  
M U  
V
B M 6  
4
3
5
0
-
E 2  
Part Number  
Package  
MUV: VQFN040V6060  
Packaging and forming specification  
E2: Embossed tape and reel  
Marking Diagram  
VQFN040V6060 (TOP VIEW)  
Part Number Marking  
LOT Number  
M 6 4 3 5 0  
Pin 1 Mark  
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Physical Dimension and Packing Information  
Package Name  
VQFN040V6060  
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Revision History  
Date  
Revision  
001  
Changes  
23.Jan.2019  
New Release  
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Notice  
Precaution on using ROHM Products  
1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,  
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you  
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport  
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car  
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or  
serious damage to property (Specific Applications), please consult with the ROHM sales representative in advance.  
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any  
damages, expenses or losses incurred by you or third parties arising from the use of any ROHMs Products for Specific  
Applications.  
(Note1) Medical Equipment Classification of the Specific Applications  
JAPAN  
USA  
EU  
CHINA  
CLASS  
CLASSⅣ  
CLASSb  
CLASSⅢ  
CLASSⅢ  
CLASSⅢ  
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor  
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate  
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which  
a failure or malfunction of our Products may cause. The following are examples of safety measures:  
[a] Installation of protection circuits or other protective devices to improve system safety  
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure  
3. Our Products are designed and manufactured for use under standard conditions and not under any special or  
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way  
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any  
special or extraordinary environments or conditions. If you intend to use our Products under any special or  
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of  
product performance, reliability, etc, prior to use, must be necessary:  
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents  
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust  
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,  
H2S, NH3, SO2, and NO2  
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves  
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items  
[f] Sealing or coating our Products with resin or other coating materials  
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.  
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble  
cleaning agents for cleaning residue after soldering  
[h] Use of the Products in places subject to dew condensation  
4. The Products are not subject to radiation-proof design.  
5. Please verify and confirm characteristics of the final or mounted products in using the Products.  
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,  
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power  
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect  
product performance and reliability.  
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in  
the range that does not exceed the maximum junction temperature.  
8. Confirm that operation temperature is within the specified range described in the product specification.  
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in  
this document.  
Precaution for Mounting / Circuit board design  
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product  
performance and reliability.  
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must  
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,  
please consult with the ROHM representative in advance.  
For details, please refer to ROHM Mounting specification  
Notice-PGA-E  
Rev.004  
© 2015 ROHM Co., Ltd. All rights reserved.  
Precautions Regarding Application Examples and External Circuits  
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the  
characteristics of the Products and external components, including transient characteristics, as well as static  
characteristics.  
2. You agree that application notes, reference designs, and associated data and information contained in this document  
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely  
responsible for it and you must exercise your own independent verification and judgment in the use of such information  
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses  
incurred by you or third parties arising from the use of such information.  
Precaution for Electrostatic  
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper  
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be  
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,  
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).  
Precaution for Storage / Transportation  
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:  
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2  
[b] the temperature or humidity exceeds those recommended by ROHM  
[c] the Products are exposed to direct sunshine or condensation  
[d] the Products are exposed to high Electrostatic  
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period  
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is  
exceeding the recommended storage time period.  
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads  
may occur due to excessive stress applied when dropping of a carton.  
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of  
which storage time is exceeding the recommended storage time period.  
Precaution for Product Label  
A two-dimensional barcode printed on ROHM Products label is for ROHMs internal use only.  
Precaution for Disposition  
When disposing Products please dispose them properly using an authorized industry waste company.  
Precaution for Foreign Exchange and Foreign Trade act  
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign  
trade act, please consult with ROHM in case of export.  
Precaution Regarding Intellectual Property Rights  
1. All information and data including but not limited to application example contained in this document is for reference  
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any  
other rights of any third party regarding such information or data.  
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Notice-PGA-E  
Rev.004  
© 2015 ROHM Co., Ltd. All rights reserved.  
Daattaasshheeeett  
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Notice – WE  
Rev.001  
© 2015 ROHM Co., Ltd. All rights reserved.  

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