BD9778F_10 [ROHM]
Flexible Step-down Switching Regulators with Built-in Power MOSFET; 灵活的降压型开关稳压器具有内置功率MOSFET型号: | BD9778F_10 |
厂家: | ROHM |
描述: | Flexible Step-down Switching Regulators with Built-in Power MOSFET |
文件: | 总17页 (文件大小:667K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Single-chip Type with built-in FET Switching Regulator Series
Flexible Step-down
Switching Regulators
with Built-in Power MOSFET
BD9778F, BD9778HFP, BD9001F, BD9781HFP
No.10027EBT41
Overview
The flexible step-down switching regulator controller is a switching regulator controller designed with a high-withstand-voltage
built-in POWER MOS FET, providing a free setting function of operating frequency with external resistor. This switching regulator
controller features a wide input voltage range (7 V to 35 V or 7 V to 48 V) and operating temperature range (-40˚C to +125˚C or
-40˚C to +95˚C). Furthermore, an external synchronization input pin (BD9781HFP) enables synchronous operation with external
clock.
Features
1) Minimal external components
2) Wide input voltage range: 7 V to 35 V (BD9778F/HFP and BD9781HFP), 7 V to 48 V (BD9001F)
3) Built-in P-ch POWER MOS FET
4) Output voltage setting enabled with external resistor: 1 to VIN
5) Reference voltage accuracy: 2ꢀ
6) Wide operating temperature range: -40˚C to +125˚C (BD9778F/HFP and BD9781HFP),
-40˚C to +95˚C (BD9001F)
8) Low dropout: 100ꢀ ON Duty cycle
9) Standby mode supply current: 0 µA (Typ.) (BD9778F/HFP and BD9781HFP), 4 µA (Typ.) (BD9001F)
10) Oscillation frequency variable with external resistor: 50 to 300 kHz (BD9001F),
50 to 500 kHz (BD9778F/HFP and BD9781HFP)
11) External synchronization enabled (only on the BD9781HFP)
12) Soft start function : soft start time fixed to 5 ms (Typ.))
13) Built-in overcurrent protection circuit
14) Built-in thermal shutdown protection circuit
15) High power HRP7 package mounted (BD9778HFP and BD9781HFP)
Compact SOP8 package mounted (BD9778F and BD9001F)
Applications
All fields of industrial equipment, such as Flat TV , printer, DVD, car audio, car navigation,
and communication such as ETC, AV, and OA.
Product lineup
Item
Output current
BD9778F/HFP
2A
BD9001F
2A
BD9781HFP
4A
Input range
7V ~ 35V
50 ~ 500kHz
Not provided
Provided
7V ~ 48V
50 ~ 300kHz
Not provided
Provided
7V ~ 35V
50 ~ 500kHz
Provided
Provided
40˚C ~ +125˚C
HRP7
Oscillation frequency range
External synchronization
Standby function
Operating temperature
Package
-
40˚C ~ +125˚C
-
40˚C ~ +95˚C
SOP8
-
SOP8 / HRP7
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.02 - Rev. B
1/16
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Absolute Maximum Ratings(Ta = 25˚C)
Parameter
Symbol
VIN
Limits
36
50
VIN
2
4
VIN
7
5.5
0.69
Unit
V
BD9778F/HFP,BD9781HFP
Power supply
voltage
Output switch pin voltage
BD9001F
VSW
V
*1
*1
BD9778F/HFP, BD9001F
ISW
Output switch current
EN/SYNC, EN pin voltage
RT, FB, INV pin voltage
A
V
BD9781HFP
VEN/SYNC,VEN
V
RT,VFB,VINV
*2
*3
HRP7
Power dissipation
Pd
W
SOP8
Operating temperature
range
BD9778F/HFP,BD9781HFP
BD9001F
-
-
-
40 ~ +125
40 ~ +95
55 ~ +150
150
Topr
Tstg
˚C
˚C
˚C
Storage temperature range
Maximum junction temperature
*1 Should not exceed Pd-value.
Tjmax
*2 Reduce by 44mW/°C over 25°C, when mounted on 2-layer PCB of 70 X 70 X 1.6 mm3.
(PCB incorporates thermal via. Copper foil area on the front side of PCB: 10.5 X 10.5 mm2. Copper foil area on the reverse side of PCB: 70 X 70 mm2)
*3 Reduce by 5.52 mW/°C over 25°C, when mounted on 2-layer PCB of 70 X 70 X 1.6 mm3.
Recommended operating range
Parameter
BD9778F/HFP
7 ~ 35
BD9001F
7 ~ 48
BD9781HFP
7 ~ 35
Unit
V
Operating power supply voltage
Output switch current
~ 2
~ 2
~ 4
A
Output voltage (ON Duty)
Oscillation frequency
6 ~ 100
50 ~ 500
40 ~ 800
6 ~ 100
50 ~ 300
100 ~ 800
6 ~ 100
50 ~ 500
39 ~ 800
%
kHz
kΩ
Oscillation frequency set resistance
Possible operating range
Parameter
BD9778F/HFP
5 ~ 35
BD9001F
7 ~ 48
BD9781HFP
5 ~ 35
Unit
V
Operating power supply voltage
Electrical characteristics
BD9778F/HFP (Unless otherwise specified, Ta = -40˚C to +125˚C, VIN =13.2 V, VEN = 5 V)
Limits
Min. Typ. Max.
Parameter
Symbol
Unit
µA
Condition
VEN=0V,Ta=25˚C
Standby circuit current
Circuit current
[SW block]
ISTB
IQ
-
-
0
3
10
4.2
mA IO=0A
RON
IOLIMIT
IOLEAK
-
2
-
0.53 0.9
Ω
A
µA
ISW=50mA
* Design assurance
VIN=35V,VEN=0V
POWER MOS FET ON resistance
Operating output current of overcurrent protection
Output leak current
4
0
-
30
[Error Amp block]
Reference voltage 1
Reference voltage 2
Reference voltage input regulation
Input bias current
Maximum FB voltage
Minimum FB voltage
FB sink current
FB source current
Soft start time
[Oscillator block]
VREF1
VREF2
∆VREF
IB
VFBH
VFBL
IFBSINK
IFBSOURCE
TSS
0.98 1.00 1.02
0.96 1.00 1.04
0.5
V
V
%
VFB=VINV,Ta=25˚C
VFB=VINV
VIN=5 ~ 35V
-
-
-
1
2.4
- - µA VINV=1.1V
2.5
0.05 0.10
3.0
120 170
-
V
V
VINV=0.5V
VINV=1.5V
-
-
5.0
70
-
-
-0.5 mA VFB=1.5V,VINV=1.5V
µA
mS
VFB=1.5V,VINV=0.5V
* Design assurance
5
-
FOSC
∆FOSC
82
-
102 122 kHz RT=390kΩ
-
Oscillation frequency
Frequency input regulation
[Enable block]
1
%
VIN=5 ~ 35V
VEN=5V
VEN
IEN
0.8
-
1.7
13
2.6
50
V
µA
Threshold voltage
Sink current
* Not designed to be radiation-resistant.
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2/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
BD9001F (Unless otherwise specified, Ta=
-
40˚C ~ +95˚C,VIN=13.2V, VEN=5V)
Limits
Min. Typ. Max.
Parameter
Symbol
Unit
Condition
Standby circuit current
Circuit current
[SW block]
-
-
µA
mA IO=0A
ISTB
IQ
VEN=0V,Ta=25˚C
4
3
10
4.2
RON
IOLIMIT
-
2.5
0.6
4
1.2
-
Ω
A
ISW=50mA
* Design assurance
POWER MOS FET ON resistance
Operating output current of overcurrent protection
[Error Amp block]
V
V
VFB=VINV,Ta=25˚C
VFB=VINV
VREF1
VREF2
∆VREF
IB
Reference voltage 1
Reference voltage 2
Reference voltage input regulation
Input bias current
0.98
1.00 1.02
0.96 1.00 1.04
0.5
-
-
%
- - µA VINV=1.1V
VIN=7 ~ 48V
-1
Maximum FB voltage
Minimum FB voltage
FB sink current
FB source current
Soft start time
[Oscillator block]
VFBH
VFBL
IFBSINK
IFBSOURCE
Tss
2.4
-
2.5
0.05 0.10
3.0
120 170
-
V
V
VINV=0.5V
VINV=1.5V
-
5.0
70
-
-
-0.5 mA VFB=1.5V,VINV=1.5V
µA
ms
VFB=1.5V,VINV=0.5V
* Design assurance
-
5
FOSC
∆FOSC
82
-
102 122 kHz RT=390kΩ
-
Oscillation frequency
Frequency input regulation
[Enable block]
2
%
VIN=7 ~ 48V
VEN
IEN
0.8
-
1.7 2.6
13 50
V
µA
Threshold voltage
Sink current
* Not designed to be radiation-resistant.
VEN =5V
BD9781HFP (Unless otherwise specified, Ta=
-
40˚C ~ +125˚C,VIN=13.2V,VEN/SYNC=5V)
Limits
Min. Typ. Max.
Parameter
Symbol
Unit
Condition
ISTB
IQ
VEN/SYNC=0V,Ta=25ºC
µA
mA IO=0A
Standby circuit current
Circuit current
[SW block]
-
-
0
3
10
8
RON
IOLIMIT
IOLEAK
-
4
-
0.5
8
0
0.9
-
30
Ω
A
µA
ISW=50mA
* Design assurance
VIN=35V,VEN/SYNC=0V
POWER MOS FET ON resistance
Operating output current of overcurrent protection
Output leak current
[Error Amp block]
Reference voltage1
Reference voltage2
Reference voltage input regulation
Input bias current
VREF1
VREF2
∆VREF
IB
0.98 1.00 1.02
0.97 1.00 1.03
V
V
%
VFB=VINV,Ta=25ºC
VFB=VINV
VIN=5 ~ 35V
-
0.5 -
- - µA VINV=1.1V
-1
VFBH
VFBL
IFBSINK
IFBSOURCE
TSS
2.4
-
2.5
0.05 0.10
3.0
120 170
-
V
V
VINV=0.5V
VINV=1.5V
Maximum FB voltage
Minimum FB voltage
FB sink current
FB source current
Soft start time
[Oscillator block]
-
5.0
70
-
-
-0.5 mA VFB=1.5V,VINV=1.5V
µA
mS
VFB=1.5V,VINV=0.5V
* Design assurance
5
-
FOSC
∆FOSC
82
-
102 122 kHz RT=390kΩ
-
Oscillation frequency
Frequency input regulation
[Enable/Synchronizing input block]
Threshold voltage
Sink current
External synchronizing frequency
1
%
VIN=5 ~ 35V
VEN/SYNC
IEN/SYNC
FSYNC
0.8
-
-
1.7
35
2.6
90
-
V
µA
VEN/SYNC=5V
150
kHz FEN/SYNC=150kHz
* Not designed to be radiation-resistant.
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© 2010 ROHM Co., Ltd. All rights reserved.
3/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Reference data
1.020
600
500
400
300
200
100
0
10
9
39kΩ
91kΩ
1.015
1.010
1.005
8
7
6
5
4
125Ŋ
1.000
0.995
0.990
VCC=12V
Istb=0.14µA
3
2
1
0
390kΩ
910kΩ
0.985
0.980
25Ŋ
-40Ŋ
-50 -25
0
25
50 75 100 125
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE : VIN[V]
-50 -25
0
25
50
75 100 125
AMBIENT TEMPERATURE : Ta[Ŋ]
AMBIENT TEMPERATURE : Ta[Ŋ]
Fig.1 Output reference voltage vs.
Ambient temprature(All series)
Fig.2 Frequency vs. Ambient
temperature(All series)
Fig.3 Standby current(BD9781HFP)
40
30
20
10
4
10
9
125Ŋ
Dpmkꢀrfcꢀrmn*ꢀ
-
25Ŋ
40Ŋ
8
3
2
125Ŋ
25Ŋ
7
6
125
Ŋ
–40Ŋ
5
4
VCC=12V
Istb=0.14µA
3
2
1
0
1
0
25Ŋ
-40Ŋ
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE : VIN[V]
0
10
20
30
40
50
60
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE : VIN[V]
INPUT VOLTAGE : VIN[V]
Fig.4 Standby current(BD9778F/HFP)
Fig.5 Standby current(BD9001F)
Fig.6 Circuit current(BD9781HFP)
1.8
4
3
4
3
1.6
Dpmkꢀrfcꢀrmn*ꢀ
-
25Ŋ
40Ŋ
1.4
1.2
1.0
0.8
0.6
0.4
125Ŋ
Dpmkꢀrfcꢀrmn* 125Ŋ
-40Ŋ
25Ŋ
2
1
Ta=125Ŋ
Ta=25Ŋ
Ta=-40Ŋ
2
1
0.2
0.0
0
0
10
20
30
40
50
60
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE : VIN[V]
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT CURRENT : IO[A]
INPUT VOLTAGE : VIN[V]
Fig.8 Circuit current(BD9001F)
Fig.9 ON resistance VIN=5V(BD9781HFP)
Fig.7 Circuit current(BD9778F/HFP)
1.8
1.6
1.8
1.8
1.6
1.4
1.6
1.4
1.2
1.0
0.8
0.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.2
Ta=125Ŋ
1.0
Ta=25Ŋ
Ta=125Ŋ
Ta=25Ŋ
0.8
Ta=125Ŋ
Ta=-40Ŋ
Ta=25Ŋ
Ta=-40Ŋ
0.6
0.4
0.2
0.0
0.4
0.2
0.0
Ta=-40Ŋ
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0.0
0.5
1.0
1.5
2.0
2.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
Fig.10 ON resistance VIN=7V (BD9781HFP)
Fig.11 ON resistanceVIN=13.2V (BD9781HFP)
Fig.12 ON resistance VIN=5V (BD9778F/HFP)
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© 2010 ROHM Co., Ltd. All rights reserved.
4/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
1.8
1.6
1.8
1.8
1.6
1.4
1.2
1.0
0.8
0.6
1.6
1.4
1.2
1.0
0.8
0.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Ta=125Ŋ
Ta=25Ŋ
Ta=125Ŋ
Ta=125Ŋ
Ta=25Ŋ
Ta=-40Ŋ
Ta=25Ŋ
Ta=-40Ŋ
0.4
0.2
0.0
0.4
0.2
0.0
Ta=–40Ŋ
0
0.5
1
1.5
2
2.5
0.0
0.5
1.0
1.5
2.0
2.5
0.0
0.5
1.0
1.5
2.0
2.5
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
Fig.14 ON resistance VIN=13.2V (BD9778F/HFP)
Fig.15 ON resistance VIN=7V (BD9001F)
Fig.13 ON resistance VIN=7V (BD9778F/HFP)
1.8
100
90
100
3.3V output
5V output
5V output
1.6
1.4
1.2
90
80
70
60
50
40
30
20
10
0
80
3.3V output
70
2.5V output
Ta=125Ŋ
60
50
40
30
20
10
0
1.0
2.5V output
1.5V output
Ta=25Ŋ
0.8
0.6
Ta=–40Ŋ
0.4
0.2
0.0
0
0.5
1
1.5
2
2.5
0.0 0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
OUTPUT CURRENT : IO[A]
2.0
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
Fig.17 IO vs Efficiency(VIN=12V,f=200kHz)
ý(BD9781HFP)
Fig.16 ON resistance VIN=13.2V
(BD9001F)
Fig.18 IO vs Efficiency(VIN=12V,f=100kHz)
ý(BD9778F/HFP)
100
6
6
5V output
90
80
70
60
50
40
30
20
10
0
Ta=25Ŋ
Ta=-40Ŋ
Ta=25Ŋ
Ta=-40Ŋ
5
4
3
5
3.3V output
2.5V output
4
Ta=125Ŋ
Ta=125Ŋ
3
2
1
2
1
0
0
0
0.4
0.8
1.2
1.6
2
0
1
2
3
4
5
6
7
0
1
2
3
4
5
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
OUTPUT CURRENT : IO[A]
Fig.19 IO vs Efficiency(VIN=12V,f=100kHz) Fig.20 Current capacitance(VIN=12V,Vo=5V,f=100kHz) Fig.21 Current capacitance(VIN=12V,Vo=5V,f=100kHz)
(BD9778F/HFP)
ý(BD9001F)
(BD9781HFP)
6
5
4
3
Ta=-40Ŋ
Ta=25Ŋ
Ta=125Ŋ
2
1
0
0
1
2
3
4
5
OUTPUT CURRENT : IO[A]
Fig.22 Current capacitance(VIN=12V,Vo=5V,f=100kHz)
(BD9001F)
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© 2010 ROHM Co., Ltd. All rights reserved.
5/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Block diagram / Application circuit / Pin assignment
(BD9778F)
(BD9778HFP)
PVIN
8
EN
EN
VIN
VIN
ON/OFF
ON/OFF
5
7
1
1
L:OFF
H:ON
L:OFF
H:ON
220µF 1µF
220µF 1µF
Vref
Vref
SOFT
START
SOFT
START
23kΩ
23kΩ
10kΩ
ERROR AMP
INV
ERROR AMP
INV
PWM
COMPARATOR
PWM
COMPARATOR
4
-
+
+
5
-
+
+
-
-
LATCH
LATCH
DRIVER
SW
DRIVER
SW
33µH
33µH
VO
VO
10kΩ
+
+
2
2
RESET
RESET
150kΩ
150kΩ
Vref
Vref
GND EN
PVIN RT
TSD
TSD
4700pF
4700pF
OSC
OSC
330µF
330µF
VIN
VIN
+
-
+
-
SW INV
VIN FB
CURRENT LIMIT
CURRENT LIMIT
7
4
GND
GND
3
3
FB
RT
FB
RT
VIN
FB INV EN
SW GND RT
6
6
390kΩ
390kΩ
0.1µF
0.1µF
Fig.23
Fig.24
Function
No.
1
Pin name
VIN
SW
Function
No.
1
Pin name
VIN
Power supply input
Output
Error Amp output
Power supply input
Output
2
2
SW
FB
3
FB
INV
3
Error Amp output
Ground
Output voltage feedback
4
Output voltage feedback
Enable
4
GND
INV
RT
EN
-
5
EN
RT
5
6
Frequency setting resistor connection
Ground
Power system power supply input
6
Frequency setting resistor connection
7
GND
PVIN
7
FIN
Enable
Ground
8
(BD9781HFP)
(BD9001F)
EN/
SYNC
VIN
VIN
8
ON/OFF
7
1
L:OFF
H:ON
220µF 1µF
220µF 1µF
Vref
SYNC
SOFT
START
SOFT
START
Vref
23kΩ
INV
ERROR AMP
PWM
COMPARATOR
23kʎ
10kʎ
6
-
+
+
INV
ERROR AMP
-
PWM
COMPARATOR
LATCH
DRIVER
TSD
SW
VO
4
-
+
+
33µH
10kΩ
-
+
2
RESET
LATCH
RESET
DRIVER
TSD
SW 33 µH
150kΩ
VO
Vref
+
1
150kʎ
OSC
4700pF
Vref
330µF
4700pF
OSC
VIN
GND EN
VIN RT
330µF
VIN
+
-
+
-
CURRENT LIMIT
4
CURRENT LIMIT
GND
7
5
N.C. INV
SW FB
GND
FB
RT
3
3
FB
RT
VIN
RT FB EN/SINC
SW GND INV
6
390kΩ
0.1µF
390kʎ
0.1µF
Fig.25
Pin name ýýýýýýFunction
Fig.26
No.
1
Pin name
Function
No.
VIN
SW
Power supply input
Output
1
2
3
4
5
6
7
8
SW
N.C.
FB
Output
Non Connection
Error Amp Output
2
3
RT
Frequency setting resistor connection
Ground
Error Amp output
4
GND
FB
INV
INV
EN
Output voltage feedback
Enable
5
6
Output voltage feedback
Enable/Synchronizing pulse input
Ground
RT
GND
VIN
Frequency setting resistor connection
Ground
Power supply input
7
FIN
EN/SYNC
-
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6/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Description of operations
ERROR AMP
The ERROR AMP block is an error amplifier used to input the reference voltage (1 V typ.) and the INV pin voltage. The output
FB pin controls the switching duty and output voltage Vo. These INV and FB pins are externally mounted to facilitate phase
compensation. Inserting a capacitor and resistor between these pins enables adjustment of phase margin. (Refer to
recommended examples on page 11.)
SOF T START
The SOFT START block provides a function to prevent the overshoot of the output voltage Vo through gradually increasing
the normal rotation input of the error amplifier when power supply turns ON to gradually increase the switching Duty. The soft
start time is set to 5 msec (Typ.).
ON/OFF(BD9778F/HF P,BD9781HFP)
Setting the EN pin to 0.8 V or less makes it possible to shut down the circuit. Standby current is set to 0 µA (Typ.).
Furthermore, on the BD9781HFP, applying a pulse having a frequency higher than set oscillation frequency to the EN/SYNC
pin allows for external synchronization (up to +50% of the set frequency).
PWM COM PARATOR
The PWM COMPARATOR block is a comparator to make comparison between the FB pin and internal triangular wave and
output a switching pulse.
The switching pulse duty varies with the FB value and can be set in the range of 0 to 100%.
OSC(Oscillator)
The OSC block is a circuit to generate a triangular wave that is to be input in the PWM comparator. Connecting a resistor to
the RT pin enables setting of oscillation frequency.
TSD(Thermal Shut Down)
In order to prevent thermal destruction/thermal runaway of this IC, the TSD block will turn OFF the output when the chip
temperature reaches approximately 150˚C or more. When the chip temperature falls to a specified level, the output will be
reset. However, since the TSD is designed to protect the IC, the chip junction temperature should be provided with the thermal
shutdown detection temperature of less than approximately 150˚C.
CURREN T LIMIT
While the output POWER P-ch MOS FET is ON, if the voltage between drain and source (ON resistance ¥ load current)
exceeds the reference voltage internally set with the IC, this block will turn OFF the output to latch. The overcurrent protection
detection values have been set as shown below:
BD9781HFP . . . 8A(Typ.)
BD9001F,BD9778F/HFP . . . 4A(Typ.)
Furthermore, since this overcurrent protection is an automatically reset, after the output is turned OFF and latched, the latch will
be reset with the RESET signal output by each oscillation frequency.
However, this protection circuit is only effective in preventing destruction from sudden accident. It does not support for the
continuous operation of the protection circuit (e.g. if a load, which significantly exceeds the output current capacitance, is
normally connected). Furthermore, since the overcurrent protection detection value has negative temperature characteristics,
consider thermal design.
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7/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Timing chart
(BD9781HFP)
-
While in basic operation mode
VIN
Internal
OSC
FB
SW
EN/SYNC
Fig.27
-
While in overcurrent protection mode
IO
Internal
OSC
FB
SW
Output short circuit
Auto reset
Auto reset
Auto reset
Auto reset
Fig.28
External synchronizing function (BD9781HFP)
In order to activate the external synchronizing function, connect the frequency setting resistor to the RT pin and then input
a synchronizing signal to the EN/SYNC pin. As the synchronizing signal, input a pulse wave higher than a frequency determined
with the setting resistor (RT). On the BD9781HFP, design the frequency difference to be within 50%. Furthermore,
set the pulse wave duty between 10% and 90%.
FSYNC
: For RT only
Internal
OSC
: For external
synchronization
Fig.29
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© 2010 ROHM Co., Ltd. All rights reserved.
8/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Description of external components
L
VIN
VO
SW
VIN
+
C
Cin
Di
CO
R1
INV
FB
RT
SS
R2
RT
CT
CC
RC
GND
CSS
Fig.30
Design procedure
Calculation example
Vo = Output voltage, Vin (Max.) = Maximum input voltage
Io (Max.) = Maximum load current, f = Oscillation frequency
1. Setting or output voltage
Output voltage can be obtained by the formula shown below.
When Vo = 5 V and R2 = 10 kΩ,
5=1 x (1+R1/10kΩ)
VO=1 x (1+R1/R2)
Use the formula to select the R1 and R2.
Furthermore, set the R2 to 30 kΩ or less.
Select the current passing through the R1 and R2 to be small
enough for the output current.
R1=40kΩ
2. Selection of coil (L)
When VIN = 13.2 V, Vo = 5 V, Io = 2 A, and f = 100 kHz,
L=(13.2 5) x 5/13.2 x 1/100k x 1/(2 x 0.3)
=51.8µH 47µ
-
The value of the coil can be obtained by the formula shown
below:
L=(VIN-VO) x VO / (VIN x f x ∆IO)
∆IO: Output ripple current
f = Operating frequency
∆Io should typically be approximately 20 to 30% of Io.
If this coil is not set to the optimum value, normal (continuous)
oscillation may not be achieved. Furthermore, set the value of
the coil with an adequate margin so that the peak current passing
through the coil will not exceed the rated current of the coil.
L=47µH
3. Selection of output capacitor (Co)
VIN=13.2V, Vo=5V, L=100µH, f=100kHz
∆IL=(13.2-5) x 5/(100 x 10-6 x 100 x 103 x 13.2)
0.31
The output capacitor can be determined according to the
output ripple voltage ∆Vo (p-p) required.
Obtain the required ESR value by the formula shown below
and then select the capacitance.
∆IL=0.31A
∆IL=(VIN-VO) x VO/(L x f x VIN)
∆Vpp=∆IL x ESR+(∆IL x Vo)/(2 x Co x f x VIN)
Set the rating of the capacitor with an adequate margin to the
output voltage. Also, set the maximum allowable ripple current
with an adequate margin to ∆IL. Furthermore, the output rise
time should be shorter than the soft start time. Select the output
capacitor having a value smaller than that obtained by the
formula shown below.
When ILimit: 2 A, Io (Max) = 1 A, and Vo = 5V,
CMax=3.5m x (2-1)/5
=700µ
3.5m x (ILimit-Io(Max))
CMax=
Vo
ILimit:2A(BD9778F/HFP,BD9001F), 4A(BD9781HFP)
If this capacitance is not optimum, faulty startup may result.
CMax=700µF
(Ţ3.5m is soft start time(min.))
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9/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Design procedure
Calculation example
4. Selection of diode
Set diode rating with an adequate margin to the maximum load
current. Also, make setting of the rated inverse voltage with
an adequate margin to the maximum input voltage.
When VIN = 36 V and Io = (max.) 2 A,
Select a diode of rated current of 2 A or more and rated
withstand voltage of 36 V or more.
A diode with a low forward voltage and short reverse recovery
time will provide high efficiency.
5. Selection of input capacitor
Two capacitors, ceramic capacitor CIN and bypass capacitor C,
should be inserted between the VIN and GND.Be sure to insert
a ceramic capacitor of 1 to 10 µF for the C. The capacitor C
should have a low ESR and a significantly large ripple current.
The ripple current IRMS can be obtained
When VIN = 13.2 V, Vo = 5 V, and Io = 1 A,
IRMS=1 X 5 X(13.2-5)/(13.2)2
=0.485
by the following formula:
IRMS=IO X VO X (Vin-VO)/ Vin2
Select capacitors that can accept this ripple current.
If the capacitance of CIN and C is not optimum,
the IC may malfunction.
IRMS=0.485A
6. Setting of oscillation frequency
Referring Fig. 34 and Fig. 35 on the following page, select R
for the oscillation frequency to be used. Furthermore,
in order to eliminate noises, be sure to connect ceramic
capacitors of 0.1 to 1.0 µF in parallel.
7. Setting of phase compensation (Rc and Cc)
The phase margin can be set through inserting a capacitor or
a capacitor and resistor between the INV pin and the FB pin.
Each set value varies with the output coil, capacitance,
I/O voltage, and load. Therefore, set the phase compensation
to the optimum value according to these conditions.
(For details, refer to Application circuit on page 11.)
If this setting is not optimum, output oscillation may result.
* The set values listed above are all reference values. On the actual mounting of the IC, the characteristics may vary with the routing of wirings
and the types of parts in use. In this connection, it is recommended to thoroughly verify these values on the actual system prior to use.
Directions for pattern layout of PCB
1
GND
BD9778HFP
RT
CT
R3
C3
Cx1
8
3
SIGNAL GND
2
C
Cin
8
4
L
R2
Cx2
L
O
A
D
Co
R1
NMUCP
GND
5
6
Fig.31
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© 2010 ROHM Co., Ltd. All rights reserved.
10/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Di
C
C
L
RT
CT Cx1
Di
C3
Co
L
R1
Cx2
R2
Co
Fig.32 BD9001F reference layout pattern
Fig.33 BD9781HFP reference layout pattern
Ţ As shown above, design the GND pattern as large area as possible
within inner layer.
Ţ Gray zones indicate GND.
500
450
400
300
250
350
300
250
200
150
200
150
100
100
50
50
50 100
200
300
400
500
600
700
800
0
100 200 300 400 500 600 700 800
OSCILATING FREQUENCY SETTING RESISTANCE : RT [kΩ]
OSCILATING FREQUENCY SETTING RESISTANCE : RT[kΩ]
Fig.35 RT vs fOSC &BD9001F'
Fig.34 RT vs fOSC (BD9781HFP/BD9778F/HFP)
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ꢀꢀꢀꢀmqagjj_rgmlꢀdpcosclawꢀgqꢀlcacqq_pwꢀrmꢀamlqgbcpꢀĺ0.#ꢀ_qꢀbgqncpqgml,
Phase compensation setting procedure
1. Application stability conditions
The following section describes the stability conditions of the negative feedback system.
Since the DC/DC converter application is sampled according to the switching frequency, GBW (frequency at 0-dB gain)
of the overall system should be set to 1/10 or less of the switching frequency. The following section summarizes the targeted
characteristics of this application.
Ă At a 1 (0-dB) gain, the phase delay is 150˚ or less (i.e., the phase margin is 30˚ or more).
Ă The GBW for this occasion is 1/10 or less of the switching frequency.
Responsiveness is determined with restrictions on the GBW. To improve responsiveness, higher switching frequency
should be provided.
Replace a secondary phase delay (-180˚) with a secondary phase lead by inserting two phase leads, to ensure the stability
through the phase compensation. Furthermore, the GBW (i.e., frequency at 0-dB gain) is determined according to phase
compensation capacitance provided for the error amplifier. Consequently, in order to reduce the GBW,
increase the capacitance value.
(1) Typical integrator (Low pass filter)
(2) Open loop characteristics of integrator
(a)
A
-
20dB/decade
Gain
[dB]
FB
GBW(b)
A
R
Feedback
0
f
-
0
-
90˚
Phase
[˚]
-90
Phase
margin
-
180˚
C
-180
f
Since the error amplifier is provided with (1) or (2) phase compensation, the low pass filter is applied. In the case of
the DC/DC converter application, the R becomes a parallel resistance of the feedback resistance.
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11/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
2. For output capacitors having high ESR, such as electrolyte capacitor
For output capacitors that have high ESR (i.e., several Ω), the phase compensation setting procedure becomes
comparatively simple. Since the DC/DC converter application has a LC resonant circuit attached to the output, a -180˚
phase-delay occurs in that area. If ESR component is present, howeve r, a +90˚ phase-lead occurs to shift the phase
delay to -90˚. Since the phase delay should be set within 150˚, it is a very effective method but tends to increase
the ripple component of the output voltage.
(1) LC resonant circuit
(2) With ESR provided
VCC
VCC
L
L
VO
VO
+
RESR
C
C
1
fr =
[Hz]
At this resonance point, a -180˚
phase-delay occurs.
A -90˚ phase-delay occurs.
According to changes in phase characteristics, due to the ESR, only one phase lead should be inserted.
For this phase lead, select either of the methods shows below:
(3) Insert feedback resistance in the C.
(4) Insert the R3 in integrator.
VO
VO
R3
C1
C2
C2
R1
R1
-
-
FB
FB
A
A
INV
INV
R2
R2
To cancel the LC resonance, the frequency to insert the phase lead should be set close to the LC resonant frequency.
The settings above have are estimated. Consequently, the settings may be adjusted on the actual system. Furthermore,
since these characteristics vary with the layout of PCB loading conditions, precise calculations should be made on the
actual system.
3. For output capacitors having low ESR, such as low impedance electrolyte capacitor or OS-CON
In order to use capacitors with low ESR (i.e., several tens of mΩ), two phase-leads should be inserted so that a -180˚
phase-delay, due to LC resonance, will be compensated. The following section shows a typical phase compensation
procedure.
(1) Phase compensation with secondary phase lead
VO
R3
C2
R1
R2
C1
INV
-
FB
A
To set phase lead frequency, insert both of the phase leads close to the LC resonant frequency. According to empirical rule,
setting the phase lead frequency f Z2 with R3 and C2 lower than the LC resonant frequency fr, and the phase lead frequency
fZ1 with the R1 and C1 higher than the LC resonant frequency fr, will provide stable application conditions.
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12/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
<Reference> Measurement of open loop of DC/DC converter
To measure the open loop of DC/DC converter, use the gain phase analyzer or FRA to measure the frequency
characteristics.
<Procedure>
DC/DC converter
controller
VO
Vm
1. Check to ensure output causes no oscillation at the maximum
load in closed loop.
+
RL
~
2. Isolate (1) and (2) and insert Vm (with amplitude of
approximately 100 mVpp).
3. Measure (probe) the oscillation of (1) to that of (2).
Furthermore, the phase margin can also be measured with the
load responsiveness.
Maximum load
Load
Measure variations in the output voltage when instantaneously
changing the load from no load to the maximum load.
Even though ringing phenomenon is caused, due to low phase margin,
no ringing takes place. Phase margin is provided. However,
no specific phase margin can be probed.
0
Inadequate phase margin
Adequate phase margin
Output voltage
t
Heat loss
ºC
ºC
The heat loss W of the IC can be obtained by the formula shown below:
Vo
W=Ron X Io2 X
+ VIN X ICC + Tr X VIN X Io X f
VIN
Ron: ON resistance of IC (refer to pages 4 and 5.) Io: Load current Vo: Output voltage
VIN: Input voltage Icc: Circuit current (Refer to pages 2 and 3)
Tr: Switching rise/fall time (Approximately 40 nsec)
f : Oscillation frequency
Tr
1
VIN
1 Ron X Io2
1
1
T
2 2 X
XTr X
X VIN X Io
SW
waveform
2
=Tr X VIN X Io X f
GND
2
1
f
T =
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© 2010 ROHM Co., Ltd. All rights reserved.
13/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
SW
RT
FB&BD9778F/HFP, BD9781HFP'
VREF
INV
VREF
VIN
VIN
VREF
VIN
VIN
50kΩ
VIN
SW
FB
INV
1kΩ
10kΩ
1kΩ
300kΩ
RT
2kΩ
EN&BD9778F/HFP, BD9001F'
FB&BD9001F'
EN/SYNC&BD9781HFP'
VREF
VREGA
VIN
VIN
VIN
EN
FB
1kΩ
1kΩ
2kΩ
300kΩ
EN/SYNC
221
kΩ
222
kΩ
250kΩ
145
kΩ
139
kΩ
Fig.36 Equivalent circuit
Notes for use
1) Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc.,
can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit.
If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices,
such as fuses. Furthermore, don't turn on the IC with a fast rising edge of VIN. ( rise time << 10V / µsec )
2) GND potential
GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals should be lower than the GND
potential voltage including an electric transients.
3) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection
error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are shorted
together or are shorted to other circuits power lines.
5) Operation in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6) Inspection with set printed circuit board
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to,
or removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting and storing the IC.
Resistor
Transistor (NPN)
B
(Pin A)
(Pin A)
(Pin B)
E
C
Parasitic element
GND
GND
N
P
N
+
+
+
+
P
P
P
P
P
(PIN B)
N
N
N
N
N
C
E
B
P layer
P layer
Parasitic element
GND
GND
Parasitic element
GND
Fig.37 Typical simple construction of monolithic IC
14/16
Parasitic element
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© 2010 ROHM Co., Ltd. All rights reserved.
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
7) IC pin input (Fig. 37)
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When Pin B > GND > Pin A, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitably in the
structure of the IC.The operation of parasitic diodes can result in mutual interference among circuits, operational faults,
, methods by which parasitic diodes operate, such as applying a voltage that is lower than
or physical damage. Accordingly
the GND (P substrate) voltage toan input pin, should not be used.
8) Ground wiring pattern
It is recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single
ground at the reference point of the set PCB, so that resistance to the wiring pattern and voltage fluctuations due to
a large current will cause no fluctuations in voltages of the small-signal GND. Prevent fluctuations in the GND wiring pattern
of external parts.
9) Temperature protection (thermal shut down) circuit
This IC has a built-in temperature protection circuit to prevent the thermal destruction of the IC. As described above,
be sure to use this IC within the power dissipation range. Should a condition exceeding the power dissipation range continue,
the chip temperature Tj will rise to activate the temperature protection circuit, thus turning OFF the output power element.
Then, when the tip temperature Tj falls, the circuit will be automatically reset. Furthermore, if the temperature protection
circuit is activated under the condition exceeding the absolute maximum ratings, do not attempt to use the temperature
protection circuit for set design.
10) On the application shown below, if there is a mode in which VIN and each pin potential are inverted, for example,
if the VIN is short-circuited to the Ground with external diode charged, internal circuits may be damaged. To avoid damage,
it is recommended to insert a backflow prevention diode in the series with VIN or a bypass diode between each pin and VIN.
Bypass diode
Backflow prevention diode
Vcc
Pin
Fig.35
Thermal derating characteristics
HRP7
SOP8
ᰒ
10
9
8
7
6
5
4
3
2
1
0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
ᰔ7.3W
ᰓ5.5W
ᰑ
ᰒ2.3W
ᰑ1.4W
BD9778F
BD9001F
75
25
50
75
100
125
150
0
25
50
100
125
150
?K@GCLRꢀRCKNCP ?RSP CăR_ĪŊī
?K@GCLRꢀRCKNCP ?RSP CăR_ĪŊī
ᰑ Single piece of IC
ᰑ Single piece of IC
ᰒ When mounted on ROHM standard PCB
(Glass epoxy PCB of 70 mm x 70 mm x 1.6 mm)
PCB size: 70 x 70 x 1.6 mm3 (PCB incorporates thermal via.)
Copper foil area on the front side of PCB: 10.5 x 10.5 mm2
ᰒ 2-layer PCB (Copper foil area on the reverse side of PCB: 15 x 15 mm2)
ᰓ 2-layer PCB (Copper foil area on the reverse side of PCB: 70 x 70 mm2)
ᰔ 4-layer PCB (Copper foil area on the reverse side of PCB: 70 x 70 mm2)
Fig.39
Fig.40
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15/16
2010.02 - Rev. B
Technical Note
BD9778F, BD9778HFP, BD9001F, BD9781HFP
Selection of order type
B D
9
7
7
8
H F P
T R
-
Part No.
Part No.
Package
F = SOP8
HFP = HRP7
Taping type
E2 = Reel-type embossed carrier tape (SOP8)
TR = Reel-type embossed carrier tape (HRP7)
9778 = 36V/2A
9781 = 36V/4A
9001 = 50V/2A
SOP8
<Tape and Reel information>
Tape
Embossed carrier tape
5.0±0.2
(MAX 5.35 include BURR)
Quantity
2500pcs
+
−
6
°
4°
4
°
8
7
6
5
E2
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1
2
3
4
0.595
+0.1
0.17
-
0.05
S
0.1
S
1.27
Direction of feed
1pin
Order quantity needs to be multiple of the minimum quantity.
0.42±0.1
Reel
(Unit : mm)
HRP7
<Tape and Reel information>
9.395±0.125
(MAX 9.745 include BURR)
Tape
Embossed carrier tape
8.82±0.1
Quantity
2000pcs
1.905±0.1
(5.59)
TR
Direction
of feed
The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
(
)
1pin
1
2 3 4 5 6 7
0.8875
+
−
5.5°
4.5°
4.5°
+0.1
0.27
-
0.05
0.73±0.1
1.27
S
0.08 S
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
Reel
(Unit : mm)
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16/16
2010.02 - Rev. B
Notice
N o t e s
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
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The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
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controller or other safety device). ROHM shall bear no responsibility in any way for use of any
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More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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R1010
A
相关型号:
BD9781HFP-TR
Switching Regulator, Current-mode, 4A, 500kHz Switching Freq-Max, PSSO7, ROHS COMPLIANT, HRP-7
ROHM
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