BD9526AMUV [ROHM]
Silicon Monolithic Integrated Circuit; 硅单片集成电路型号: | BD9526AMUV |
厂家: | ROHM |
描述: | Silicon Monolithic Integrated Circuit |
文件: | 总5页 (文件大小:124K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
1/4
STRUCTURE
TYPE
Silicon Monolithic Integrated Circuit
Step down DC/DC converter controller for Laptop PC
PRODUCT SERIES
FEATURES
BD9526AMUV
■ Built in 2ch H3REG DC/DC converter controller
■ The Light load mode efficiency is improved by SLLM (Simple Light Load Mode)
■ Adjustable Switching Frequency (f=200kHz~500kHz)
■ Built in 3ch Linear Regulator
○Absolute Maximum ratings (Ta=25℃)
Parameter
Symbol
VIN1, VIN2, CTL
Limits
30 *1*2
Unit
V
EXTVCC, FB1, FB2, Is+1, Is+2, MCTL
FS1, FS2, REF1, REF2, LG1,LG2,TEST1,TEST2
BOOT1, BOOT2
7 *1*2
V
INTVCC+0.3 *1*2
35 *1*2
V
V
Terminal voltage
BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2
7 *1*2
V
HG1
BOOT1+0.3 *1*2
BOOT2+0.3 *1*2
6 *1*2
V
HG2
V
EN1, EN2
V
AGND±0.3 *1*2
0.38*3
DGND, PGND1, PGND2
V
Power dissipation 1
Pd1
Pd2
W
W
W
W
℃
℃
℃
Power dissipation 2
0.88 *4
Power dissipation 3
Pd3
2.06 *5
Power dissipation 4
Pd4
4.56 *6
-10~+100
-55~+150
+150
Operating temperature range
Storage temperature range
Topr
Tstg
Tjmax
Junction Temperature
*1 Do not however exceed Pd.
*2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
*3 Reduced by 3.0mW for each increase in Ta of 1℃ over 25℃ (when don’t mounted on a heat radiation board )
*4 Reduced by 7.0mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB
which has 1 layer. (Copper foil area : 0mm2))
*5 Reduced by 16.5mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB
which has 4 layers. (1st and 4th copper foil area : 20.2mm2, 2nd and 3rd copper foil area : 5505mm2))
*6 Reduced by 36.5mW for increase in Ta of 1℃ over 25℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB
which has 4 layers. (All copper foil area : 5505mm2))
○Operating supply voltage range (Ta=25℃)
Parameter
Symbol
MIN.
7
MAX.
Unit
V
VIN1,VIN2
25
EXTVCC
4.5
-0.3
-0.3
4.5
-0.3
1
5.5
V
CTL
25
V
EN1, EN2
BOOT1, BOOT2
5.5
30
V
Terminal voltage
V
BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2
REF1, REF2
5.5
V
2.75
V
Is+1, Is+ 2, FB1, FB2
MCTL
1.9
-0.3
5.6
V
INTVCC+0.3
V
★
This product is not designed for protection against radioactive rays.
Status of this document
The Japanese version of this document is the official specification.
This translated version is intended only as a reference, to aid in understanding the official version.
If there are any differences between the original and translated versions of this document, the official Japanese language version takes priority.
REV. B
2/4
○Electrical characteristics (unless otherwise noted, Ta=25℃ VIN1=VIN2=12V, CTL=5V, EN1=EN2=5V, REF1=2.5V, REF2=1.65V, RFS1=RFS2=51kΩ)
Limit
Typ.
130
Parameter
Symbol
Unit
Condition
Min.
-
Max.
200
μA
μA
VIN1 Bias Current
IIN1
CTL=5V
VIN2 Bias Current 1
VIN2 Bias Current 2
VIN1 Shutdown Current
IIN2_1
-
100
150
CTL=5V, EN1=EN2=0V
CTL=5V,
EN1=EN2=0V,EXTVCC=5V
μA
IIN2_2
-
20
40
μA
μA
V
V
μA
ISHD1
ISHD2
VCTLL
VCTLH
ICTL
VENL
VENH
IEN
-
-
0
0
-
-
1
-
10
10
0.8
25
3
0.8
5.5
3
CTL=0V
VIN2 Shutdown Current
CTL Low Voltage
CTL High Voltage
CTL Bias Current
EN Low Voltage
CTL=0V
VCTL=5V
VEN=3V
-0.3
2.3
-
-0.3
2.3
-
V
V
μA
EN High Voltage
EN Bias Current
-
1
[5V Linear Regulator]
INTVCC output Voltage
INTVCC Maximum Current
INTVCC Line regulation
INTVCC Load regulation
[3.3V Linear Regulator]
REG1 Output Voltage
REG1Maximum Current
REG1Line regulation
REG1Load regulation
REG2 Output Voltage
REG2Maximum Current
REG2Line regulation
REG2Load regulation
[5V Switch Block]
VINTVCC
IINTVCC
Reg.lINT
Reg.LINT
4.90
200
-
-
5.00
5.10
-
180
50
V
IINTVCC1=1mA
IREG2=0mA
VIN=7.5 to 25V
IINTVCC=0 to 30mA
-
-
-
mA
mV
mV
VREG1
IREG1
Reg.l1
Reg.L1
VREG2
IREG2
Reg.l2
Reg.L2
3.27
100
-
-
3.27
100
-
3.30
-
-
-
3.33
-
33
33
3.33
-
V
IREG1=1mA
mA
mV
mV
V
mA
mV
mV
VIN=7.5 to 25V
IREG1=0 to 50mA
IREG2=1mA
3.30
-
-
-
20
30
VIN=7.5 to 25V
IREG2=0 to 100mA
-
EXTVCC Input Threshold Voltage
EXTVCC Input Delay Time
Switch Resistance
Vcc_UVLO
TVcc
RVcc
4.2
2
-
4.4
4
1.0
4.6
8
2.0
V
ms
Ω
EXTVCC: Sweep up
[Under voltage lock out block for DC/DC]
INTVCC Threshold Voltage
REG2 Threshold Voltage
Hysteresis voltage
REG1_UVLO
REG2_UVLO
dV_UVLO
4.0
2.45
50
4.2
2.65
100
4.4
2.85
200
V
V
mV
INTVCC: Sweep up
REG2: Sweep up
INTVCC, REG2: Sweep down
[Error amplifier block]
REF1×2 -25m
REF1×2
REF1×2 +25m
Feed back voltage 1
VFB1
IFB1
V
μA
kΩ
V
FB1 Bias Current
5
25
50
FB1=5V
Output Discharge Resistance 1
Feed back voltage 2
RDISOUT1
VFB2
-
1
3
REF2×2 -25m
REF2×2
REF2×2 +25m
μA
kΩ
μA
FB2 Bias Current
IFB2
3
-
16
1
32
3
FB2=3.3V
Output Discharge Resistance 2
REF1, REF2 Bias Current
[H3REG block]
RDISOUT2
IREF1, IREF2
-1
-
1
μs
μs
μs
μs
ON Time 1
TON1
TON2
0.860
0.570
3.5
0.960
0.670
7
1.060
0.770
14
REF=2.5V
ON Time 2
REF=1.65V
Maximum On Time
Minimum Off Time
[FET Driver block]
HG higher side ON resistor
HG lower side ON resistor
LG higher side ON resistor
TONMAX
TOFFMIN
-
0.2
0.4
Ω
Ω
Ω
Ω
HGHON
HGLON
LGHON
LGLON
-
-
-
-
3.0
2.0
2.0
0.5
6.0
4.0
4.0
1.0
LG lower side ON resistor
[Short circuit protection block]
SCP Threshold Voltage
Delay Time
REF×2×0.66
REF×2×0.7
REF×2×0.74
VSCP
TSCP
V
ms
0.5
1
2
[Current limit protection block]
Maximum offset voltage
Is+1 bias current
dVSMAX
IISP1
43
-
50
2.5
2.5
57
10
10
mV
μA
μA
Is+1=2V
Is+2=2V
Is+2 bias current
IISP2
-
[Soft Start block]
Soft Start Time
TSS
0.5
1.0
2.0
ms
[SLLM mode control block]
MCTL terminal voltage 1
VCONT
VQLLM
-0.3
1.5
-
-
0.3
3.0
V
V
Continuous mode
QL2M mode
MCTL terminal voltage 2
(Maximum LG off time : 40usec)
SL2M mode
MCTL terminal voltage 3
MCTL float level
VSLLM
VMCTL
4.5
1.5
-
-
INTVCC+0.3
3.0
V
V
(Maximum LG off time : ∞)
REV. B
3/4
○Physical Dimensions
5.0 0.1
D 9 5 2 6 A
Lot No.
S
0.08 S
3.4 0.1
C0.2
1
8
9
32
25
VQFN032-V5050
16
24
17
(UNIT : mm)
+0.05
-0.04
0.25
0.75
0.5
○Block Diagram, Application Circuit
○Pin Description
PIN No.
1
PIN Name
LG2
PGND2
SW2
2
3
4
HG2
5
BOOT2
TEST2
DGND
REF2
Is+2
6
7
8
20
21
22
24
23
5
4
3
1
2
INT
VCC
INT
VCC
9
AGND
DGND
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
-
FB2
13
7
CL2
SCP2
CL1
SCP1
Short through
Protection
Circuit
Short through
Protection
Circuit
FS2
MCTL
AGND
FS1
FS2
FS1
SLLMTM
Block
SLLMTM
Block
MCTL2
FS2
MCTL1
11
14
RFS2
RFS1
H3RegTM
Controller
Block
FB1
H3RegTM
Controller
Block
FS1
Is+1
REF1
CTL
EN2
TEST2
(Vo2±5%)
EN1
TEST1
(Vo1±5%)
TEST1
BOOT1
HG1
FB2
FB1
Thermal
Protection
10
8
15
17
REF1
REF2
SW1
REG2
Is+1
REG2
PGND1
LG1
5V
Reg
3.3V
Reg
VIN2
16
9
VIN1
EN1
Reference
Block
REG1
EXTVCC
REG2
INTVCC
EN2
EN1
26
VIN1
31
3.3V
Reg
32
12
18
27
28
30
6
25
29
19
VIN2
FIN
*Apply the supply voltage EXTVCC pin after INTVCC pin is operated.
REV. B
4/4
○Output condition table
Input
Output
INTVCC
OFF
OFF
OFF
OFF
ON
CTL
Low
Low
Low
Low
High
High
High
High
EN1
Low
Low
High
High
Low
Low
High
High
EN2
Low
High
Low
High
Low
High
Low
High
REG1(3.3V)
OFF
OFF
OFF
OFF
ON
REG2(3.3V)
OFF
OFF
OFF
OFF
ON
DC/DC1
OFF
OFF
OFF
OFF
OFF
OFF
ON
DC/DC2
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
OFF
ON
ON
ON
ON
ON
○NOTE FOR USE
(1) Absolute maximum rating
The device may be destroyed when applied voltage or operating temperature exceeds its absolute maximum rating. Because the
source, such as short mode or open mode, cannot be identified if the device is destroyed, it is important to take physical safety
measures (such as fusing) if a special mode in excess of absolute rating limits is to be implemented.
(2) Supply line
In case the motor’s reverse electromotive force gives rise to the return of regenerative current, measures should be taken to
establish a channel for the current, such as adding a capacitor between the power supply and GND. In determining the
approach to take, make sure that no problems will be posed by the various characteristics involved, such as capacitance loss at
low temperatures with an electrolytic capacitor.
(3) GND potential
Make sure the potential for the GND pin is always kept lower than the potentials of all other pins, regardless of the operating
mode.
(4) Thermal design
Be sure to factor in allowable power dissipation (Pd) in actual operation, and to build sufficient margin into the thermal design to
accommodate this power loss.
(5) Operation in strong magnetic fields
Use in strong electromagnetic fields may cause malfunctions. Exercise caution with respect to electromagnetic fields.
(6) ASO
Set the parameters so that output Tr will not exceed the absolute maximum rating or ASO value when the IC is used.
(7) Thermal shutdown circuit
This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the chip temperature reaches the
threshold value listed below. When TSD is on, the device goes to high impedance mode. Note that the TSD circuit is provided
for the exclusive purpose shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or
guarantee performance when or after extreme heat conditions occur. Therefore, do not operate the IC with the expectation of
continued use or subsequent operation once the TSD is activated.
TSD ON temperature [℃] (typ.)
Hysteresis temperature [℃] (typ.)
175
15
(8) Ground wiring pattern
When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is
recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming from
the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way, care must
be taken to avoid wiring pattern fluctuations in any connected external component GND.
(9) Heat sink (FIN)
Since the heat sink (FIN) is connected with the Sub, short it to the GND.
(10) For ICs with more than one power supply, it is possible that rush current may flow instantaneously due to the internal powering
sequence and delays. Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring,
and routing of wiring.
(11) Short-circuits between pins and and mounting errors
Do not short-circuit between output pin and supply pin or ground, or between supply pin and ground. Mounting errors, such as
incorrect positioning or orientation, may destroy the device.
REV. B
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account
when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no re-
sponsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples
of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to
use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no re-
sponsibility whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment
or devices (such as audio visual equipment, office-automation equipment, communication devices, elec-
tronic appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
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Appendix-Rev4.0
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