BD90541MUV-C [ROHM]

BD90541MUV-C是在电流模式下工作的同步整流式降压DC/DC转换器。可最大2.4MHz频率工作，实现电感等外置元器件的小型化。还内置了Pch和Nch的输出MOSFET，可提供最大4A的输出电流。可通过外接电阻调整输出电压和振荡频率。还可与外部脉冲同步。;


型号：	BD90541MUV-C
厂家：	ROHM
描述：	BD90541MUV-C是在电流模式下工作的同步整流式降压DC/DC转换器。可最大2.4MHz频率工作，实现电感等外置元器件的小型化。还内置了Pch和Nch的输出MOSFET，可提供最大4A的输出电流。可通过外接电阻调整输出电压和振荡频率。还可与外部脉冲同步。脉冲转换器
文件：	总39页 (文件大小：2086K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Secondary power supply series for automotive

2.6V to 5.5V, 4A, 0.3MHz to 2.4MHz

Synchronous Step-Down Converter

BD90541MUV-C

General Description

Key Specifications

The BD90541MUV-C is

synchronous step-down

 Operating Temperature Range(Ta): -40°C to +125°C

converter which operates in current mode. It can operate

with maximum frequency of 2.4 MHz, and can downsize

external parts such as inductor. It can supply a maximum

output current of 4A with built-in Pch and Nch output

MOSFET. Output voltage and oscillation frequency can

be adjusted by external resistors and can also be

synchronized with an external clock.

 Input Voltage Range:

 Output Current:

 Reference Voltage Accuracy:

 Output Voltage Range:

 Switching Frequency:

2.6V to 5.5V

4.0A(Max)

±1.5 %

0.6V to 5.0V

0.3MHz to 2.4MHz

Package

W(Typ) x D(Typ) x H(Max)

4.00mm x 4.00mm x 1.00mm

Features

 AEC-Q100 Qualified ^{(Note 1)}

 Up to 2.4MHz movement

 Excellent Load Response by Current Mode Control

 Built-in Pch/Nch Output MOSFET.

 Frequency Synchronization with External Clock.

 Output Error Monitor Terminal (PGOOD Terminal)

 Adjustable Output Voltage and Oscillation Frequency

by External Resistors.

 Built-in Self-Reset Type Overcurrent Protection.

 Built-in Output Overvoltage/Short Circuit Detection.

 Built-in Temperature Protection (TSD) and UVLO.

(Note 1: Grade 1)

VQFN20SV4040

Applications

 Automotive Battery-Powered Supplies

(Cluster Panels, Car Multimedia)

 Industrial / Consumer Supplies

 Other electronic equipment

Typical Application Circuit

○Product structure : Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays

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Contents

General Description........................................................................................................................................................................1

Features..........................................................................................................................................................................................1

Applications ....................................................................................................................................................................................1

Key Specifications ..........................................................................................................................................................................1

Package

..................................................................................................................................................................................1

Typical Application Circuit ...............................................................................................................................................................1

Contents .........................................................................................................................................................................................2

Pin Configurations ..........................................................................................................................................................................3

Pin Descriptions..............................................................................................................................................................................3

Block Diagram ................................................................................................................................................................................4

Description of Blocks ......................................................................................................................................................................4

Absolute Maximum Ratings ............................................................................................................................................................6

Thermal Resistance........................................................................................................................................................................6

Recommended Operating Conditions.............................................................................................................................................7

Electrical Characteristics.................................................................................................................................................................8

Typical Performance Curves...........................................................................................................................................................9

Description of Operation and Timing Chart...................................................................................................................................14

Selection of Components Externally Connected...........................................................................................................................17

Recommended Parts Manufacturer List........................................................................................................................................23

Application Examples 1.................................................................................................................................................................24

Application Examples 2.................................................................................................................................................................26

Notes on the PCB Layout .............................................................................................................................................................28

Power Dissipation.........................................................................................................................................................................30

I/O Equivalent Circuits ..................................................................................................................................................................31

Operational Notes.........................................................................................................................................................................32

Ordering Information.....................................................................................................................................................................34

Marking Diagrams.........................................................................................................................................................................34

Physical Dimension, Tape and Reel Information...........................................................................................................................35

Revision History............................................................................................................................................................................36

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Pin Configurations

VQFN20SV4040

Pin Descriptions

Pin No.

Symbol

Function

Pin No.

Symbol

Function

Soft start time setting pin

Output feedback pin

SW pin

N.C

PVIN

VIN

Power supply pin for output FET

Power supply pin

Enable pin

Operating frequency setting pin

RT setting frequency/

Synchronization select pin

SEL

SYNC

CTL2

External clock input pin

Test pin

CTL1

GND

COMP

Test pin

PGOOD Power good output pin

GND pin

PGND

GND pin for output FET

Error amp output pin

E-Pad is a back radiation pad. Excellent radiation property is obtainable by connection to internal PCB ground-plane using

multiple via.

Use CTL1 terminal by applying 2.1 V or higher when enable is on.

Use CTL2 terminal by short-circuiting to GND.

If N.C pin is shorted to GND, heat radiation performance becomes higher.

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Block Diagram

Description of Blocks

・ERROR AMPLIFER

This is an error amplifier using reference voltage of 0.6V (Typ) and “FB” terminal voltage as input. (Refer to p. 21 to p. 22

for phase compensation setting method). Duty width of switching pulse is controlled with “COMP” of error amplifier output.

Output voltage is set using “FB” terminal. Phase compensation can be adjusted by connecting capacitor and resistor to

“COMP” terminal.

・SOFT START

This is a function for preventing overshoot of output voltage by gradually raising non-inverting input voltage of ERROR

AMPLIFIER to gradually increase duty of switching pulse at power on. Soft start can be set by connecting a capacitor

between “GND” terminals with “SS terminal”. (Refer to p. 22.)

・OSCILLATOR

Oscillation frequency of 0.3 MHz to 2.4 MHz can be set by connecting a resistor between “RT” terminal and “GND”

terminal in the circuit which generates pulse waveform to be input to SLOPE. (Refer to Figure 18 on p. 21)OSCILLATOR

output sends clock signal to DRV. OSCILLATOR output is also used as the clock of SCP counter.

・SLOPE

This is the block for generating saw-tooth wave from the clock formed by OSCILLATOR. Generated saw-tooth wave is

combined with feedback current of coil current and sent to PWM COMPARATOR.

・PWM COMPARATOR

This is a comparator that compares SLOPE output and ERROR AMPLIFIER output.

・DRV

This is a latch circuit having OSCILLATOR output (set) and PWM COMPARATOR output (reset) as input. It generates

PWM control signal and outputs gate signal for FET drive.

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・TSD (Thermal Shut Down)

This is an overheat protection circuit. In order to prevent IC thermal destruction/runaway, output is turned off when chip

temperature rises to about 150°C or higher. It is recovered when temperature returns to constant temperature. However,

since overheat protection circuit is essentially built-in for the purpose of protection of IC itself, carry out thermal design to

keep chip temperature below about 150°C as TSD detection temperature.

・OCP V_TH(Over Current Protection)

This is an overcurrent protection circuit. When output Pch POWER MOS FET is turned on and voltage between drain and

source exceeds internal reference voltage value, overcurrent protection activates. This overcurrent protection is self-reset

type. When overcurrent protection activates, duty becomes small and output voltage is reduced. However, since these

protection circuits are effective in protection from destruction due to sudden accidents, avoid using them when continuous

protection circuit is in action.

・SCP (Short Current Protection)

This is a load short-circuit protection circuit. When the state of output of 60% or lower is detected in oscillation cycle × 256

(s), POWER MOS FET is turned off. If output voltage is recovered to 60% or higher before completion of 256 cycles,

POWER MOS FET is not turned off. This load short-circuit protection is cancelled after retention of oscillation cycle × 2048

(s), and it is restarted with soft start. Elongation of off time results in decrease of mean output current. During startup of

power source, this function is masked until output reaches set voltage to prevent startup failure.

・UVLO (Under Voltage Lock-Out)

This is a low voltage wrong operation prevention circuit. It prevents wrong operation of internal circuits during power

source voltage startup and when power source voltage is reduced. Power source voltage is monitored and when it is

reduced to 2.25 V (Typ) or lower, output POWER MOS FET is turned off. When UVLO is cancelled, it is restarted with soft

start. This threshold has hysteresis of 100 mV (Typ).

・VOLTAGE REFERENCE

It supplies reference voltage to internal circuits.

・OVP

When output voltage is detected to have exceeded set value + 10%, Pch FET and Nch FET of output is turned off. After

detection, when output is reduced and the overvoltage state is cancelled, switching action is restarted. There is hysteresis

of 2% in overvoltage detection voltage and cancel voltage.

・PGOOD

When output voltage is below 90% or above 110% of set value, output error state is assumed, and PGOOD terminal is

turned “Low”. There is hysteresis of 2% in detection voltage and cancel voltage. At the time of EN OFF and when UVLO

and TSD are in action, PGOOD terminal output is also turned “Low”. If VIN input voltage exceeds 2 V, PGOOD output

becomes effective. Since output is open drain type, connect pull up to VIN or an external power source with resistance of

10kΩ - 100 kΩ.

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Absolute Maximum Ratings (Ta = 25°C)

Parameter

Symbol

V_IN, PV_IN

V_EN

Rating

-0.3 to 7

-0.3 to V_IN

-0.3 to 7

-0.3 to V_IN

-0.3 to 7

+150

Unit

Supply Voltage

EN Pin Voltage

SYNC Pin Voltage

SEL Pin Voltage

V_SYNC

V_SEL

FB Pin Voltage

V_FB

COMP Pin Voltage

SS Pin Voltage

V_COMP

V_SS

RT Pin Voltage

V_RT

PGOOD Pin Voltage

Maximum Junction Temperature

Storage Temperature Range

ESD Rating (HBM)

V_PGOOD

Tjmax

Tstg

°C

-55 to +150

±2000

V_{ESD, HBM}

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over

the absolute maximum ratings.

Thermal Resistance^{(Note 1)}

Thermal Resistance (Typ)

項目

Symbol

Unit

1s^{(Note 3)}

2s2p^{(Note 4)}

VQFN20SV4040

Junction to Ambient

Junction to Top Characterization Parameter^{(Note 2)}

θ_JA

153.9

37.4

°C / W

Ψ_JT

(Note 1) Based on JESD51-2A(Still-Air)

(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface

of the component package.

(Note 3) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

Single

114.3mm x 76.2mm x 1.57mmt

Top

Copper Pattern

Thickness

Footprints and Traces

70μm

(Note 4) Using a PCB board based on JESD51-5,7.

Thermal Via ^{(Note 5)}

Layer Number of

Material

Board Size

Measurement Board

Pitch

Diameter

4 Layers

FR-4

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

1.20mm

Φ0.30mm

Top

Bottom

Copper Pattern

Thickness

Copper Pattern

Thickness

Copper Pattern

Thickness

Footprints and Traces

(Note 5) This thermal via connects with the copper pattern of all layers.

74.2mm x 74.2mm

70μm

35μm

70μm

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Recommended Operating Conditions (Ta = -40°C to +125°C)

Parameter

Symbol

V_IN, PV_IN

V_EN

Min

Max

5.5

Unit

Supply Voltage

2.6

EN Pin Voltage ^{(Note 1,2)}

SEL Pin Voltage

5.5

V_SEL

V_SYNC

f_RT

5.5

SYNC Pin Voltage

V_IN

Setting Frequency Range

External Clock Frequency Range

Output Voltage Range

Output Current

MHz

0.3

2.4

0.3 ^{(Note 3)}

0.6 ^{(Note 4)}

2.4 ^{(Note 3)}

5.0

f_SYNC

V_O

4 ^{(Note 4)}

I_O

11 ^{(Note 5)}

Input Capacitor

C_IN1

μF

(Note 1) State enters test mode when EN terminal exceeds 6 V.

(Note 2) Within action power voltage range, the order of startup of power (V_IN, PV_IN), EN terminal and SEL terminal does not matter.

(Note 3) As an external signal, input frequency within ±25% of frequency set by RT resistance.

(Note 4) Output voltage is limited by SW minimum ON time depending on setting of input voltage and oscillation frequency. For the setting range, see setting

of output voltage of application part selection method (p. 20).

(Note 5) Ceramic capacitor is recommended. Set the capacitance value not to become below minimum value including variation, temperature property, DC

bias property and aging. Since malfunction may occur depending on substrate patterns and capacitor positions, please design the substrate

referring to cautions in substrate layout (p. 28).

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Electrical Characteristics

(Unless otherwise specified, -40 °C ≤ Ta ≤ +125 °C、V_IN= PV_IN= 5 V、V_EN= 3.3 V、V_CTL1= 5 V)

Limit

Parameter

Symbol

Unit

Conditions

V_EN= 0V, Ta = 25°C

Min

Typ

Max

Standby Circuit Current

Circuit Current

I_SDN

I_IN

μA

V_FB= 0.63V, Ta = 25°C

700

1050

EN ON Voltage

V_{EN_ON}

V_{EN_OFF}

I_EN

2.1

EN OFF Voltage

0.7

V_EN= 3.3V

Sweep Down

Sweep Up

EN Input Current

μA

UVLO ON Voltage

UVLO OFF Voltage

FB Input Current

V_{UVLO_ON}

V_{UVLO_OFF}

I_FB

2.25

2.35

2.40

2.50

0.5

0.609

-5

V_FB= 0.6V

FB = COMP

μA

Reference Voltage

COMP Source Current

COMP Sink Current

SS Charge Current

SS Discharge Current

Operating Frequency

SW Min ON Time 1

SW Min ON Time 2

SW Min OFF Time

SW ON-Resistance H

SW ON-Resistance L

V_REF

0.591

0.600

-20

I_{COMP_SOURCE}

I_{COMP_SINK}

I_SS

-40

μA

Ω

V_SS= 0.6V

R6 = 240kΩ

I_O= 0A

-3

-2

-1

R_SS

100

200

1.00

100

300

1.15

f_OSC

0.85

MHz

mΩ

t_{SW_ON1}

t_{SW_ON2}

t_{SW_OFF}

R_{ON_SW_H}

R_{ON_SW_L}

I_O= 1A

100

I_SW= -50mA, V_FB= 0.58V

180

120

_SW= +50mA, V_FB= 0.62V

Over-Current Detect

Current

I_{SW_OCP}

4.5

7.5

SYNC ON Voltage

V_{SYNC_ON}

V_{SYNC_OFF}

I_SYNC

0.8 x V_IN

0.2 x V_IN

SYNC OFF Voltage

SYNC Input Current

PGOOD Sense FB Voltage

PGOOD ON-Resistance

SEL ON Voltage

V_SYNC= 5V

±10

120

μA

Ω

Pull up to VIN with 10kΩ

V_{FB_PGOOD1}

R_PGOOD

±6

2.1

±14

240

V_PGOOD= 5V

V_{SEL_ON}

SEL OFF Voltage

SEL Input Current

V_{SEL_OFF}

I_SEL

0.7

V_SEL= 3.3V

μA

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Typical Performance Curves(Unless otherwise specified like the condition of each item of P8)

1050

1.0

950

0.8

850

0.6

750

650

0.4

550

0.2

450

0.0

350

-40 -20

40 60

80 100 120

-40 -20

20 40 60 80 100 120

Temperature (°C)

Temperature (

)

℃

Figure 2. Circuit Current vs Temperature

Figure 1. Standby Circuit Current vs Temperature

0.610

0.608

0.606

0.604

0.602

0.600

0.598

0.596

0.594

0.592

0.590

0.610

0.608

0.606

0.604

0.602

0.600

0.598

0.596

0.594

0.592

0.590

2.5

3.0

3.5

4.0

4.5

5.0

5.5

-40 -20

20 40 60 80 100 120

Temperature (°C)

Supply Voltage : V_IN(V)

Figure 4. Reference Voltage vs Supply Voltage

Figure 3. Reference Voltage vs Temperature

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Typical Performance Curves - continued

2.50

2.45

2.40

2.35

2.30

2.25

2.20

2.15

2.10

2.1

1.9

1.7

1.5

1.3

1.1

0.9

0.7

UVLO OFF

UVLO ON

-40 -20

80 100 120

-40 -20

40 60

80 100 120

Temperature (°C)

Figure 5. EN ON/OFF Voltage vs Temperature

Figure 6. UVLO ON/OFF Voltage vs Temperature

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

1.15

1.10

1.05

1.00

0.95

0.90

0.85

R6 = 240kΩ

-40 -20

20 40 60 80 100 120

Temperature (°C)

2.5

3.0

3.5

4.0

4.5

5.0

5.5

SupplyVoltage : V_IN(V)

Figure 8. Frequency (1MHz) vs Temperature

Figure 7. Frequency vs Supply Voltage

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Typical Performance Curves - continued

2.8

2.6

2.4

2.2

2.0

345

R6 = 75kΩ

R6 = 910kΩ

330

315

300

285

270

255

-40 -20

20 40

60 80 100 120

-40 -20

80 100 120

Temperature (°C)

Figure 9. Frequency (300kHz) vs Temperature

Figure 10. Frequency (2.4MHz) vs Temperature

0.5

0.4

3.0

2.8

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.3

0.2

0.1

0.0

-0.1

-0.2

-0.3

-0.4

-0.5

-40 -20

20 40 60 80 100 120

Temperature (°C)

-40 -20

20 40

Temperature (°C)

60 80 100 120

Figure 11. FB Input Current vs Temperature

Figure 12. SS Charge Current vs Temperature

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Typical Performance Curves - continued

140

120

100

Pch FET

Nch FET

-40 -20

20 40 60 80 100 120

Temperature (°C)

-40 -20

80 100 120

Temperature (°C)

Figure 14. Over-Current Detect Current vs Temperature

Figure 13. SW ON-Resistance vs Temperature

3.0

2.8

2.6

2.4

2.2

2.0

PGOOD falling

PGOOD rising

-2

-4

-6

-8

-10

-12

-14

PGOOD rising

PGOOD falling

-40 -20

80 100 120

-40 -20

40 60

80 100 120

Temperature (°C)

Figure 16. PGOOD DETECT Voltage vs Temperature

Figure 15. SYNC ON/OFF Voltage vs Temperature

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Typical Performance Curves - continued

180

160

140

120

100

-40 -20

80 100 120

Temperature (°C)

Figure 17. PGOOD ON-Resistance vs Temperature

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Description of Operation and Timing Chart

■

Enable control

IC operation is controlled by voltage applied on EN terminal. When Voltage of 2.1 V or higher is applied on EN terminal,

output starts in 60 μs(Typ) with soft start. Set the startup time on input voltages, VIN and PVIN, earlier than soft start

time. The circuits can be shut down by opening EN terminal or reducing its voltage to below 0.7 V.

V_IN, PV_IN

V_EN

0.6V

V_SS

60μs

Setting voltage×0.92

V_O

V_PGOOD

Soft start setting time

■

Protection functions

Since protection circuits are effective in protection from destruction due to sudden accidents, avoid using protection

operation continuously.

(1) Short Current Protection (SCP)

When the state of output of 60% or lower is detected in oscillation cycle × 256 (s), POWER MOS-FET is turned off. If

output voltage has recovered to 60% or higher before completion of 256 cycles, POWER MOS-FET is not turned off.

This load short-circuit protection is cancelled after retention for oscillation cycle × 2048 (s), and it is restarted with soft

start. Elongation of off time results in decrease of mean output current. During startup of power source, this function is

masked until output reaches set voltage to prevent startup failure.

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(2) Under Voltage Lock-Out (UVLO)

It prevents wrong operation of internal circuits during power source voltage startup and when power source voltage is

reduced. Power source voltage is monitored and when it is reduced to 2.25 V (Typ) or lower, output POWER MOS FET

is turned off. When UVLO is cancelled, it is restarted with soft start. This threshold has hysteresis of 100 mV (Typ).

(3) Thermal Shut Down (TSD)

In order to prevent IC thermal destruction/runaway, output is turned off when chip temperature rises to about 150°C or

higher. It is recovered when temperature returns to constant temperature. However, since overheat protection circuit is

essentially built-in for the purpose of protection of IC itself, carry out thermal design to keep chip temperature below

about 150°C as TSD detection temperature.

(4) Over Current Protection (OCP)

When output Pch POWER MOS FET is turned on and voltage between drain and source exceeds internal reference

voltage value, overcurrent protection activates. This overcurrent protection is self-reset type. When overcurrent

protection activates, duty becomes small and output voltage is reduced. However, since these protection circuits are

effective in protection from destruction due to sudden accidents, avoid using them when continuous protection circuit is

in action.

(5) Over Voltage Protection (OVP)

When output voltage is detected to have exceeded set value + 10%, Pch FET and Nch FET of output is turned off. After

detection, when output is reduced and the overvoltage state is cancelled, switching action is restarted. There is

hysteresis of 2% in overvoltage detection voltage and cancel voltage.

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■

Synchronization to External Clock

For external synchronization operation, connect frequency setting resistor to “RT” terminal, apply voltage of 2.1 V or

higher on “SEL” terminal, and input synchronous pulse signal to “SYNC” terminal. There is no restriction in the order of

input in “SYNC” terminal and “SEL” terminal. When voltage is applied to both terminals, it starts external synchronization

action. In case no external signal is connected to “SYNC” terminal when voltage of 2.1 V or higher is applied to “SEL”

terminal (no input is assumed in the case of being fixed at low or high), external synchronization action does not occur.

When voltage on “SEL” terminal is reduced to 0.7 V or lower, external synchronization operation ends. In this case,

operation is carried out with frequency of internal CLK from the cycle next to internal CLK. In order to finish external

synchronization operation, turn off external signal of “SYNC” terminal after “SEL” terminal input voltage becomes “Low”.

Note that output voltage varies during synchronization to external signal and switching to internal CLK frequency.

When using external synchronization, setting range of oscillation frequency is restricted by external resistance of “RT”

terminal. The setting range becomes within ±25% of RT setting frequency.

Example) When R6 = 240 kΩ,

Since set oscillation frequency is 1.0 MHz, allowable range of external synchronization operation frequency is 0.75 MHz

to 1.25 MHz.

Set LOW voltage of synchronous pulse signal to 0.2 V × V_INor lower, and HIGH voltage to 0.8 V × V_INor higher.

Set slew rate of rise (fall) at 30 V / µs or more, and duty within the range of 20% to 80%.

After 4 detections of rise of synchronous pulse, synchronization starts from the fifth rise.

Internal CLK

SYNC

SEL

RT resistance setting frequency

(Internal CLK frequency)

RT resistance setting frequency

(Internal CLK frequency)

Frequency of the

outside signal

Timing chart of synchronization to external clock

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Selection of Components Externally Connected

Necessary parameters in designing the power supply are as follows:

Parameter

Input Voltage

Symbol

V_IN

Specification Case

5 V

Output Voltage

V_O

1.2 V

Output Ripple Voltage

Input Range

∆V_PP

I_O

10 mV_p-p

Typ 1.5 A / Max 4.0 A

2.0 MHz

Switching Frequency

Operating Temperature Range

f_SW

-40 °C to +105 °C

Application Sample Circuit

(1) Selection of Inductor

The switching regulator needs an LC filter for smoothing of output voltage in order to supply continuous current to load.

When an inductor with large inductance value is selected, ∆I_Lflowing in the inductor becomes small and output ripple

voltage is reduced. Furthermore, there is a trade-off between size and cost of inductance.

The inductance value of the inductor is shown in the following equation:

ꢂꢃ

^{ꢋꢃꢌꢍꢎꢃꢌ}ꢔ [H]

ꢆ

ꢊ

ꢄꢅ ꢇꢈꢉ

ꢀ ꢁ _ꢃ

ꢎꢏ ꢎ∆ꢒ

ꢓ

ꢆ

ꢊ

ꢐꢑ

ꢄꢅ ꢇꢈꢉ

Where:

ꢕ

is the maximum input voltage

ꢒꢖꢔ ꢆꢗꢘꢙꢊ

∆ꢚ_ꢛis the ripple current of inductor

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Set ∆I_Lto about 30% of maximum output current.

When ∆I_Lbecomes small, core loss (iron loss) of inductor, loss of output capacitor due to ESR and ∆V_PPbecome small.

∆ꢒ

ꢓ

∆ꢕ_ꢜꢜꢁ ∆ꢚ_ꢛꢎ ꢝꢞꢟ ꢠ _{ꢡꢎꢢ ꢎꢏ}ꢔ [V]

・・・・・(a)

ꢣ

ꢐꢑ

Where:

ꢝꢞꢟ is the equivalent series resistance of output capacitor

ꢤ_ꢥis the output capacitor

Since ceramic capacitors generally have ultra-low ESR, target ∆V_PPcan be satisfied even if ∆I_Lis large to some extent.

The advantage is that inductance value of inductor can be set small. Small inductance value contributes to space-saving

of sets, because large rated current enables selection of small size inductors. The disadvantages are increase of core

loss of inductor and reduction of maximum output current. When using other capacitors (electrolytic capacitor, tantalum

capacitor, electro-conductive polymer, etc.) as the output capacitor C_O, confirm ESR with data sheet of the manufacturer,

and determine ∆I_Lto fit ∆V_PPwithin allowable range.

Especially, since capacitance reduction of electrolytic capacitor is significant at low temperature, ∆V_PPincreases. Pay

attention when using it at low temperature

The maximum output electric current is limited to the overcurrent protection working current as shown in the following

equation.

ꢚ_{ꢥꢆꢗꢦꢧꢊ}ꢁ ꢚ_{ꢨꢩ_ꢥꢢꢜꢆꢗꢒꢖꢊ}ꢪ ^∆ꢒ^ꢓꢔ [A]

ꢫ

Where:

ꢚ_{ꢥꢆꢗꢘꢙꢊ}is the maximum output current

ꢚ_{ꢨꢩ_ꢥꢢꢜꢆꢗꢬꢭꢊ}is the OCP operation current (Min)

I_{SWLIMIT (Min)}

I_O

I_L

I_Lpeak

In the case of continuous operation with duty ≥ 50%, current control mode may generate sub-harmonic oscillation. This

IC has a built-in slope compensation circuit for the purpose of prevention of sub-harmonic oscillation.

Since sub-harmonic oscillation depends on increase rate of output switch current I_L, sub-harmonic oscillation may be

generated when inductance value is reduced to increase slope of I_L.

On the other hand, when inductance value is increased to reduce slope of I_L, sufficient stability may not be secured.

For stable operation, restrict inductance value within the range where the following formula is applicable

ꢋꢃ

ꢀ ꢮ _{ꢫꢆꢰꢋꢯꢊ}ꢎ ꢟꢱ ꢎ ^ꢃ

[H]

ꢫꢯꢋꢰ

ꢄꢅꢔ ꢆꢇꢄꢅꢊ

ꢣ

ꢲ

ꢕ_ꢥ

ꢳ ꢁꢔ

ꢕ

ꢒꢖꢆꢗꢒꢖꢊ

ꢴ ꢁ 1.69 ꢎ ꢵ ꢎ 10^ꢋꢸꢪ 0.19

ꢶꢷ

Where:

ꢔ ꢳ is the switching pulse ON Duty.

ꢟ_ꢨis the coefficient of current sense(2.53 µA / A)

ꢴ is the slope of slope compensation current

Shield type (closed magnetic path type) inductors are recommended. There is no problem with open magnetic path type

if the application is cost-emphasized and free of annoying noise. In this case, consider layout with enough allowance

between parts, since there may be influence of magnetic field radiation on adjacent parts. Pay special attention to

magnetic saturation for ferrite-core type inductors. Core saturation should be avoided under all use conditions. Attention

is needed since rated current specification is different depending on manufacturers. Confirm rated current at maximum

ambient temperature of application with the manufacturer.

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(2) Selection of output Capacitor C_O

Select output capacitor based on required ESR from formula (a). ∆V_PPcan be minimized by using capacitors with small

ESR. Ceramic capacitor is the best option for satisfying the requirement. In addition to exhibiting low ESR, ceramic

capacitors contribute to space saving of sets because of being small. Confirm frequency characteristics of ESR with

manufacturers’ data sheets, and select a capacitor with low ESR at switching frequency used.

Use ceramic capacitors carefully because DC bias property is remarkable. It is usually desirable that rated voltage of a

ceramic capacitor is more than twice as high as maximum output voltage. Influence of DC bias property can be reduced

by selecting a capacitor with high rated voltage. Furthermore, in order to keep good temperature characteristics,

capacitors with property higher than that of X7R are recommended.

Tantalum capacitors and electro-conductive polymer hybrid aluminum electrolytic capacitors have very good

temperature characteristics, for which electrolytic capacitors are disadvantageous. Further, since their ESR is smaller

than that of electrolytic capacitors, relatively small ripple voltage can be obtained in wide temperature range. Similar to

electrolytic capacitors, they are almost free from DC bias characteristics, and make designing easier. Usually, ones with

rated voltage about twice as high as output voltage are selected for tantalum capacitors and ones with rated voltage

about 1.2 times as high as output voltage are selected for electro-conductive polymer hybrid aluminum electrolytic

capacitors. The disadvantage of tantalum capacitors is that failure mode is short-circuiting and withstand voltage is low.

Generally, they are not selected for applications such as car-mounted applications in which reliability is required. Since

failure mode is open for electro-conductive polymer hybrid aluminum electrolytic capacitors, they are effective to meet

the reliability requirement, but they have a disadvantage of generally being expensive.

Pch step-down switching regulator lowers input voltage V_IN, and when difference between input and output voltages

becomes small, switching pulse begins to disappear before 100% on-duty is reached.

As a result, when switching pulse disappears, output ripple voltage may increase.

When improvement of output ripple voltage is necessary, following measures should be considered for output capacitor

C_O.

･ Use of capacitors with low ESR such as ceramic capacitors, electro-conductive polymer hybrid aluminum electrolytic

capacitors, etc.

･ Increase of capacitance value

Rated ripple current is specified for these capacitors.

Pay attention to prevent RMS value I_CO(RMS)of output ripple current, obtained by the following formula, from exceeding

rated ripple current.

The RMS values of the ripple current that can be obtained in the following equation must not exceed the rated ripple

current.

∆ꢒ

ꢚ_{ꢢꢥꢆꢹꢗꢨꢊ}ꢁ _√_ꢰ^ꢓ_ꢫꢔ [A]

Where:

ꢔ ꢚ_{ꢢꢥꢆꢹꢗꢨꢊ}ꢔ is the value of the ripple electric current

In addition, total value of capacitance with output line C_o(Max), respect to C_O, choose capacitance value less than the

value obtained by the following equation.

ꢎꢆꢒ

ꢋꢒ

ꢐꢑꢐꢽꢈꢾꢽ ꢇꢈꢉ

ꢤ_{ꢥꢆꢗꢦꢧꢊ}ꢁ ^ꢺ

^ꢊꢔ ꢔ ꢔ [F]

ꢐꢐꢆꢇꢄꢅꢊ

ꢐꢑ_ꢣꢻꢼꢆꢇꢄꢅꢊ

ꢆ

ꢊ

ꢃ

ꢣ

Where:

ꢚ_{ꢨꢩ_ꢥꢢꢜꢆꢗꢬꢭꢊ}is the OCP operation switch current (Min)

ꢿ

is the Soft Start Time (Min)

ꢨꢨꢆꢗꢬꢭꢊ

ꢚ_{ꢨꢩꢨꢺꢦꢹꢺꢆꢗꢘꢙꢊ}ꢔ is the maximum output current during startup

When the conditions shown above are not followed, startup failure, etc. may occur. Especially when capacitance value

is extremely large, overcurrent protection may operate due to inrush current at the time of startup and output may fail to

start. Confirm the capacitance value well with the set. Transient responsiveness and stable operation of loop depend on

C_O. Select it after confirming setting of phase compensation circuit. When input voltage variation and load variation are

big, decide capacitance value after confirming it with actual application corresponding to specifications.

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(3) Selection of Input Capacitor

Ceramic capacitor is necessary for input capacitor. Ceramic capacitor is effective when placed as close as possible to

PVIN terminal. One with capacitance value of 11μF or higher and with rated voltage of 1.2 or more times as high as

maximum input voltage and twice or more as high as normal input voltage is recommended. Set the capacitance value

not to be lower than minimum values including variation, temperature characteristics, DC bias property and aging. Since

malfunction may occur depending on substrate patterns and capacitor positions, refer to precautions on substrate layout

(p. 28) for designing.

In that case, please consider not to exceed the rated ripple current of the capacitor.

The ripple current I_RMScan be calculated using the following equation.

ꢃ ꢎꢆꢃ

^{ꢋꢃ ꢊ}ꢔ ꢔ ꢔ [A]

ꣀ

ꢣ

ꢄꢅ

ꢣ

ꢚ_{ꢢꢒꢖꢆꢹꢗꢨꢊ}ꢁ ꢚ_{ꢥꢆꢗꢦꢧꢊ}

∙

ꢃ

ꢄꢅ

Where:

ꢚ_{ꢢꢒꢖꢆꢹꢗꢨꢊ}is the RMS value of the input ripple electric current

As for capacitance values, high capacitance is required when input-side impedance is high, such as when wiring from

power source to PVIN terminal is long. It is necessary to verify under actual use conditions that there is no operation

problem such as output off state and overshoot of output due to reduction of V_INduring transient response

(4) Setting the Output Voltage

The output voltage is determined by the equation below.

ꢕ_ꢥꢁ 0.6 ꢎ ^{ꢹꣁꣂꢹꢫ}ꢔ ꢔ [V]

ꢹꢫ

Set feedback resistance R2 at 30kΩ or lower in order to minimize error due to bias current. Set current flowing in

feedback resistance sufficiently small against output current I_O, since power efficiency is reduced when R1 + R2 is

small.

Whereas output voltage can be set to 0.6 V or higher, it is limited by SW minimum ON time depending on setting of input

voltage and oscillation frequency. The minimum settable output voltage, V_OUTMIN, is determined by the following

expressions.

ꢕ_{ꢥꣃꢺꢲꢬꢭꢔ}ꢔ ꢮꢔ ꣄ꢔ ꣅꢕꢚ꣆ꢔ ꢪ ꢚ_ꢥꣃꢺꢔ ꢎꢔ ꢂꢟ_{ꢥꢖ_ꢨꢩ_꣇_ꢲꢬꢭ}ꢔ ꢪꢔ ꢟ_{ꢥꢖ_ꢨꢩ_ꢛ_ꢲꢬꢭ}ꢍꢔ ꣈ꢔ ꢔ ꢎ ꢵ_꣉꣊꣋ꢔ ꢎꢔ ꢿ

ꢨꢩ_ꢥꢖ_ꢲꢘꢙ

ꢔ ꢪꢔ ꢚ_ꢥꣃꢺꢔꢔ ꢎꢔ ꢟ_{ꢥꢖ_ꢨꢩ_ꢛ_ꢲꢬꢭ}ꢔ ꢔ ꢔ [V]

V_OUT

Where:

ꢟ_{ꢥꢖ_ꢨꢩ_꣇}is the ON-Resistance H min (60mΩ)

ꢟ_{ꢥꢖ_ꢨꢩ_ꢛ}is the ON-Resistance L min (45mΩ)

I_FB

ꢵ

is the typ.Frequency (setting RT value)

is SW Min ON time

꣉꣊꣋

0.6V

GND

ꢿ

ꢨꢩ_ꢥꢖ_ꢲꢘꢙ

(90ns with load,110ns without load)

The values shown above are values at 25°C. Though SW minimum ON time tends to increase when temperature rises,

variation due to temperature change is cancelled because SW ON resistance tends to increase and oscillation

frequency tends to decrease at the same time. Note that the calculation formula shown above is theoretical. Actual

properties may vary depending on substrate layout, properties of external parts, etc.

(5) Selection of Schottky Diode

The Schottky diode is optional. Depending on the application, efficiency may be improved by addition of Schottky diode

between SW terminal and PGND terminal to create current route for the time synchronous switch (Nch FET) is off.

Select Schottky diode with reverse breakdown voltage higher than input voltage and with rated current higher than

maximum inductor current (sum of maximum output current and inductor ripple current).

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(6) Setting the Oscillating Frequency

Internal oscillation frequency is set based on the value of resistance connected between RT terminal and GND. The

setting range is between 0.3MHz and 2.4MHz. Relation between resistance value and oscillation frequency is

determined as shown in the drawing below. Note that operation is not assured when the setting is out of the range,

which may cause switching to stop.

R6 [kΩ]

910

680

510

430

300

240

160

130

110

100

F [kHz]

310

400

520

600

830

1000

1400

1650

1880

2000

2150

2300

2450

R6 vs f_SW

Figure 18. R6 vs f_SW

(7) Setting the Phase Compensation Circuit

High response function is realized by setting zero cross frequency f_Cof total gain (frequency of gain 0 dB) high.

However, please note that it is a trade-off with stability.

Furthermore, since switching regulator application is sampled by switching frequency, and gain in switching frequency

needs to be suppressed, zero cross frequency needs to be set to 1/10 or lower of switching frequency. Characteristics

aimed at by application are as follows.

Phase-lag when gain is 1 (0 dB) is within 135° (phase margin is 45° or more).

Zero cross frequency is 1/10 or lower of switching frequency.

In order to improve responsiveness, switching frequency needs to be increased.

Phase compensation is set with capacitor and resistance connected to COMP terminal. System stability is obtained by

inserting phase lead fz1 against influence of two phase-lags fp1 and fp2 to cancel them. fp1, fp2 and fz1 are determined

as shown in the following formula.

ꢰ

ꢵ 1 ꢁ _{ꢫ꣍ꢎꢹꢰꢎꢢꢰ}ꢔ [Hz]

꣌

ꢰ

ꢵ 1 ꢁ

ꢔ

[Hz]

ꢜ

ꢫ꣍ꢎꢢ ꢎꢹ

ꢣ

꣎

꣏ꢈ

ꢵ 2 ꢁ

ꢜ

ꢫ꣍ꢎꢢꢰꢎꢦ

꣐

Frequency characteristics can be optimized by setting appropriate frequencies for the pole and zero.

The typical setting is as below.

0.2 ꢎ ꢵ 1 ≦ ꢵ 1 ≦ 2 ꢎ ꢵ 1

[Hz]

ꢜ

꣌

ꢜ

Furthermore, phase lead fz2 can be added by inserting of C4 capacitor.

ꢰ

ꢵ 2 ꢁ _{ꢫ꣍ꢎꢹꣁꢎꢢ꣒}ꢔ [Hz]

꣑

Where:

ꢟ_ꢥis the resistance assumed actual load[Ω] = Output Voltage[V] / Output Current[A]、

ꢔ ꢔ ꢔ ꣓_꣔ꢦꢔ is the Error Amp Transconductance (310 µA / V)

ꢔ ꣕_ꢃis the Error Amp Voltage Gain (60 dB)

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Setting Phase Compensation Circuit

Actually, characteristics will vary depending on PCB layout, arrangement of wiring, kinds of parts used and use

conditions (temperature, etc.). Be sure to check stability and responsiveness with actual apparatus. Gain phase

analyzer or FRA is used to check frequency characteristics with actual apparatus. Contact the measurement apparatus

manufacturer for measurement method, etc. When these measurement apparatuses are not available, there is a

method of assuming margin by load response. Variation of output when the apparatus shifts from no load state to

maximum load is monitored, and it can be said that responsiveness is low if variation amount is large, and phase margin

is small if ringing occurs frequently (twice or more as a guide) after variation.

However, confirmation of quantitative phase margin is not possible.

Maximum load

Load

I_O

Inadequate phase margin

Output voltage

V_O

Adequate phase margin.

Measurement of Load Response

(8) Setting the Soft Start Time

Soft start is necessary for prevention of overshoot of output voltage at startup. Soft start time varies depending on

capacitance value of capacitor connected between “SS” terminal and “GND” terminal. Set the startup time on input

voltages, VIN and PVIN, earlier than soft start time. Capacitance value of 2200pF to 0.047μF is recommended.

꣘꣙ ꢎ ꣚. ꣛

[s]

꣖_꣗꣗ꢁꢔ

|꣜꣝꣝|

(9) Setting the Input filter (R_IN, C_IN2)

Since V_INis used as power source voltage for internal control circuit, input filter for VIN terminal is necessary in order to

prevent malfunction due to transient V_INvariation. Connect R_INof 10Ω and C_IN2 of 1μF. It is necessary to verify under

actual use conditions that there is no operation problem such as output off state and overshoot of output due to

reduction of V_INduring transient response.

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Recommended Parts Manufacturer List

Shown below is the list of the recommended parts manufacturers for reference.

Type

Electrolytic capacitor

Ceramic capacitor

Coil

Manufacturer

NICHICON

MURATA

TDK

URL

www.nichicon.com

www.murata.com

www.global.tdk.com

www.coilcraft.com

www.sumida.com

www.rohm.com

Coil

Coilcraft

Sumida

Coil

Diode/Resistor

ROHM

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Application Examples 1

Parameter

Symbol

V_IN

Specification case

Input Voltage

V_O/ I_O

f_SW

1.2V / 2A

2.0MHz

Output Voltage / Output Current

Switching Frequency

Soft Start time

T_SS

1ms

Operating Temperature

-40 to +105°C

Package

W6.9 x H7.2 x L4.5 mm³

Parameters

1μH

Part Name(series)

Type

Inductor

Manufacturer

TDK

CLF7045-D Series

GCM Series

CO1

CO2

CIN1

CIN2

CIN3

CIN4

RIN

3216

3225

1608

22μF, X7R, 6.3V

22μF, X7R, 10V

1μF, X7R, 16V

Ceramic Capacitor

MURATA

Ceramic Capacitor

Chip resistor

1608

0.01μF, X7R, 50V

10Ω, 1%, 1/16W

SHORT

GCM Series

MCR03 Series

MURATA

ROHM

1608

10kΩ, 1%, 1/16W

30kΩ, 1%, 1/16W

MCR03 Series

Chip resistor

ROHM

1608

10kΩ, 1%, 1/16W

100kΩ, 1%, 1/16W

2200pF, R, 50V

MCR03 Series

GCM Series

Chip resistor

Ceramic Capacitor

ROHM

MURATA

Ceramic Capacitor

1608

3300pF, R, 50V

GCM Series

MURATA

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Reference data of Application Example 1

100

0.01

0.10

1.00

10.00

Output Load (A)

OUTPUT LOAD (A)

Figure 20. Loop Response, I_O= 2A

Figure 19. Efficiency vs Output Load

V_O(100mV/div)

I_O(1A/div)

Figure 21. Load Response, I_O=0A⇔2A

Figure 22. Load Response, I_O=1A⇔2A

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Application Examples 2

Parameter

Symbol

V_IN

Specification case

Input Voltage

V_O/ I_O

f_SW

3.3V / 2A

2.0MHz

Output Voltage / Output Current

Switching Frequency

Soft Start time

T_SS

1ms

Operating Temperature

-40 to +105°C

Package

W6.9 x H7.2 x L4.5 mm³

Parameters

1μH

Part Name(series)

Type

Inductor

Manufacturer

TDK

CLF7045-D Series

GCM Series

CO1

CO2

CIN1

CIN2

CIN3

CIN4

RIN

3216

3225

1608

22μF, X7R, 6.3V

22μF, X7R, 10V

1μF, X7R, 16V

Ceramic Capacitor

MURATA

Ceramic Capacitor

Chip resistor

1608

0.01μF, X7R, 50V

10Ω, 1%, 1/16W

SHORT

GCM Series

MCR03 Series

MURATA

ROHM

1608

20kΩ, 1%, 1/16W

10kΩ, 1%, 1/16W

30kΩ, 1%, 1/16W

15kΩ, 1%, 1/16W

MCR03 Series

Chip resistor

ROHM

R3 (1)

R3 (2)

1608

10kΩ, 1%, 1/16W

100kΩ, 1%, 1/16W

2200pF, R, 50V

MCR03 Series

GCM Series

Chip resistor

Ceramic Capacitor

ROHM

MURATA

Ceramic Capacitor

1608

3300pF, R, 50V

GCM Series

MURATA

(Note) Please set to 45kΩ to combine 30 kΩ and 15 kΩ about R3.

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Reference data of Application Example 2

100

0.01

0.10

1.00

10.00

Output Load (A)

OUTPUT LOAD (A)

Figure 23. Efficiency vs Output Load

Figure 24. Loop Response, I_O= 2A

V_O(100mV/div)

V_O(200mV/div)

I_O(1A/div)

Figure 25. Load Response, I_O=0A⇔2A

Figure 26. Load Response, I_O=1A⇔2A

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Notes on the PCB Layout

SEL

N.C

PVIN

Co1

Co2

R^IN

CIN1

C^IN3

CIN4

VIN

C^IN2

Exposed die pad is needed to be connected to GND.

Application Circuit (VQFN20SV4040)

①

②

Make bold line part as short as possible in wide pattern.

Arrange input ceramic capacitors CIN1, CIN3 and CIN4 as close as possible to PVIN terminal and PGND terminal.

Arrange CIN2 as close as possible to VIN terminal and GND terminal.

③

④

⑤

⑥

Arrange R6 as close as possible to RT terminal.

Arrange R2 and R3 as close as possible to FB terminal to shorten wirings from R2 and R3 to FB terminal.

Arrange R2 and R3 as far as possible from L1.

Influence of SW noise can be reduced by separating power system (input/output capacitor) GND from reference system

(RT, COMP) GND. Connect them in common GND layers as shown in the layout in the next section.

R0 is for measurement of frequency characteristics of feedback and is optional.

Insertion of resistance in R0 enables measurement of frequency characteristics of feedback (phase margin) using FRA,

etc. Under normal conditions, it is shorted.

⑦

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Reference layout pattern

Reference PCB Layout (TOP VIEW)

C_O1

PGOOD

V_O

C_O2

GND

C_IN1

VIN

C_IN3

C_IN4

C_IN2

R_IN

C2 C1

SEL

GND

SYNC

Middle 1 Layer

TOP Layer

Bottom Layer

Middle 2 Layer

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Power Dissipation

In thermal design, operate under following conditions.

(Temperatures described below are guaranteed temperatures. Be sure to consider margin, etc.)

1. Ambient temperature Ta shall be 125°C or lower.

2. Chip junction temperature Tj shall be 150°C or lower.

Chip junction temperature Tj can be considered in following 2 ways.

①

②

When obtained from temperature Tt at the center of top surface of package under actual use conditions:

ꢿ꣞ꢔ ꢁ ꢔ ꢿ꣟ꢔ ꢠꢔ ꣠_꣡ꢺꢔ ꢎꢔ ꣅ_{ꢺꢥꢺꢦꢛ}

ꢔ

When obtained from actual ambient temperature Ta:

ꢿ꣞ꢔ ꢁ ꢔ ꢿ꣢ꢔ ꢠ ꢔ ꣣꣞꣢ꢔ ꢎꢔ ꣅ_{ꢺꢥꢺꢦꢛ}

ꢔ

＜Reference Value＞VQFN020SV4040

θjc

Top : 40 °C /W

Bottom : 15 °C /W

θja

153.9 °C / W 1-layer PCB

37.4 °C / W 4-layer PCB

ψ_JT

13 °C /W 1-layer PCB

7 °C /W 4-layer PCB

PCB Size 114.3 mm x 76.2 mm x 1.6 mm

The heat loss P_TOTALof the IC can be obtained by the formula shown below:

ꣅ_{ꢺꢥꢺꢦꢛ}ꢁ ꣅ_ꢒꢢꢢꢠꢔ ꣅ_ꢹꢥꢖꢔ ꢠꢔ ꣅ ꢔ ꢔ ꢔ ꢔ ꢔ [W]

ꢨꢩ

ꣅ =ꢕ ꢎ ꢚ_ꢒꢖ

[W] ꢔ ⋯ꢔHeat dissipation in control circuit

[W] ꢔ ⋯ꢔHeat dissipation in output FETꢔ

ꢒꢢꢢ

ꢒꢖ

ꢫꢔ

ꣅ_ꢹꢥꢖꢁ ꢟ_ꢥꢖꢎ ꢚ_ꢥ

ꢟ_ꢥꢖꢁ ꢳ ꢎ ꢟ_{ꢥꢖ_ꢨꢩ_꣇}ꢠ ꢆ1 ꢪ ꢳꢊ ꢎ ꢟ_{ꢥꢖ_ꢨꢩ_ꢛ}ꢔ ꢔ [Ω] ꢔ ⋯ꢔOn Resistance in output FET

ꢃ

ꢳ ꢁ _ꢃ^ꢣꢔ ꢔ ꢔ ⋯ꢔ ꢔ ꢔ Switching pulse dutyꢔ

ꢄꢅ

ꣅ

ꢨꢩ

ꢁ ꣟꣤ꢔ ꢎꢔ ꢚ_ꢥꢔ ꢎ ꢕ ꢎꢔ ꢵ

ꢨꢩ

[W] ꢔ ⋯ꢔeat dissipation in switchingꢔ

ꢒꢖ

꣥꣦꣧꣤꣧ ∶

ꢕ ꢔ is the input voltage [V]

ꢒꢖ

ꢚ_ꢒꢖis the circuit current [A]

ꢚ_ꢥꢔ is the load current [A]

ꢳ is the switching pulse duty

ꢔ ꢟ_{ꢥꢖ_ꢨꢩ_꣇}is the H-side FET ON resistance [Ω]

ꢟ_{ꢥꢖ_ꢨꢩ_ꢛ}is the L-side FET ON resistance [Ω]

ꢿ꣤ is the switching rise and fall time [S] (Typ:7ns)

ꢵ

ꢨꢩ

is the oscillating frequency [Hz]

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I/O Equivalent Circuits

COMP

EN, SEL

PVIN

PGND

VIN

COMP

GND

VIN

GND

SYNC

PGOOD

VIN

PGOOD

SYNC

GND

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Operational Notes

Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the

digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog

block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and

aging on the capacitance value when using electrolytic capacitors.

Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

Thermal Consideration

Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may

result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the

board size and copper area to prevent exceeding the maximum junction temperature rating.

Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

10. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

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Operational Notes – continued

11. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Figure 27. Example of monolithic IC structure

12. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

13. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within

the Area of Safe Operation (ASO).

14. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls

below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

15. Over Current Protection Circuit (OCP)

This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This

protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should

not be used in applications characterized by continuous operation or transitioning of the protection circuit.

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Ordering Information

B D 9 0 5 4 1 M U V -

CE 2

Product name

Package

VQFN20SV4040

Product rank

C: Automotive rank

Packaging and forming specification

E2: Embossed tape and reel

Marking Diagrams

VQFN20SV4040 (TOP VIEW)

Part Number Marking

9 0 5 4 1

LOT Number

1PIN MARK

Marking

Package

VQFN20SV4040

Part Number Marking

BD90541MUV-CE2

90541

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Physical Dimension, Tape and Reel Information

Package Name

VQFN20SV4040

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Revision History

Date

Revision

001

Changes

New Release

26.Apr.2016

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Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of

flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning

residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.003

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.003

Daattaasshheeeett

General Precaution

1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.

ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny

ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior

notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s

representative.

3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all

information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or

liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or

concerning such information.

Notice – WE

Rev.001

BD90541MUV-C [ROHM]

相关型号：

BD90541MUV-CE2

BD90571EFJ-C

BD90571EFJ-CE2

BD905FI

BD906

BD906

BD906

BD9060-33

BD9060F-C

BD9060F-CE2

BD9060HFP-C

BD9060HFP-CTR