BD45232 [ROHM]

Counter Timer Built-in CMOS Voltage Detector IC; 计数器定时器内置CMOS电压检测器IC


型号：	BD45232
厂家：	ROHM
描述：	Counter Timer Built-in CMOS Voltage Detector IC 计数器定时器内置CMOS电压检测器IC 计数器
文件：	总10页 (文件大小：274K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Voltage Detector IC Series

Counter Timer Built-in

CMOS Voltage Detector IC

BD45□□□G, BD46□□□G series

No.09006ECT06

 Description

ROHM’s BD45□□□G and BD46□□□G series are highly accurate, low current consumption reset IC series. Because the

counter timer delay circuit is built into those series, an external capacitor for the delay time setting is unnecessary. The

lineup was established with tow output types (Nch open drain and CMOS output) and detection voltages range from 2.3V to

4.8V in increments of 0.1V, so that the series may be selected according the application at hand.

 Features

1) Detection voltage: 2.3V to 4.8V (Typ.), 0.1V steps

2) High accuracy detection voltage:±1.0%

4) Operating temperature range: -40°C to +105°C

6) SSOP5 compact surface mount packages

3) Ultra-low current consumption: 0.85µA (Typ.)

5) Three internal, fixed delay time: 50ms, 100ms and 200ms

7) Nch open drain output (BD45□□□G), CMOS output (BD46□□□G)

 Applications

All electronic devices that use microcontrollers and logic circuits

 Selection Guide

No.

Specifications

Output Circuit Format

Description

5:Open Drain Output, 6:CMOS Output

Example: Displays VDET over a 2.3V to 4.8V range

in 0.1V increments. (2.9V is marked as “29”)

5: 50ms(Typ.), 1: 100ms(Typ.)

Part Number : BD4

Detection Voltage

Fixed Delay Times

2: 200ms(Typ.)

 Lineup

Detection

Voltage

Part

Number

Part

Number

Part

Number

Part

Number

Part

Number

Part

Number

Marking

4.8V

4.7V

4.6V

4.5V

4.4V

4.3V

4.2V

4.1V

4.0V

3.9V

3.8V

3.7V

3.6V

3.5V

3.4V

3.3V

3.2V

3.1V

3.0V

2.9V

2.8V

2.7V

2.6V

2.5V

2.4V

2.3V

BD45485

BD45475

BD45465

BD45455

BD45445

BD45435

BD45425

BD45415

BD45405

BD45395

BD45385

BD45375

BD45365

BD45355

BD45345

BD45335

BD45325

BD45315

BD45305

BD45295

BD45285

BD45275

BD45265

BD45255

BD45245

BD45235

BD45481

BD45471

BD45461

BD45451

BD45441

BD45431

BD45421

BD45411

BD45401

BD45391

BD45381

BD45371

BD45361

BD45351

BD45341

BD45331

BD45321

BD45311

BD45301

BD45291

BD45281

BD45271

BD45261

BD45251

BD45241

BD45231

BD45482

BD45472

BD45462

BD45452

BD45442

BD45432

BD45422

BD45412

BD45402

BD45392

BD45382

BD45372

BD45362

BD45352

BD45342

BD45332

BD45322

BD45312

BD45302

BD45292

BD45282

BD45272

BD45262

BD45252

BD45242

BD45232

BD46485

BD46475

BD46465

BD46455

BD46445

BD46435

BD46425

BD46415

BD46405

BD46395

BD46385

BD46375

BD46365

BD46355

BD46345

BD46335

BD46325

BD46315

BD46305

BD46295

BD46285

BD46275

BD46265

BD46255

BD46245

BD46235

BD46481

BD46471

BD46461

BD46451

BD46441

BD46431

BD46421

BD46411

BD46401

BD46391

BD46381

BD46371

BD46361

BD46351

BD46341

BD46331

BD46321

BD46311

BD46301

BD46291

BD46281

BD46271

BD46261

BD46251

BD46241

BD46231

BD46482

BD46472

BD46462

BD46452

BD46442

BD46432

BD46422

BD46412

BD46402

BD46392

BD46382

BD46372

BD46362

BD46352

BD46342

BD46332

BD46322

BD46312

BD46302

BD46292

BD46282

BD46272

BD46262

BD46252

BD46242

BD46232

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2009.05 - Rev.C

1/9

Technical Note

BD45□□□G, BD46□□□G series

 Absolute maximum ratings (Ta=25°C)

Parameter

Symbol

Limits

-0.3 ~ +10

Unit

Power Supply Voltage

VDD-GND

Nch Open Drain Output

Output Voltage

GND-0.3 ~ +10

GND-0.3 ~ VDD+0.3

540

VOUT

CMOS Output

ER pin Voltage

VCT

°C

*1 *2

Power Dissipation

Operating Temperature

Topr

Tstg

-40 ~ +105

Ambient Storage Temperature

-55 ~ +125

°C

*1 Use above Ta=25°C results in a 5.4mW loss per degree.

*2 When mounted on a 70mm×70mm×1.6mm glass epoxy board.

 Electrical characteristics (Unless Otherwise Specified Ta=-40 to 105°C)

Limit

Typ.

Parameter

Symbol

Condition

Unit

Min.

VDET(T)

×0.99

Max.

VDET(T)

Detection Voltage

VDET

VDD=HL, RL=470kΩ

VDET(T)

±100

×1.01

Detection Voltage

Temperature coefficient

VDET/

∆T

±360 ppm/°C

-40°C~+105°C

VDET(T) VDET(T) VDET(T)

VDD＝LHL, RL=470kΩ

Hysteresis Voltage

∆VDET

×0.03

×0.05

×0.08

BD4XXX5G

CL=100pF,

‘High’ Output

Delay time

tPLH

100

110

RL=100kΩ

BD4XXX1G

BD4XXX2G

*1, *2, *3

180

200

220

VDD=VDET-0.2V, VER=0V VDET=2.3V~3.1V

VDD=VDET-0.2V, VER=0V VDET=3.2V~4.2V

VDD=VDET-0.2V, VER=0V VDET=4.3V~4.8V

VDD=VDET+0.2V, VER=0V VDET=2.3V~3.1V

VDD=VDET+0.2V, VER=0V VDET=3.2V~4.2V

VDD=VDET+0.2V, VER=0V VDET=4.3V~4.8V

0.70

0.75

0.80

0.75

0.80

0.85

2.10

2.85

2.25

3.00

2.40

3.15

2.25

4.28

2.40

4.50

2.55

Circuit Current

when ON

IDD1

IDD2

µA

Circuit Current

when OFF

0.85

4.73

VDD=VDET+0.2V, VER=0V VDET=4.3V~4.8V

VOL≤0.4V, RL=470kΩ, Ta=25~105°C

VOL≤0.4V, RL=470kΩ, Ta=-40~25°C

0.95

1.20

1.2

Operating Voltage Range

‘High’ Output Current

VOPL

IOH

2.7

VDS=0.5V,VDD=6.0V,VDET≥4.3V

VDS=0.5V, VDD=1.2V

0.4

2.0

1.2

5.0

‘Low’Output Current (Nch)

IOL

VDS=0.5V, VDD=2.4V VDET=2.7V~4.8V

VDD=VDS=10V

Leak Current when OFF

ER Pin ‘H’ Voltage

ER Pin ‘L’ Voltage

Ileak

VEH

VEL

IEL

0.1

0.8

µA

ER Pin Input Current

µA

VDET(T):Standard Detection Voltage (2.3V to 4.8V, 0.1V step)

RL :Pull-up resistor to be connected between VOUT and power supply.

CL :Capacitor to be connected between VOUT and GND.

*1 Guarantee is Ta=25°C.

*2 tPLH:VDD=(VDET(T)-0.5V)(VDET(T)+0.5V)

*3 tPLH:VDD=Please set up the rise up time between VDD=0VDET more than 100µs.

Attention: Please connect the GND when you don’t use ‘ER’

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2009.05 - Rev.C

2/9

Technical Note

BD45□□□G, BD46□□□G series

 Block Diagrams

BD45□□□G

BD46□□□G

VOUT

Oscillation

Circuit Counter

Timer

Circuit Counter

Timer

VOUT

Vref

GND

Fig.1

Fig.2

PIN No.

Symbol

Function

Manual Reset

Substrate *

TOP VIEW

SUB

GND

VOUT

VDD

GND

Reset Output

Power Supply Voltage

SSOP5

*Connect the substrate to GND.

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2009.05 - Rev.C

3/9

Technical Note

BD45□□□G, BD46□□□G series

 Reference Data (Unless specified otherwise, Ta=25°C)

2.0

1.5

1.0

0.5

0.0

BD46281G

】

BD45281G

【

】

【

】

V_DD=6.0V

V_DD=4.8V

V_DD=2.4V

V_DD=1.2V

2.0

0.0

0.5

1.0

1.5

2.5

DRAIN-SOURCE VOLTAGE

V_DS[V]

：

V_DDSUPPLY VOLTAGE V_DD[V]

DRAIN-SOURCE VOLTAGE V_DS[V]

：

Fig.4 “Low” Output Current

Fig.3 Circuit Current

Fig.5 “High” Output Current

BD45421G

【

】

BD45421G

BD46281G

【】

【

】

Ta=25

℃

Ta=25

℃

9 10

0.5

1.5

2.5

3.5

4.5

5.5

V_DDSUPPLY VOLTAGE V_DD[V]

：

ER VOLTAGE V_ER[V]

：

ER VOLTAGE VER[V]

：

Fig.7 ER Terminal Threshold Voltage

Fig.8 ER Terminal Input Current

Fig.6 I/O Characteristics

1.6

3.0

2.8

5.8

BD45421G

【

】

【

】

【

】

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

2.6

2.4

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

5.4

5.0

4.6

4.2

3.8

3.4

3.0

Low to high(V_DET+ΔV_DET

)

High to low(V_DET

)

～

-40 -20

20 40 60 80 100

-40 -20

TEMPERATURE Ta[ ]

℃

20 40 60 80 100

-40

TEMPERATURE Ta[

]

℃

TEMPERATURE Ta[

]

℃

：

Fig.9 Detection Voltage

Release Voltage

Fig.11 Circuit Current when OFF

Fig.10 Circuit Current when ON

(VDET-0.2V)

1.5

250

BD4528 G

【 □ 】

BD45421G

【

】

BD45281G t_PHL

【

】

200

150

100

BD45282G

1.0

0.5

0.0

BD45281G

BD45285G

-60 -40 -20

20 40 60 80 100 120

-60 -40 -20

TEMPERATURE Ta[ ]

℃

20 40 60 80 100 120

-40 -20

20 40 60 80 100

TEMPERATURE Ta[

]

℃

：

TEMPERATURE Ta[

]

℃

：

Fig.12 Operating Limit Voltage

Fig.13 Output Delay Time

Fig.14 Output Delay Time

“Low””High”

“High””Low”

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2009.05 - Rev.C

4/9

Technical Note

BD45□□□G, BD46□□□G series

 Reference Data

Examples of Leading (TPLH) and Falling (TPHL) Output

Part Number

BD45275G

BD46275G

tPLH[ms]

tPHL[µs]

VDD=2.2V3.2V

VDD=3.2V2.2V

*This data is for reference only.

The figures will vary with the application, so please confirm actual operating conditions before use.

 Explanation of Operation

For both the open drain type (Fig.15) and the CMOS output type (Fig.16), the detection and release voltages are used as

threshold voltages. When the voltage applied to the VDD pins reaches the applicable threshold voltage, the VOUT terminal

voltage switches from either “High” to “Low” or from “Low” to “High”. Because the BD45□□□G series uses an open drain output

type, it is possible to connect a pull-up resistor to VDD or another power supply [The output “High” voltage (VOUT) in this case

becomes VDD or the voltage of the other power supply].

VDD

Vref

Reset

VOUT

Oscillation

Circuit Counter

Timer

Oscillation

Circuit Counter

Timer

Reset

VOUT

GND

Fig.15 (BD45□□□G Type Internal Block Diagram)

Fig.16 (BD46□□□G Type Internal Block Diagram)

 Timing Waveform

Example: the following shows the relationship between the input voltages VDD, the output voltage VOUT and ER terminal

when the input power supply voltage VDD is made to sweep up and sweep down (the circuits are those in Fig. 12 and 13).

When the power supply is turned on, the output is unsettled from

VDD

V^DET+ΔVDET

after over the operating limit voltage (VOPL) until TPHL. There fore

it is possible that the reset signal is not outputted when the rise

VDET

VDD

⑦

time of VDD is faster than TPHL.

V^OPL

When VDD is greater than VOPL but less than the reset release

voltage (VDET + ∆VDET), the output voltages will switch to Low.

If VDD exceeds the reset release voltage (VDET + ∆VDET), the

counter timer start and VOUT switches from L to H.

VOH

tPLH

VOUT

tPHL

VOL

VEH

When more than the high level voltage is supplied ER terminal,

VOUT comes to “L” after tPLH delay time. Therefore, a time when

ER terminal is “H” is necessary for 100µsec or more.

When the ER terminal switches to Low, the counter timer starts

to operate, a delay of tPLH occurs, and VOUT switches from “L” to

“H”.

tPHL

①

②

③

④ ⑤

⑥

If VDD drops below the detection voltage (VDET) when the

power supply is powered down or when there is a power supply

fluctuation, VOUT switches to L (with a delay of tPHL).

The potential difference between the detection voltage and the

release voltage is known as the hysteresis width (∆VDET). The

system is designed such that the output does not flip-flop with

power supply fluctuations within this hysteresis width, preventing

malfunctions due to noise.

Fig.17

These time changes by the application and use it, please verify

and confirm using practical applications.

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2009.05 - Rev.C

5/9

Technical Note

BD45□□□G, BD46□□□G series

 Circuit Applications

1) Examples of a common power supply detection reset circuit.

Application examples of BD45□□□G series (Open Drain

output type) and BD46□□□G series (CMOS output type)

are shown below.

VDD1

VDD2

Microcontroller

CASE1: the power supply of the microcontroller (VDD2)

differs from the power supply of the reset detection

(VDD1).

BD45□□□

Use the open drain output type (BD45□□□G) attached a

load resistance (RL) between the output and VDD2. (As

shown Fig.18)

（Noise-filtering

Capacitor）

GND

Fig.18 Open Collector Output Type

CASE2: the power supply of the microcontroller (VDD1) is

same as the power supply of the reset detection (VDD1).

Use CMOS output type (BD46□□□G) or open drain output

VDD1

type (BD45□□□G) attached

a load resistance (RL)

between the output and Vdd1. (As shown Fig.19)

Microcontroller

BD46□□□

When a capacitance CL for noise filtering is connected to

the VOUT pin (the reset signal input terminal of the

microcontroller), please take into account the waveform of

the rise and fall of the output voltage (VOUT).

（Noise-filtering

Capacitor）

GND

Fig.19 CMOS Output Type

2) The following is an example of a circuit application in which an OR connection between two types of detection voltages

resets the microcontroller.

DD3

DD1

DD2

microcontroller

OUT

BD45□□□

No.1

No.2

GND

Fig.20

When there are many power supplies of the system, power supplies VDD1 and VDD2 are being monitored separately, and

it is necessary to reset the microcomputer, it is possible to use an OR connection on the open drain output type BD45□□□G

series to pull-up to the desired voltage (VDD3) as shown in Fig. 20 and make the output “High” voltage matches the power

supply voltage VDD3 of the microcontroller.

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2009.05 - Rev.C

6/9

Technical Note

BD45□□□G, BD46□□□G series

Examples of the power supply with resistor dividers

In applications where the power supply input terminal (VDD) of an IC with resistor dividers, it is possible that a through

current will momentarily flow into the circuit when the output logic switches, resulting in malfunctions (such as output

oscillatory state).

(Through-current is a current that momentarily flows from the power supply (VDD) to ground (GND) when the output level

switches from “High” to “Low” or vice versa.)

CIN

BD45□□□G

BD46□□□G

OUT

GND

Fig.21

A voltage drop of [the through-current (I1)] × [input resistor (R2)] is caused by the through current, and the input voltage to

descends, when the output switches from “Low” to “High”. When the input voltage decreases and falls below the detection

voltage, the output voltage switches from “High” to “Low”. At this time, the through-current stops flowing through output

“Low”, and the voltage drop is eliminated. As a result, the output switches from “Low” to “High”, which again causes the

through current to flow and the voltage drop. This process is repeated, resulting in oscillation.

IDD

Through Current

VDD

VDET

Fig.22 Current Consumption vs. Power Supply Voltage

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2009.05 - Rev.C

7/9

Technical Note

BD45□□□G, BD46□□□G series

 Operation Notes

(1) Absolute maximum range

Absolute Maximum Ratings are those values beyond which the life of a device may be destroyed. We cannot be defined the

failure mode, such as short mode or open mode. Therefore a physical security countermeasure, like fuse, is to be given

when a specific mode to be beyond absolute maximum ratings is considered.

(2) GND potential

GND terminal should be a lowest voltage potential every state.

Please make sure all pins, which are over ground even if, include transient feature.

(3) Electrical Characteristics

Be sure to check the electrical characteristics that are one the tentative specification will be changed by temperature,

supply voltage, and external circuit.

(4) Bypass Capacitor for Noise Rejection

Please put into the capacitor of 1µF or more between VDD pin and GND, and the capacitor of about 1000pF between VOUT

pin and GND, to reject noise. If extremely big capacitor is used, transient response might be late. Please confirm sufficiently

for the point.

(5) Short Circuit between Terminal and Soldering

Don’t short-circuit between Output pin and VDD pin, Output pin and GND pin, or VDD pin and GND pin. When soldering the

IC on circuit board, please be unusually cautious about the orientation and the position of the IC. When the orientation is

mistaken the IC may be destroyed.

(6) Electromagnetic Field

Mal-function may happen when the device is used in the strong electromagnetic field.

(7) The VDD line inpedance might cause oscillation because of the detection current.

(8) A VDD -GND capacitor (as close connection as possible) should be used in high VDD line impedance condition.

(9) Lower than the mininum input voltage makes the VOUT high impedance, and it must be VDD in pull up (VDD) condition.

(10) This IC has extremely high impedance terminals. Small leak current due to the uncleanness of PCB surface might

cause unexpected operations. Application values in these conditions should be selected carefully. If the leakage of about

1MΩ is assumed between the ER terminal and the GND terminal, 100kΩ connection between the ER terminal and the

VDD terminal would be recommended. If the leakage is assumed between the VOUT terminal and the GND terminal, the

pull-up resistor should be less than 1/10 of the assumed leak resistance.

(11) External parameters

The recommended parameter range for RL is 50kΩ~1MΩ. There are many factors (board layout, etc) that can affect

characteristics. Please verify and confirm using practical applications.

(12) Power on reset operation

Please note that the power on reset output varies with the VDD rise up time. Please verify the actual operation.

(13) Precautions for board inspection

Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be

certain to use proper discharge procedure before each process of the test operation.

To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any

equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handing, transfer

and storage operations. Before attempting to connect components to the test setup, make certain that the power supply is

OFF. Likewise, be sure the power supply is OFF before removing any component connected to the test setup.

(14) When the power supply, is turned on because of in certain cases, momentary Rash-current flow into the IC at the

logic unsettled, the couple capacitance, GND pattern of width and leading line must be considered.

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2009.05 - Rev.C

8/9

Technical Note

BD45□□□G, BD46□□□G series

 Part Number Selection

－

BD45:

Reset Voltage Value

23: 2.3V

Counter Timer

Delay Time Settings

5: 50ms

Package

Taping Specifications

Embossed Taping

Open Drain Type

G：SSOP5

CMOS Detector IC with

Built-In Counter Timer

48: 4.8V

1: 100ms

BD46:

2: 200ms

CMOS Output Type

CMOS Detector IC with

Built-In Counter Timer

SSOP5

(Unit：mm)

<Tape and Reel information> SSOP5

Tape

Embossed carrier tape

3000pcs

−

6_°

2.9 0.2

Quantity

TR (The direction is the 1pin of product is at the upper left

when you hold reel on the left hand and you pull out the tape

on the right hand)

Direction

of feed

+0.05

0.13 −0.03

+0.05

−0.04

0.42

0.95

0.1

Direction of feed

1Pin

Reel

* When you order, please order in times the amount of package quantity.

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2009.05 - Rev.C

9/9

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"Products"). If you wish to use any such Product, please be sure to refer to the speciﬁcations,

which can be obtained from ROHM upon request.

Examples of application circuits, circuit constants and any other information contained herein

illustrate the standard usage and operations of the Products. The peripheral conditions must

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Great care was taken in ensuring the accuracy of the information speciﬁed in this document.

However, should you incur any damage arising from any inaccuracy or misprint of such

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The technical information speciﬁed herein is intended only to show the typical functions of and

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BD45232 [ROHM]

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